xref: /openbmc/qemu/include/hw/intc/arm_gicv3_its_common.h (revision 18f6290a6a95b2b16ab061bfd92274f6ba2a821b)
1 /*
2  * ITS support for ARM GICv3
3  *
4  * Copyright (c) 2015 Samsung Electronics Co., Ltd.
5  * Written by Pavel Fedin
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef QEMU_ARM_GICV3_ITS_COMMON_H
22 #define QEMU_ARM_GICV3_ITS_COMMON_H
23 
24 #include "hw/sysbus.h"
25 #include "hw/intc/arm_gicv3_common.h"
26 #include "qom/object.h"
27 
28 #define TYPE_ARM_GICV3_ITS "arm-gicv3-its"
29 
30 #define ITS_CONTROL_SIZE 0x10000
31 #define ITS_TRANS_SIZE   0x10000
32 #define ITS_SIZE         (ITS_CONTROL_SIZE + ITS_TRANS_SIZE)
33 
34 #define GITS_CTLR        0x0
35 #define GITS_IIDR        0x4
36 #define GITS_TYPER       0x8
37 #define GITS_CBASER      0x80
38 #define GITS_CWRITER     0x88
39 #define GITS_CREADR      0x90
40 #define GITS_BASER       0x100
41 
42 #define GITS_TRANSLATER  0x0040
43 
44 struct GICv3ITSState {
45     SysBusDevice parent_obj;
46 
47     MemoryRegion iomem_main;
48     MemoryRegion iomem_its_cntrl;
49     MemoryRegion iomem_its_translation;
50 
51     GICv3State *gicv3;
52 
53     int dev_fd; /* kvm device fd if backed by kvm vgic support */
54     uint64_t gits_translater_gpa;
55     bool translater_gpa_known;
56 
57     /* Registers */
58     uint32_t ctlr;
59     uint32_t iidr;
60     uint64_t typer;
61     uint64_t cbaser;
62     uint64_t cwriter;
63     uint64_t creadr;
64     uint64_t baser[8];
65 
66     Error *migration_blocker;
67 };
68 
69 typedef struct GICv3ITSState GICv3ITSState;
70 
71 void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops,
72                    const MemoryRegionOps *tops);
73 
74 #define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common"
75 typedef struct GICv3ITSCommonClass GICv3ITSCommonClass;
76 DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSCommonClass,
77                      ARM_GICV3_ITS_COMMON, TYPE_ARM_GICV3_ITS_COMMON)
78 
79 struct GICv3ITSCommonClass {
80     /*< private >*/
81     SysBusDeviceClass parent_class;
82     /*< public >*/
83 
84     int (*send_msi)(GICv3ITSState *s, uint32_t data, uint16_t devid);
85     void (*pre_save)(GICv3ITSState *s);
86     void (*post_load)(GICv3ITSState *s);
87 };
88 
89 
90 #endif
91