1 /* 2 * ARM GIC support 3 * 4 * Copyright (c) 2012 Linaro Limited 5 * Copyright (c) 2015 Huawei. 6 * Written by Peter Maydell 7 * Extended to 64 cores by Shlomo Pongratz 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation, either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License along 20 * with this program; if not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #ifndef HW_ARM_GICV3_COMMON_H 24 #define HW_ARM_GICV3_COMMON_H 25 26 #include "hw/sysbus.h" 27 #include "hw/intc/arm_gic_common.h" 28 29 typedef struct GICv3State { 30 /*< private >*/ 31 SysBusDevice parent_obj; 32 /*< public >*/ 33 34 qemu_irq *parent_irq; 35 qemu_irq *parent_fiq; 36 37 MemoryRegion iomem_dist; /* Distributor */ 38 MemoryRegion iomem_redist; /* Redistributors */ 39 40 uint32_t num_cpu; 41 uint32_t num_irq; 42 uint32_t revision; 43 bool security_extn; 44 45 int dev_fd; /* kvm device fd if backed by kvm vgic support */ 46 } GICv3State; 47 48 #define TYPE_ARM_GICV3_COMMON "arm-gicv3-common" 49 #define ARM_GICV3_COMMON(obj) \ 50 OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3_COMMON) 51 #define ARM_GICV3_COMMON_CLASS(klass) \ 52 OBJECT_CLASS_CHECK(ARMGICv3CommonClass, (klass), TYPE_ARM_GICV3_COMMON) 53 #define ARM_GICV3_COMMON_GET_CLASS(obj) \ 54 OBJECT_GET_CLASS(ARMGICv3CommonClass, (obj), TYPE_ARM_GICV3_COMMON) 55 56 typedef struct ARMGICv3CommonClass { 57 /*< private >*/ 58 SysBusDeviceClass parent_class; 59 /*< public >*/ 60 61 void (*pre_save)(GICv3State *s); 62 void (*post_load)(GICv3State *s); 63 } ARMGICv3CommonClass; 64 65 void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, 66 const MemoryRegionOps *ops); 67 68 #endif 69