xref: /openbmc/qemu/include/hw/input/i8042.h (revision 89fc45d5)
1 /*
2  * QEMU PS/2 Controller
3  *
4  * Copyright (c) 2003 Fabrice Bellard
5  *
6  * SPDX-License-Identifier: MIT
7  */
8 #ifndef HW_INPUT_I8042_H
9 #define HW_INPUT_I8042_H
10 
11 #include "hw/isa/isa.h"
12 #include "qom/object.h"
13 
14 #define TYPE_I8042 "i8042"
15 OBJECT_DECLARE_SIMPLE_TYPE(ISAKBDState, I8042)
16 
17 #define I8042_A20_LINE "a20"
18 
19 
20 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
21                    MemoryRegion *region, ram_addr_t size,
22                    hwaddr mask);
23 void i8042_isa_mouse_fake_event(ISAKBDState *isa);
24 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
25 
26 static inline bool i8042_present(void)
27 {
28     bool amb = false;
29     return object_resolve_path_type("", TYPE_I8042, &amb) || amb;
30 }
31 
32 /*
33  * ACPI v2, Table 5-10 - Fixed ACPI Description Table Boot Architecture
34  * Flags, bit offset 1 - 8042.
35  */
36 static inline uint16_t iapc_boot_arch_8042(void)
37 {
38     return i8042_present() ? 0x1 << 1 : 0x0 ;
39 }
40 
41 #endif /* HW_INPUT_I8042_H */
42