xref: /openbmc/qemu/include/hw/ide/internal.h (revision 75ac231c)
1 #ifndef HW_IDE_INTERNAL_H
2 #define HW_IDE_INTERNAL_H
3 
4 /*
5  * QEMU IDE Emulation -- internal header file
6  * only files in hw/ide/ are supposed to include this file.
7  * non-internal declarations are in hw/ide.h
8  */
9 
10 #include "qapi/qapi-types-run-state.h"
11 #include "hw/ide.h"
12 #include "hw/irq.h"
13 #include "hw/isa/isa.h"
14 #include "sysemu/dma.h"
15 #include "hw/block/block.h"
16 #include "scsi/constants.h"
17 
18 /* debug IDE devices */
19 #define USE_DMA_CDROM
20 #include "qom/object.h"
21 
22 typedef struct IDEDevice IDEDevice;
23 typedef struct IDEState IDEState;
24 typedef struct IDEDMA IDEDMA;
25 typedef struct IDEDMAOps IDEDMAOps;
26 
27 #define TYPE_IDE_BUS "IDE"
28 OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS)
29 
30 #define MAX_IDE_DEVS 2
31 
32 /* Device/Head ("select") Register */
33 #define ATA_DEV_SELECT          0x10
34 /* ATA1,3: Defined as '1'.
35  * ATA2:   Reserved.
36  * ATA3-7: obsolete. */
37 #define ATA_DEV_ALWAYS_ON       0xA0
38 #define ATA_DEV_LBA             0x40
39 #define ATA_DEV_LBA_MSB         0x0F  /* LBA 24:27 */
40 #define ATA_DEV_HS              0x0F  /* HS 3:0 */
41 
42 
43 /* Bits of HD_STATUS */
44 #define ERR_STAT		0x01
45 #define INDEX_STAT		0x02
46 #define ECC_STAT		0x04	/* Corrected error */
47 #define DRQ_STAT		0x08
48 #define SEEK_STAT		0x10
49 #define SRV_STAT		0x10
50 #define WRERR_STAT		0x20
51 #define READY_STAT		0x40
52 #define BUSY_STAT		0x80
53 
54 /* Bits for HD_ERROR */
55 #define MARK_ERR		0x01	/* Bad address mark */
56 #define TRK0_ERR		0x02	/* couldn't find track 0 */
57 #define ABRT_ERR		0x04	/* Command aborted */
58 #define MCR_ERR			0x08	/* media change request */
59 #define ID_ERR			0x10	/* ID field not found */
60 #define MC_ERR			0x20	/* media changed */
61 #define ECC_ERR			0x40	/* Uncorrectable ECC error */
62 #define BBD_ERR			0x80	/* pre-EIDE meaning:  block marked bad */
63 #define ICRC_ERR		0x80	/* new meaning:  CRC error during transfer */
64 
65 /* Bits of HD_NSECTOR */
66 #define CD			0x01
67 #define IO			0x02
68 #define REL			0x04
69 #define TAG_MASK		0xf8
70 
71 /* Bits of Device Control register */
72 #define IDE_CTRL_HOB            0x80
73 #define IDE_CTRL_RESET          0x04
74 #define IDE_CTRL_DISABLE_IRQ    0x02
75 
76 /* ACS-2 T13/2015-D Table B.2 Command codes */
77 #define WIN_NOP				0x00
78 /* reserved                             0x01..0x02 */
79 #define CFA_REQ_EXT_ERROR_CODE		0x03 /* CFA Request Extended Error Code */
80 /* reserved                             0x04..0x05 */
81 #define WIN_DSM                         0x06
82 /* reserved                             0x07 */
83 #define WIN_DEVICE_RESET		0x08
84 /* reserved                             0x09..0x0a */
85 /* REQUEST SENSE DATA EXT               0x0B */
86 /* reserved                             0x0C..0x0F */
87 #define WIN_RECAL                       0x10 /* obsolete since ATA4 */
88 /* obsolete since ATA3, retired in ATA4 0x11..0x1F */
89 #define WIN_READ			0x20 /* 28-Bit */
90 #define WIN_READ_ONCE                   0x21 /* 28-Bit w/o retries, obsolete since ATA5 */
91 /* obsolete since ATA4                  0x22..0x23 */
92 #define WIN_READ_EXT			0x24 /* 48-Bit */
93 #define WIN_READDMA_EXT			0x25 /* 48-Bit */
94 #define WIN_READDMA_QUEUED_EXT          0x26 /* 48-Bit, obsolete since ACS2 */
95 #define WIN_READ_NATIVE_MAX_EXT		0x27 /* 48-Bit */
96 /* reserved                             0x28 */
97 #define WIN_MULTREAD_EXT		0x29 /* 48-Bit */
98 /* READ STREAM DMA EXT                  0x2A */
99 /* READ STREAM EXT                      0x2B */
100 /* reserved                             0x2C..0x2E */
101 /* READ LOG EXT                         0x2F */
102 #define WIN_WRITE			0x30 /* 28-Bit */
103 #define WIN_WRITE_ONCE                  0x31 /* 28-Bit w/o retries, obsolete since ATA5 */
104 /* obsolete since ATA4                  0x32..0x33 */
105 #define WIN_WRITE_EXT			0x34 /* 48-Bit */
106 #define WIN_WRITEDMA_EXT		0x35 /* 48-Bit */
107 #define WIN_WRITEDMA_QUEUED_EXT		0x36 /* 48-Bit */
108 #define WIN_SET_MAX_EXT                 0x37 /* 48-Bit, obsolete since ACS2 */
109 #define WIN_SET_MAX_EXT			0x37 /* 48-Bit */
110 #define CFA_WRITE_SECT_WO_ERASE		0x38 /* CFA Write Sectors without erase */
111 #define WIN_MULTWRITE_EXT		0x39 /* 48-Bit */
112 /* WRITE STREAM DMA EXT                 0x3A */
113 /* WRITE STREAM EXT                     0x3B */
114 #define WIN_WRITE_VERIFY                0x3C /* 28-Bit, obsolete since ATA4 */
115 /* WRITE DMA FUA EXT                    0x3D */
116 /* obsolete since ACS2                  0x3E */
117 /* WRITE LOG EXT                        0x3F */
118 #define WIN_VERIFY			0x40 /* 28-Bit - Read Verify Sectors */
119 #define WIN_VERIFY_ONCE                 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */
120 #define WIN_VERIFY_EXT			0x42 /* 48-Bit */
121 /* reserved                             0x43..0x44 */
122 /* WRITE UNCORRECTABLE EXT              0x45 */
123 /* reserved                             0x46 */
124 /* READ LOG DMA EXT                     0x47 */
125 /* reserved                             0x48..0x4F */
126 /* obsolete since ATA4                  0x50 */
127 /* CONFIGURE STREAM                     0x51 */
128 /* reserved                             0x52..0x56 */
129 /* WRITE LOG DMA EXT                    0x57 */
130 /* reserved                             0x58..0x5A */
131 /* TRUSTED NON DATA                     0x5B */
132 /* TRUSTED RECEIVE                      0x5C */
133 /* TRUSTED RECEIVE DMA                  0x5D */
134 /* TRUSTED SEND                         0x5E */
135 /* TRUSTED SEND DMA                     0x5F */
136 /* READ FPDMA QUEUED                    0x60 */
137 /* WRITE FPDMA QUEUED                   0x61 */
138 /* reserved                             0x62->0x6F */
139 #define WIN_SEEK                        0x70 /* obsolete since ATA7 */
140 /* reserved                             0x71-0x7F */
141 /* vendor specific                      0x80-0x86 */
142 #define CFA_TRANSLATE_SECTOR		0x87 /* CFA Translate Sector */
143 /* vendor specific                      0x88-0x8F */
144 #define WIN_DIAGNOSE			0x90
145 #define WIN_SPECIFY                     0x91 /* set drive geometry translation, obsolete since ATA6 */
146 #define WIN_DOWNLOAD_MICROCODE		0x92
147 /* DOWNLOAD MICROCODE DMA               0x93 */
148 #define WIN_STANDBYNOW2                 0x94 /* retired in ATA4 */
149 #define WIN_IDLEIMMEDIATE2              0x95 /* force drive to become "ready", retired in ATA4 */
150 #define WIN_STANDBY2                    0x96 /* retired in ATA4 */
151 #define WIN_SETIDLE2                    0x97 /* retired in ATA4 */
152 #define WIN_CHECKPOWERMODE2             0x98 /* retired in ATA4 */
153 #define WIN_SLEEPNOW2                   0x99 /* retired in ATA4 */
154 /* vendor specific                      0x9A */
155 /* reserved                             0x9B..0x9F */
156 #define WIN_PACKETCMD			0xA0 /* Send a packet command. */
157 #define WIN_PIDENTIFY			0xA1 /* identify ATAPI device	*/
158 #define WIN_QUEUED_SERVICE              0xA2 /* obsolete since ACS2 */
159 /* reserved                             0xA3..0xAF */
160 #define WIN_SMART			0xB0 /* self-monitoring and reporting */
161 /* Device Configuration Overlay         0xB1 */
162 /* reserved                             0xB2..0xB3 */
163 /* Sanitize Device                      0xB4 */
164 /* reserved                             0xB5 */
165 /* NV Cache                             0xB6 */
166 /* reserved for CFA                     0xB7..0xBB */
167 #define CFA_ACCESS_METADATA_STORAGE	0xB8
168 /* reserved                             0xBC..0xBF */
169 #define CFA_ERASE_SECTORS       	0xC0 /* microdrives implement as NOP */
170 /* vendor specific                      0xC1..0xC3 */
171 #define WIN_MULTREAD			0xC4 /* read sectors using multiple mode*/
172 #define WIN_MULTWRITE			0xC5 /* write sectors using multiple mode */
173 #define WIN_SETMULT			0xC6 /* enable/disable multiple mode */
174 #define WIN_READDMA_QUEUED              0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */
175 #define WIN_READDMA			0xC8 /* read sectors using DMA transfers */
176 #define WIN_READDMA_ONCE                0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */
177 #define WIN_WRITEDMA			0xCA /* write sectors using DMA transfers */
178 #define WIN_WRITEDMA_ONCE               0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */
179 #define WIN_WRITEDMA_QUEUED		0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */
180 #define CFA_WRITE_MULTI_WO_ERASE	0xCD /* CFA Write multiple without erase */
181 /* WRITE MULTIPLE FUA EXT               0xCE */
182 /* reserved                             0xCF..0xDO */
183 /* CHECK MEDIA CARD TYPE                0xD1 */
184 /* reserved for media card pass through 0xD2..0xD4 */
185 /* reserved                             0xD5..0xD9 */
186 #define WIN_GETMEDIASTATUS              0xDA /* obsolete since ATA8 */
187 /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */
188 #define WIN_DOORLOCK                    0xDE /* lock door on removable drives, obsolete since ATA8 */
189 #define WIN_DOORUNLOCK                  0xDF /* unlock door on removable drives, obsolete since ATA8 */
190 #define WIN_STANDBYNOW1			0xE0
191 #define WIN_IDLEIMMEDIATE		0xE1 /* force drive to become "ready" */
192 #define WIN_STANDBY             	0xE2 /* Set device in Standby Mode */
193 #define WIN_SETIDLE1			0xE3
194 #define WIN_READ_BUFFER			0xE4 /* force read only 1 sector */
195 #define WIN_CHECKPOWERMODE1		0xE5
196 #define WIN_SLEEPNOW1			0xE6
197 #define WIN_FLUSH_CACHE			0xE7
198 #define WIN_WRITE_BUFFER		0xE8 /* force write only 1 sector */
199 /* READ BUFFER DMA                      0xE9 */
200 #define WIN_FLUSH_CACHE_EXT		0xEA /* 48-Bit */
201 /* WRITE BUFFER DMA                     0xEB */
202 #define WIN_IDENTIFY			0xEC /* ask drive to identify itself	*/
203 #define WIN_MEDIAEJECT                  0xED /* obsolete since ATA8 */
204 /* obsolete since ATA4                  0xEE */
205 #define WIN_SETFEATURES			0xEF /* set special drive features */
206 #define IBM_SENSE_CONDITION             0xF0 /* measure disk temperature, vendor specific */
207 #define WIN_SECURITY_SET_PASS		0xF1
208 #define WIN_SECURITY_UNLOCK		0xF2
209 #define WIN_SECURITY_ERASE_PREPARE	0xF3
210 #define WIN_SECURITY_ERASE_UNIT		0xF4
211 #define WIN_SECURITY_FREEZE_LOCK	0xF5
212 #define CFA_WEAR_LEVEL                  0xF5 /* microdrives implement as NOP; not specified in T13! */
213 #define WIN_SECURITY_DISABLE		0xF6
214 /* vendor specific                      0xF7 */
215 #define WIN_READ_NATIVE_MAX		0xF8 /* return the native maximum address */
216 #define WIN_SET_MAX			0xF9
217 /* vendor specific                      0xFA..0xFF */
218 
219 /* set to 1 set disable mult support */
220 #define MAX_MULT_SECTORS 16
221 
222 #define IDE_DMA_BUF_SECTORS 256
223 
224 /* feature values for Data Set Management */
225 #define DSM_TRIM                        0x01
226 
227 #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS)
228 #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS"
229 #endif
230 
231 /* ATAPI defines */
232 
233 #define ATAPI_PACKET_SIZE 12
234 
235 /* The generic packet command opcodes for CD/DVD Logical Units,
236  * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
237 #define GPCMD_BLANK			    0xa1
238 #define GPCMD_CLOSE_TRACK		    0x5b
239 #define GPCMD_FLUSH_CACHE		    0x35
240 #define GPCMD_FORMAT_UNIT		    0x04
241 #define GPCMD_GET_CONFIGURATION		    0x46
242 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
243 #define GPCMD_GET_PERFORMANCE		    0xac
244 #define GPCMD_INQUIRY			    0x12
245 #define GPCMD_LOAD_UNLOAD		    0xa6
246 #define GPCMD_MECHANISM_STATUS		    0xbd
247 #define GPCMD_MODE_SELECT_10		    0x55
248 #define GPCMD_MODE_SENSE_10		    0x5a
249 #define GPCMD_PAUSE_RESUME		    0x4b
250 #define GPCMD_PLAY_AUDIO_10		    0x45
251 #define GPCMD_PLAY_AUDIO_MSF		    0x47
252 #define GPCMD_PLAY_AUDIO_TI		    0x48
253 #define GPCMD_PLAY_CD			    0xbc
254 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
255 #define GPCMD_READ_10			    0x28
256 #define GPCMD_READ_12			    0xa8
257 #define GPCMD_READ_CDVD_CAPACITY	    0x25
258 #define GPCMD_READ_CD			    0xbe
259 #define GPCMD_READ_CD_MSF		    0xb9
260 #define GPCMD_READ_DISC_INFO		    0x51
261 #define GPCMD_READ_DVD_STRUCTURE	    0xad
262 #define GPCMD_READ_FORMAT_CAPACITIES	    0x23
263 #define GPCMD_READ_HEADER		    0x44
264 #define GPCMD_READ_TRACK_RZONE_INFO	    0x52
265 #define GPCMD_READ_SUBCHANNEL		    0x42
266 #define GPCMD_READ_TOC_PMA_ATIP		    0x43
267 #define GPCMD_REPAIR_RZONE_TRACK	    0x58
268 #define GPCMD_REPORT_KEY		    0xa4
269 #define GPCMD_REQUEST_SENSE		    0x03
270 #define GPCMD_RESERVE_RZONE_TRACK	    0x53
271 #define GPCMD_SCAN			    0xba
272 #define GPCMD_SEEK			    0x2b
273 #define GPCMD_SEND_DVD_STRUCTURE	    0xad
274 #define GPCMD_SEND_EVENT		    0xa2
275 #define GPCMD_SEND_KEY			    0xa3
276 #define GPCMD_SEND_OPC			    0x54
277 #define GPCMD_SET_READ_AHEAD		    0xa7
278 #define GPCMD_SET_STREAMING		    0xb6
279 #define GPCMD_START_STOP_UNIT		    0x1b
280 #define GPCMD_STOP_PLAY_SCAN		    0x4e
281 #define GPCMD_TEST_UNIT_READY		    0x00
282 #define GPCMD_VERIFY_10			    0x2f
283 #define GPCMD_WRITE_10			    0x2a
284 #define GPCMD_WRITE_AND_VERIFY_10	    0x2e
285 /* This is listed as optional in ATAPI 2.6, but is (curiously)
286  * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
287  * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
288  * drives support it. */
289 #define GPCMD_SET_SPEED			    0xbb
290 /* This seems to be a SCSI specific CD-ROM opcode
291  * to play data at track/index */
292 #define GPCMD_PLAYAUDIO_TI		    0x48
293 /*
294  * From MS Media Status Notification Support Specification. For
295  * older drives only.
296  */
297 #define GPCMD_GET_MEDIA_STATUS		    0xda
298 #define GPCMD_MODE_SENSE_6		    0x1a
299 
300 #define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
301 #define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
302 #define ATAPI_INT_REASON_REL            0x04
303 #define ATAPI_INT_REASON_TAG            0xf8
304 
305 /* same constants as bochs */
306 #define ASC_NO_SEEK_COMPLETE                 0x02
307 #define ASC_ILLEGAL_OPCODE                   0x20
308 #define ASC_LOGICAL_BLOCK_OOR                0x21
309 #define ASC_INV_FIELD_IN_CMD_PACKET          0x24
310 #define ASC_MEDIUM_MAY_HAVE_CHANGED          0x28
311 #define ASC_INCOMPATIBLE_FORMAT              0x30
312 #define ASC_MEDIUM_NOT_PRESENT               0x3a
313 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
314 #define ASC_DATA_PHASE_ERROR                 0x4b
315 #define ASC_MEDIA_REMOVAL_PREVENTED          0x53
316 
317 #define CFA_NO_ERROR            0x00
318 #define CFA_MISC_ERROR          0x09
319 #define CFA_INVALID_COMMAND     0x20
320 #define CFA_INVALID_ADDRESS     0x21
321 #define CFA_ADDRESS_OVERFLOW    0x2f
322 
323 #define SMART_READ_DATA       0xd0
324 #define SMART_READ_THRESH     0xd1
325 #define SMART_ATTR_AUTOSAVE   0xd2
326 #define SMART_SAVE_ATTR       0xd3
327 #define SMART_EXECUTE_OFFLINE 0xd4
328 #define SMART_READ_LOG        0xd5
329 #define SMART_WRITE_LOG       0xd6
330 #define SMART_ENABLE          0xd8
331 #define SMART_DISABLE         0xd9
332 #define SMART_STATUS          0xda
333 
334 typedef enum { IDE_HD, IDE_CD, IDE_CFATA } IDEDriveKind;
335 
336 typedef void EndTransferFunc(IDEState *);
337 
338 typedef void DMAStartFunc(const IDEDMA *, IDEState *, BlockCompletionFunc *);
339 typedef void DMAVoidFunc(const IDEDMA *);
340 typedef int DMAIntFunc(const IDEDMA *, bool);
341 typedef int32_t DMAInt32Func(const IDEDMA *, int32_t len);
342 typedef void DMAu32Func(const IDEDMA *, uint32_t);
343 typedef void DMAStopFunc(const IDEDMA *, bool);
344 
345 struct unreported_events {
346     bool eject_request;
347     bool new_media;
348 };
349 
350 enum ide_dma_cmd {
351     IDE_DMA_READ = 0,
352     IDE_DMA_WRITE,
353     IDE_DMA_TRIM,
354     IDE_DMA_ATAPI,
355     IDE_DMA__COUNT
356 };
357 
358 extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT];
359 
360 #define ide_cmd_is_read(s) \
361         ((s)->dma_cmd == IDE_DMA_READ)
362 
363 typedef struct IDEBufferedRequest {
364     QLIST_ENTRY(IDEBufferedRequest) list;
365     QEMUIOVector qiov;
366     QEMUIOVector *original_qiov;
367     BlockCompletionFunc *original_cb;
368     void *original_opaque;
369     bool orphaned;
370 } IDEBufferedRequest;
371 
372 /* NOTE: IDEState represents in fact one drive */
373 struct IDEState {
374     IDEBus *bus;
375     uint8_t unit;
376     /* ide config */
377     IDEDriveKind drive_kind;
378     int drive_heads, drive_sectors;
379     int cylinders, heads, sectors, chs_trans;
380     int64_t nb_sectors;
381     int mult_sectors;
382     int identify_set;
383     uint8_t identify_data[512];
384     int drive_serial;
385     char drive_serial_str[21];
386     char drive_model_str[41];
387     uint64_t wwn;
388     /* ide regs */
389     uint8_t feature;
390     uint8_t error;
391     uint32_t nsector;
392     uint8_t sector;
393     uint8_t lcyl;
394     uint8_t hcyl;
395     /* other part of tf for lba48 support */
396     uint8_t hob_feature;
397     uint8_t hob_nsector;
398     uint8_t hob_sector;
399     uint8_t hob_lcyl;
400     uint8_t hob_hcyl;
401 
402     uint8_t select;
403     uint8_t status;
404 
405     bool reset_reverts;
406 
407     /* set for lba48 access */
408     uint8_t lba48;
409     BlockBackend *blk;
410     char version[9];
411     /* ATAPI specific */
412     struct unreported_events events;
413     uint8_t sense_key;
414     uint8_t asc;
415     bool tray_open;
416     bool tray_locked;
417     uint8_t cdrom_changed;
418     int packet_transfer_size;
419     int elementary_transfer_size;
420     int32_t io_buffer_index;
421     int lba;
422     int cd_sector_size;
423     int atapi_dma; /* true if dma is requested for the packet cmd */
424     BlockAcctCookie acct;
425     BlockAIOCB *pio_aiocb;
426     QEMUIOVector qiov;
427     QLIST_HEAD(, IDEBufferedRequest) buffered_requests;
428     /* ATA DMA state */
429     uint64_t io_buffer_offset;
430     int32_t io_buffer_size;
431     QEMUSGList sg;
432     /* PIO transfer handling */
433     int req_nb_sectors; /* number of sectors per interrupt */
434     EndTransferFunc *end_transfer_func;
435     uint8_t *data_ptr;
436     uint8_t *data_end;
437     uint8_t *io_buffer;
438     /* PIO save/restore */
439     int32_t io_buffer_total_len;
440     int32_t cur_io_buffer_offset;
441     int32_t cur_io_buffer_len;
442     uint8_t end_transfer_fn_idx;
443     QEMUTimer *sector_write_timer; /* only used for win2k install hack */
444     uint32_t irq_count; /* counts IRQs when using win2k install hack */
445     /* CF-ATA extended error */
446     uint8_t ext_error;
447     /* CF-ATA metadata storage */
448     uint32_t mdata_size;
449     uint8_t *mdata_storage;
450     int media_changed;
451     enum ide_dma_cmd dma_cmd;
452     /* SMART */
453     uint8_t smart_enabled;
454     uint8_t smart_autosave;
455     int smart_errors;
456     uint8_t smart_selftest_count;
457     uint8_t *smart_selftest_data;
458     /* AHCI */
459     int ncq_queues;
460 };
461 
462 struct IDEDMAOps {
463     DMAStartFunc *start_dma;
464     DMAVoidFunc *pio_transfer;
465     DMAInt32Func *prepare_buf;
466     DMAu32Func *commit_buf;
467     DMAIntFunc *rw_buf;
468     DMAVoidFunc *restart;
469     DMAVoidFunc *restart_dma;
470     DMAStopFunc *set_inactive;
471     DMAVoidFunc *cmd_done;
472     DMAVoidFunc *reset;
473 };
474 
475 struct IDEDMA {
476     const struct IDEDMAOps *ops;
477     QEMUIOVector qiov;
478     BlockAIOCB *aiocb;
479 };
480 
481 struct IDEBus {
482     BusState qbus;
483     IDEDevice *master;
484     IDEDevice *slave;
485     IDEState ifs[2];
486     QEMUBH *bh;
487 
488     int bus_id;
489     int max_units;
490     IDEDMA *dma;
491     uint8_t unit;
492     uint8_t cmd;
493     qemu_irq irq;
494 
495     int error_status;
496     uint8_t retry_unit;
497     int64_t retry_sector_num;
498     uint32_t retry_nsector;
499     PortioList portio_list;
500     PortioList portio2_list;
501     VMChangeStateEntry *vmstate;
502 };
503 
504 #define TYPE_IDE_DEVICE "ide-device"
505 OBJECT_DECLARE_TYPE(IDEDevice, IDEDeviceClass, IDE_DEVICE)
506 
507 struct IDEDeviceClass {
508     DeviceClass parent_class;
509     void (*realize)(IDEDevice *dev, Error **errp);
510 };
511 
512 struct IDEDevice {
513     DeviceState qdev;
514     uint32_t unit;
515     BlockConf conf;
516     int chs_trans;
517     char *version;
518     char *serial;
519     char *model;
520     uint64_t wwn;
521     /*
522      * 0x0000        - rotation rate not reported
523      * 0x0001        - non-rotating medium (SSD)
524      * 0x0002-0x0400 - reserved
525      * 0x0401-0xffe  - rotations per minute
526      * 0xffff        - reserved
527      */
528     uint16_t rotation_rate;
529 };
530 
531 /* These are used for the error_status field of IDEBus */
532 #define IDE_RETRY_MASK 0xf8
533 #define IDE_RETRY_DMA  0x08
534 #define IDE_RETRY_PIO  0x10
535 #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */
536 #define IDE_RETRY_READ  0x20
537 #define IDE_RETRY_FLUSH 0x40
538 #define IDE_RETRY_TRIM 0x80
539 #define IDE_RETRY_HBA  0x100
540 
541 #define IS_IDE_RETRY_DMA(_status) \
542     ((_status) & IDE_RETRY_DMA)
543 
544 #define IS_IDE_RETRY_PIO(_status) \
545     ((_status) & IDE_RETRY_PIO)
546 
547 /*
548  * The method of the IDE_RETRY_ATAPI determination is to use a previously
549  * impossible bit combination as a new status value.
550  */
551 #define IS_IDE_RETRY_ATAPI(_status)   \
552     (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI)
553 
554 static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd)
555 {
556     switch (dma_cmd) {
557     case IDE_DMA_READ:
558         return IDE_RETRY_DMA | IDE_RETRY_READ;
559     case IDE_DMA_WRITE:
560         return IDE_RETRY_DMA;
561     case IDE_DMA_TRIM:
562         return IDE_RETRY_DMA | IDE_RETRY_TRIM;
563     case IDE_DMA_ATAPI:
564         return IDE_RETRY_ATAPI;
565     default:
566         break;
567     }
568     return 0;
569 }
570 
571 static inline IDEState *idebus_active_if(IDEBus *bus)
572 {
573     return bus->ifs + bus->unit;
574 }
575 
576 static inline void ide_set_irq(IDEBus *bus)
577 {
578     if (!(bus->cmd & IDE_CTRL_DISABLE_IRQ)) {
579         qemu_irq_raise(bus->irq);
580     }
581 }
582 
583 /* hw/ide/core.c */
584 extern const VMStateDescription vmstate_ide_bus;
585 
586 #define VMSTATE_IDE_BUS(_field, _state)                          \
587     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus)
588 
589 #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num)              \
590     VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus)
591 
592 extern const VMStateDescription vmstate_ide_drive;
593 
594 #define VMSTATE_IDE_DRIVES(_field, _state) \
595     VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState)
596 
597 #define VMSTATE_IDE_DRIVE(_field, _state) \
598     VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState)
599 
600 void ide_bus_reset(IDEBus *bus);
601 int64_t ide_get_sector(IDEState *s);
602 void ide_set_sector(IDEState *s, int64_t sector_num);
603 
604 void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
605 void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
606 void ide_dma_error(IDEState *s);
607 void ide_abort_command(IDEState *s);
608 
609 void ide_atapi_cmd_ok(IDEState *s);
610 void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc);
611 void ide_atapi_dma_restart(IDEState *s);
612 void ide_atapi_io_error(IDEState *s, int ret);
613 
614 void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
615 uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
616 uint32_t ide_status_read(void *opaque, uint32_t addr);
617 void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val);
618 void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
619 uint32_t ide_data_readw(void *opaque, uint32_t addr);
620 void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
621 uint32_t ide_data_readl(void *opaque, uint32_t addr);
622 
623 int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind,
624                    const char *version, const char *serial, const char *model,
625                    uint64_t wwn,
626                    uint32_t cylinders, uint32_t heads, uint32_t secs,
627                    int chs_trans, Error **errp);
628 void ide_init2(IDEBus *bus, qemu_irq irq);
629 void ide_exit(IDEState *s);
630 int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2);
631 void ide_register_restart_cb(IDEBus *bus);
632 
633 void ide_exec_cmd(IDEBus *bus, uint32_t val);
634 
635 void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
636                         EndTransferFunc *end_transfer_func);
637 bool ide_transfer_start_norecurse(IDEState *s, uint8_t *buf, int size,
638                                   EndTransferFunc *end_transfer_func);
639 void ide_transfer_stop(IDEState *s);
640 void ide_set_inactive(IDEState *s, bool more);
641 BlockAIOCB *ide_issue_trim(
642         int64_t offset, QEMUIOVector *qiov,
643         BlockCompletionFunc *cb, void *cb_opaque, void *opaque);
644 BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num,
645                                QEMUIOVector *iov, int nb_sectors,
646                                BlockCompletionFunc *cb, void *opaque);
647 void ide_cancel_dma_sync(IDEState *s);
648 
649 /* hw/ide/atapi.c */
650 void ide_atapi_cmd(IDEState *s);
651 void ide_atapi_cmd_reply_end(IDEState *s);
652 
653 /* hw/ide/qdev.c */
654 void ide_bus_init(IDEBus *idebus, size_t idebus_size, DeviceState *dev,
655                   int bus_id, int max_units);
656 IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
657 
658 int ide_handle_rw_error(IDEState *s, int error, int op);
659 
660 #endif /* HW_IDE_INTERNAL_H */
661