xref: /openbmc/qemu/include/hw/i3c/dw-i3c.h (revision c52aaabd801db3b37b3d352fb76ffb7c03271b7a)
1 /*
2  * DesignWare I3C Controller
3  *
4  * Copyright (C) 2021 ASPEED Technology Inc.
5  * Copyright (C) 2025 Google, LLC.
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  */
9 
10 #ifndef DW_I3C_H
11 #define DW_I3C_H
12 
13 #include "hw/sysbus.h"
14 
15 #define TYPE_DW_I3C "dw.i3c"
16 OBJECT_DECLARE_SIMPLE_TYPE(DWI3C, DW_I3C)
17 
18 #define DW_I3C_NR_REGS (0x300 >> 2)
19 
20 typedef struct DWI3C {
21     /* <private> */
22     SysBusDevice parent;
23 
24     /* <public> */
25     MemoryRegion mr;
26     qemu_irq irq;
27 
28     uint8_t id;
29     uint32_t regs[DW_I3C_NR_REGS];
30 } DWI3C;
31 
32 /* Extern for other controllers that use DesignWare I3C. */
33 extern const VMStateDescription vmstate_dw_i3c;
34 
35 #endif /* DW_I3C_H */
36