1 /* 2 * ASPEED I3C Controller 3 * 4 * Copyright (C) 2021 ASPEED Technology Inc. 5 * 6 * This code is licensed under the GPL version 2 or later. See 7 * the COPYING file in the top-level directory. 8 */ 9 10 #ifndef ASPEED_I3C_H 11 #define ASPEED_I3C_H 12 13 #include "hw/i3c/dw-i3c.h" 14 #include "hw/sysbus.h" 15 16 #define TYPE_ASPEED_I3C "aspeed.i3c" 17 OBJECT_DECLARE_TYPE(AspeedI3CState, AspeedI3CClass, ASPEED_I3C) 18 19 #define ASPEED_I3C_NR_REGS (0x70 >> 2) 20 #define ASPEED_I3C_NR_DEVICES 6 21 22 typedef struct AspeedI3CState { 23 /* <private> */ 24 SysBusDevice parent; 25 26 /* <public> */ 27 MemoryRegion iomem; 28 MemoryRegion iomem_container; 29 qemu_irq irq; 30 31 uint32_t regs[ASPEED_I3C_NR_REGS]; 32 DWI3C devices[ASPEED_I3C_NR_DEVICES]; 33 uint8_t id; 34 } AspeedI3CState; 35 #endif /* ASPEED_I3C_H */ 36