xref: /openbmc/qemu/include/hw/i386/x86.h (revision 9d779187)
1 /*
2  * Copyright (c) 2019 Red Hat, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2 or later, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along with
14  * this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16 
17 #ifndef HW_I386_X86_H
18 #define HW_I386_X86_H
19 
20 #include "exec/hwaddr.h"
21 #include "exec/memory.h"
22 
23 #include "hw/boards.h"
24 #include "hw/i386/topology.h"
25 #include "hw/intc/ioapic.h"
26 #include "hw/isa/isa.h"
27 #include "qom/object.h"
28 
29 struct X86MachineClass {
30     /*< private >*/
31     MachineClass parent;
32 
33     /*< public >*/
34 
35     /* TSC rate migration: */
36     bool save_tsc_khz;
37     /* use DMA capable linuxboot option rom */
38     bool fwcfg_dma_enabled;
39     /* CPU and apic information: */
40     bool apic_xrupt_override;
41 };
42 
43 struct X86MachineState {
44     /*< private >*/
45     MachineState parent;
46 
47     /*< public >*/
48 
49     /* Pointers to devices and objects: */
50     ISADevice *rtc;
51     FWCfgState *fw_cfg;
52     qemu_irq *gsi;
53     DeviceState *ioapic2;
54     GMappedFile *initrd_mapped_file;
55     HotplugHandler *acpi_dev;
56 
57     /*
58      * Map the whole BIOS just underneath the 4 GiB address boundary. Only used
59      * in the ROM (-bios) case.
60      */
61     MemoryRegion bios;
62 
63     /*
64      * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address
65      * boundary.
66      */
67     MemoryRegion isa_bios;
68 
69     /* RAM information (sizes, addresses, configuration): */
70     ram_addr_t below_4g_mem_size, above_4g_mem_size;
71 
72     /* Start address of the initial RAM above 4G */
73     uint64_t above_4g_mem_start;
74 
75     /* CPU and apic information: */
76     unsigned pci_irq_mask;
77     unsigned apic_id_limit;
78     uint16_t boot_cpus;
79     SgxEPCList *sgx_epc_list;
80 
81     OnOffAuto smm;
82     OnOffAuto acpi;
83     OnOffAuto pit;
84     OnOffAuto pic;
85 
86     char *oem_id;
87     char *oem_table_id;
88     /*
89      * Address space used by IOAPIC device. All IOAPIC interrupts
90      * will be translated to MSI messages in the address space.
91      */
92     AddressSpace *ioapic_as;
93 
94     /*
95      * Ratelimit enforced on detected bus locks in guest.
96      * The default value of the bus_lock_ratelimit is 0 per second,
97      * which means no limitation on the guest's bus locks.
98      */
99     uint64_t bus_lock_ratelimit;
100 };
101 
102 #define X86_MACHINE_SMM              "smm"
103 #define X86_MACHINE_ACPI             "acpi"
104 #define X86_MACHINE_PIT              "pit"
105 #define X86_MACHINE_PIC              "pic"
106 #define X86_MACHINE_OEM_ID           "x-oem-id"
107 #define X86_MACHINE_OEM_TABLE_ID     "x-oem-table-id"
108 #define X86_MACHINE_BUS_LOCK_RATELIMIT  "bus-lock-ratelimit"
109 
110 #define TYPE_X86_MACHINE   MACHINE_TYPE_NAME("x86")
111 OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
112 
113 void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
114 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
115                                     unsigned int cpu_index);
116 
117 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
118 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count);
119 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
120                       DeviceState *dev, Error **errp);
121 void x86_cpu_plug(HotplugHandler *hotplug_dev,
122                   DeviceState *dev, Error **errp);
123 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
124                                DeviceState *dev, Error **errp);
125 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev,
126                        DeviceState *dev, Error **errp);
127 
128 void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory,
129                        MemoryRegion *bios, bool read_only);
130 void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware,
131                        MemoryRegion *rom_memory, bool isapc_ram_fw);
132 
133 void x86_load_linux(X86MachineState *x86ms,
134                     FWCfgState *fw_cfg,
135                     int acpi_data_size,
136                     bool pvh_enabled);
137 
138 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms);
139 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
140 
141 /* Global System Interrupts */
142 
143 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
144 
145 typedef struct GSIState {
146     qemu_irq i8259_irq[ISA_NUM_IRQS];
147     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
148     qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
149 } GSIState;
150 
151 qemu_irq x86_allocate_cpu_irq(void);
152 void gsi_handler(void *opaque, int n, int level);
153 void ioapic_init_gsi(GSIState *gsi_state, Object *parent);
154 DeviceState *ioapic_init_secondary(GSIState *gsi_state);
155 
156 /* pc_sysfw.c */
157 void x86_firmware_configure(hwaddr gpa, void *ptr, int size);
158 
159 #endif
160