xref: /openbmc/qemu/include/hw/i386/x86-iommu.h (revision 9c4888c9)
1 /*
2  * Common IOMMU interface for X86 platform
3  *
4  * Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10 
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15 
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef HW_I386_X86_IOMMU_H
21 #define HW_I386_X86_IOMMU_H
22 
23 #include "hw/sysbus.h"
24 #include "hw/pci/pci.h"
25 #include "hw/pci/msi.h"
26 #include "qom/object.h"
27 
28 #define  TYPE_X86_IOMMU_DEVICE  ("x86-iommu")
29 OBJECT_DECLARE_TYPE(X86IOMMUState, X86IOMMUClass, X86_IOMMU_DEVICE)
30 
31 #define X86_IOMMU_SID_INVALID             (0xffff)
32 
33 typedef struct X86IOMMUIrq X86IOMMUIrq;
34 typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage;
35 
36 struct X86IOMMUClass {
37     SysBusDeviceClass parent;
38     /* Intel/AMD specific realize() hook */
39     DeviceRealize realize;
40     /* MSI-based interrupt remapping */
41     int (*int_remap)(X86IOMMUState *iommu, MSIMessage *src,
42                      MSIMessage *dst, uint16_t sid);
43 };
44 
45 /**
46  * iec_notify_fn - IEC (Interrupt Entry Cache) notifier hook,
47  *                 triggered when IR invalidation happens.
48  * @private: private data
49  * @global: whether this is a global IEC invalidation
50  * @index: IRTE index to invalidate (start from)
51  * @mask: invalidation mask
52  */
53 typedef void (*iec_notify_fn)(void *private, bool global,
54                               uint32_t index, uint32_t mask);
55 
56 struct IEC_Notifier {
57     iec_notify_fn iec_notify;
58     void *private;
59     QLIST_ENTRY(IEC_Notifier) list;
60 };
61 typedef struct IEC_Notifier IEC_Notifier;
62 
63 struct X86IOMMUState {
64     SysBusDevice busdev;
65     OnOffAuto intr_supported;   /* Whether vIOMMU supports IR */
66     bool dt_supported;          /* Whether vIOMMU supports DT */
67     bool pt_supported;          /* Whether vIOMMU supports pass-through */
68     QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
69 };
70 
71 bool x86_iommu_ir_supported(X86IOMMUState *s);
72 
73 /* Generic IRQ entry information when interrupt remapping is enabled */
74 struct X86IOMMUIrq {
75     /* Used by both IOAPIC/MSI interrupt remapping */
76     uint8_t trigger_mode;
77     uint8_t vector;
78     uint8_t delivery_mode;
79     uint32_t dest;
80     uint8_t dest_mode;
81 
82     /* only used by MSI interrupt remapping */
83     uint8_t redir_hint;
84     uint8_t msi_addr_last_bits;
85 };
86 
87 struct X86IOMMU_MSIMessage {
88     union {
89         struct {
90 #if HOST_BIG_ENDIAN
91             uint32_t __addr_head:12; /* 0xfee */
92             uint32_t dest:8;
93             uint32_t __reserved:8;
94             uint32_t redir_hint:1;
95             uint32_t dest_mode:1;
96             uint32_t __not_used:2;
97 #else
98             uint32_t __not_used:2;
99             uint32_t dest_mode:1;
100             uint32_t redir_hint:1;
101             uint32_t __reserved:8;
102             uint32_t dest:8;
103             uint32_t __addr_head:12; /* 0xfee */
104 #endif
105             uint32_t __addr_hi;
106         } QEMU_PACKED;
107         uint64_t msi_addr;
108     };
109     union {
110         struct {
111 #if HOST_BIG_ENDIAN
112             uint16_t trigger_mode:1;
113             uint16_t level:1;
114             uint16_t __resved:3;
115             uint16_t delivery_mode:3;
116             uint16_t vector:8;
117 #else
118             uint16_t vector:8;
119             uint16_t delivery_mode:3;
120             uint16_t __resved:3;
121             uint16_t level:1;
122             uint16_t trigger_mode:1;
123 #endif
124             uint16_t __resved1;
125         } QEMU_PACKED;
126         uint32_t msi_data;
127     };
128 };
129 
130 /**
131  * x86_iommu_get_default - get default IOMMU device
132  * @return: pointer to default IOMMU device
133  */
134 X86IOMMUState *x86_iommu_get_default(void);
135 
136 /**
137  * x86_iommu_iec_register_notifier - register IEC (Interrupt Entry
138  *                                   Cache) notifiers
139  * @iommu: IOMMU device to register
140  * @fn: IEC notifier hook function
141  * @data: notifier private data
142  */
143 void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
144                                      iec_notify_fn fn, void *data);
145 
146 /**
147  * x86_iommu_iec_notify_all - Notify IEC invalidations
148  * @iommu: IOMMU device that sends the notification
149  * @global: whether this is a global invalidation. If true, @index
150  *          and @mask are undefined.
151  * @index: starting index of interrupt entry to invalidate
152  * @mask: index mask for the invalidation
153  */
154 void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
155                               uint32_t index, uint32_t mask);
156 
157 /**
158  * x86_iommu_irq_to_msi_message - Populate one MSIMessage from X86IOMMUIrq
159  * @X86IOMMUIrq: The IRQ information
160  * @out: Output MSI message
161  */
162 void x86_iommu_irq_to_msi_message(X86IOMMUIrq *irq, MSIMessage *out);
163 #endif
164