1 /* 2 * x86 CPU topology data structures and functions 3 * 4 * Copyright (c) 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #ifndef HW_I386_TOPOLOGY_H 25 #define HW_I386_TOPOLOGY_H 26 27 /* This file implements the APIC-ID-based CPU topology enumeration logic, 28 * documented at the following document: 29 * Intel® 64 Architecture Processor Topology Enumeration 30 * http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration/ 31 * 32 * This code should be compatible with AMD's "Extended Method" described at: 33 * AMD CPUID Specification (Publication #25481) 34 * Section 3: Multiple Core Calcuation 35 * as long as: 36 * nr_threads is set to 1; 37 * OFFSET_IDX is assumed to be 0; 38 * CPUID Fn8000_0008_ECX[ApicIdCoreIdSize[3:0]] is set to apicid_core_width(). 39 */ 40 41 42 #include "qemu/bitops.h" 43 44 /* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support 45 */ 46 typedef uint32_t apic_id_t; 47 48 typedef struct X86CPUTopoInfo { 49 unsigned pkg_id; 50 unsigned core_id; 51 unsigned smt_id; 52 } X86CPUTopoInfo; 53 54 /* Return the bit width needed for 'count' IDs 55 */ 56 static unsigned apicid_bitwidth_for_count(unsigned count) 57 { 58 g_assert(count >= 1); 59 count -= 1; 60 return count ? 32 - clz32(count) : 0; 61 } 62 63 /* Bit width of the SMT_ID (thread ID) field on the APIC ID 64 */ 65 static inline unsigned apicid_smt_width(unsigned nr_cores, unsigned nr_threads) 66 { 67 return apicid_bitwidth_for_count(nr_threads); 68 } 69 70 /* Bit width of the Core_ID field 71 */ 72 static inline unsigned apicid_core_width(unsigned nr_cores, unsigned nr_threads) 73 { 74 return apicid_bitwidth_for_count(nr_cores); 75 } 76 77 /* Bit offset of the Core_ID field 78 */ 79 static inline unsigned apicid_core_offset(unsigned nr_cores, 80 unsigned nr_threads) 81 { 82 return apicid_smt_width(nr_cores, nr_threads); 83 } 84 85 /* Bit offset of the Pkg_ID (socket ID) field 86 */ 87 static inline unsigned apicid_pkg_offset(unsigned nr_cores, unsigned nr_threads) 88 { 89 return apicid_core_offset(nr_cores, nr_threads) + 90 apicid_core_width(nr_cores, nr_threads); 91 } 92 93 /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID 94 * 95 * The caller must make sure core_id < nr_cores and smt_id < nr_threads. 96 */ 97 static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores, 98 unsigned nr_threads, 99 const X86CPUTopoInfo *topo) 100 { 101 return (topo->pkg_id << apicid_pkg_offset(nr_cores, nr_threads)) | 102 (topo->core_id << apicid_core_offset(nr_cores, nr_threads)) | 103 topo->smt_id; 104 } 105 106 /* Calculate thread/core/package IDs for a specific topology, 107 * based on (contiguous) CPU index 108 */ 109 static inline void x86_topo_ids_from_idx(unsigned nr_cores, 110 unsigned nr_threads, 111 unsigned cpu_index, 112 X86CPUTopoInfo *topo) 113 { 114 unsigned core_index = cpu_index / nr_threads; 115 topo->smt_id = cpu_index % nr_threads; 116 topo->core_id = core_index % nr_cores; 117 topo->pkg_id = core_index / nr_cores; 118 } 119 120 /* Calculate thread/core/package IDs for a specific topology, 121 * based on APIC ID 122 */ 123 static inline void x86_topo_ids_from_apicid(apic_id_t apicid, 124 unsigned nr_cores, 125 unsigned nr_threads, 126 X86CPUTopoInfo *topo) 127 { 128 topo->smt_id = apicid & 129 ~(0xFFFFFFFFUL << apicid_smt_width(nr_cores, nr_threads)); 130 topo->core_id = (apicid >> apicid_core_offset(nr_cores, nr_threads)) & 131 ~(0xFFFFFFFFUL << apicid_core_width(nr_cores, nr_threads)); 132 topo->pkg_id = apicid >> apicid_pkg_offset(nr_cores, nr_threads); 133 } 134 135 /* Make APIC ID for the CPU 'cpu_index' 136 * 137 * 'cpu_index' is a sequential, contiguous ID for the CPU. 138 */ 139 static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores, 140 unsigned nr_threads, 141 unsigned cpu_index) 142 { 143 X86CPUTopoInfo topo; 144 x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo); 145 return apicid_from_topo_ids(nr_cores, nr_threads, &topo); 146 } 147 148 #endif /* HW_I386_TOPOLOGY_H */ 149