1 /* 2 * SGX EPC device 3 * 4 * Copyright (C) 2019 Intel Corporation 5 * 6 * Authors: 7 * Sean Christopherson <sean.j.christopherson@intel.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 #ifndef QEMU_SGX_EPC_H 13 #define QEMU_SGX_EPC_H 14 15 #include "hw/i386/hostmem-epc.h" 16 17 #define TYPE_SGX_EPC "sgx-epc" 18 #define SGX_EPC(obj) \ 19 OBJECT_CHECK(SGXEPCDevice, (obj), TYPE_SGX_EPC) 20 #define SGX_EPC_CLASS(oc) \ 21 OBJECT_CLASS_CHECK(SGXEPCDeviceClass, (oc), TYPE_SGX_EPC) 22 #define SGX_EPC_GET_CLASS(obj) \ 23 OBJECT_GET_CLASS(SGXEPCDeviceClass, (obj), TYPE_SGX_EPC) 24 25 #define SGX_EPC_ADDR_PROP "addr" 26 #define SGX_EPC_SIZE_PROP "size" 27 #define SGX_EPC_MEMDEV_PROP "memdev" 28 #define SGX_EPC_NUMA_NODE_PROP "node" 29 30 /** 31 * SGXEPCDevice: 32 * @addr: starting guest physical address, where @SGXEPCDevice is mapped. 33 * Default value: 0, means that address is auto-allocated. 34 * @hostmem: host memory backend providing memory for @SGXEPCDevice 35 */ 36 typedef struct SGXEPCDevice { 37 /* private */ 38 DeviceState parent_obj; 39 40 /* public */ 41 uint64_t addr; 42 uint32_t node; 43 HostMemoryBackendEpc *hostmem; 44 } SGXEPCDevice; 45 46 /* 47 * @base: address in guest physical address space where EPC regions start 48 * @mr: address space container for memory devices 49 */ 50 typedef struct SGXEPCState { 51 uint64_t base; 52 uint64_t size; 53 54 MemoryRegion mr; 55 56 struct SGXEPCDevice **sections; 57 int nr_sections; 58 } SGXEPCState; 59 60 bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size); 61 void sgx_epc_build_srat(GArray *table_data); 62 63 static inline uint64_t sgx_epc_above_4g_end(SGXEPCState *sgx_epc) 64 { 65 assert(sgx_epc != NULL && sgx_epc->base >= 0x100000000ULL); 66 67 return sgx_epc->base + sgx_epc->size; 68 } 69 70 #endif 71