1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus_enabled; 53 bool sata_enabled; 54 bool pit_enabled; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 /* Global System Interrupts */ 158 159 #define GSI_NUM_PINS IOAPIC_NUM_PINS 160 161 typedef struct GSIState { 162 qemu_irq i8259_irq[ISA_NUM_IRQS]; 163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 164 } GSIState; 165 166 void gsi_handler(void *opaque, int n, int level); 167 168 /* vmport.c */ 169 #define TYPE_VMPORT "vmport" 170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 171 172 static inline void vmport_init(ISABus *bus) 173 { 174 isa_create_simple(bus, TYPE_VMPORT); 175 } 176 177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 178 void vmmouse_get_data(uint32_t *data); 179 void vmmouse_set_data(const uint32_t *data); 180 181 /* pc.c */ 182 extern int fd_bootchk; 183 184 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 185 void pc_register_ferr_irq(qemu_irq irq); 186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 187 188 void pc_cpus_init(PCMachineState *pcms); 189 void pc_hot_add_cpu(const int64_t id, Error **errp); 190 void pc_acpi_init(const char *default_dsdt); 191 192 void pc_guest_info_init(PCMachineState *pcms); 193 194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 201 202 203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 204 MemoryRegion *pci_address_space); 205 206 void xen_load_linux(PCMachineState *pcms); 207 void pc_memory_init(PCMachineState *pcms, 208 MemoryRegion *system_memory, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory); 211 uint64_t pc_pci_hole64_start(void); 212 qemu_irq pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 bool create_fdctrl, 217 bool no_vmport, 218 bool has_pit, 219 uint32_t hpet_irqs); 220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 221 void pc_cmos_init(PCMachineState *pcms, 222 BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 230 231 ISADevice *pc_find_fdc0(void); 232 int cmos_get_fd_drive_type(FloppyDriveType fd0); 233 234 #define FW_CFG_IO_BASE 0x510 235 236 #define PORT92_A20_LINE "a20" 237 238 /* acpi_piix.c */ 239 240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 241 qemu_irq sci_irq, qemu_irq smi_irq, 242 int smm_enabled, DeviceState **piix4_pm); 243 244 /* hpet.c */ 245 extern int no_hpet; 246 247 /* piix_pci.c */ 248 struct PCII440FXState; 249 typedef struct PCII440FXState PCII440FXState; 250 251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 252 #define TYPE_I440FX_PCI_DEVICE "i440FX" 253 254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 255 256 /* 257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 259 */ 260 #define RCR_IOPORT 0xcf9 261 262 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 263 PCII440FXState **pi440fx_state, int *piix_devfn, 264 ISABus **isa_bus, qemu_irq *pic, 265 MemoryRegion *address_space_mem, 266 MemoryRegion *address_space_io, 267 ram_addr_t ram_size, 268 ram_addr_t below_4g_mem_size, 269 ram_addr_t above_4g_mem_size, 270 MemoryRegion *pci_memory, 271 MemoryRegion *ram_memory); 272 273 PCIBus *find_i440fx(void); 274 /* piix4.c */ 275 extern PCIDevice *piix4_dev; 276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 277 278 /* pc_sysfw.c */ 279 void pc_system_firmware_init(MemoryRegion *rom_memory, 280 bool isapc_ram_fw); 281 282 /* acpi-build.c */ 283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 284 const CPUArchIdList *apic_ids, GArray *entry); 285 286 /* e820 types */ 287 #define E820_RAM 1 288 #define E820_RESERVED 2 289 #define E820_ACPI 3 290 #define E820_NVS 4 291 #define E820_UNUSABLE 5 292 293 int e820_add_entry(uint64_t, uint64_t, uint32_t); 294 int e820_get_num_entries(void); 295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 296 297 extern GlobalProperty pc_compat_3_1[]; 298 extern const size_t pc_compat_3_1_len; 299 300 extern GlobalProperty pc_compat_3_0[]; 301 extern const size_t pc_compat_3_0_len; 302 303 extern GlobalProperty pc_compat_2_12[]; 304 extern const size_t pc_compat_2_12_len; 305 306 extern GlobalProperty pc_compat_2_11[]; 307 extern const size_t pc_compat_2_11_len; 308 309 extern GlobalProperty pc_compat_2_10[]; 310 extern const size_t pc_compat_2_10_len; 311 312 extern GlobalProperty pc_compat_2_9[]; 313 extern const size_t pc_compat_2_9_len; 314 315 extern GlobalProperty pc_compat_2_8[]; 316 extern const size_t pc_compat_2_8_len; 317 318 extern GlobalProperty pc_compat_2_7[]; 319 extern const size_t pc_compat_2_7_len; 320 321 extern GlobalProperty pc_compat_2_6[]; 322 extern const size_t pc_compat_2_6_len; 323 324 #define PC_COMPAT_2_5 \ 325 HW_COMPAT_2_5 326 327 /* Helper for setting model-id for CPU models that changed model-id 328 * depending on QEMU versions up to QEMU 2.4. 329 */ 330 #define PC_CPU_MODEL_IDS(v) \ 331 {\ 332 .driver = "qemu32-" TYPE_X86_CPU,\ 333 .property = "model-id",\ 334 .value = "QEMU Virtual CPU version " v,\ 335 },\ 336 {\ 337 .driver = "qemu64-" TYPE_X86_CPU,\ 338 .property = "model-id",\ 339 .value = "QEMU Virtual CPU version " v,\ 340 },\ 341 {\ 342 .driver = "athlon-" TYPE_X86_CPU,\ 343 .property = "model-id",\ 344 .value = "QEMU Virtual CPU version " v,\ 345 }, 346 347 #define PC_COMPAT_2_4 \ 348 HW_COMPAT_2_4 \ 349 PC_CPU_MODEL_IDS("2.4.0") \ 350 {\ 351 .driver = "Haswell-" TYPE_X86_CPU,\ 352 .property = "abm",\ 353 .value = "off",\ 354 },\ 355 {\ 356 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 357 .property = "abm",\ 358 .value = "off",\ 359 },\ 360 {\ 361 .driver = "Broadwell-" TYPE_X86_CPU,\ 362 .property = "abm",\ 363 .value = "off",\ 364 },\ 365 {\ 366 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 367 .property = "abm",\ 368 .value = "off",\ 369 },\ 370 {\ 371 .driver = "host" "-" TYPE_X86_CPU,\ 372 .property = "host-cache-info",\ 373 .value = "on",\ 374 },\ 375 {\ 376 .driver = TYPE_X86_CPU,\ 377 .property = "check",\ 378 .value = "off",\ 379 },\ 380 {\ 381 .driver = "qemu64" "-" TYPE_X86_CPU,\ 382 .property = "sse4a",\ 383 .value = "on",\ 384 },\ 385 {\ 386 .driver = "qemu64" "-" TYPE_X86_CPU,\ 387 .property = "abm",\ 388 .value = "on",\ 389 },\ 390 {\ 391 .driver = "qemu64" "-" TYPE_X86_CPU,\ 392 .property = "popcnt",\ 393 .value = "on",\ 394 },\ 395 {\ 396 .driver = "qemu32" "-" TYPE_X86_CPU,\ 397 .property = "popcnt",\ 398 .value = "on",\ 399 },{\ 400 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 401 .property = "rdtscp",\ 402 .value = "on",\ 403 },{\ 404 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 405 .property = "rdtscp",\ 406 .value = "on",\ 407 },{\ 408 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 409 .property = "rdtscp",\ 410 .value = "on",\ 411 },{\ 412 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 413 .property = "rdtscp",\ 414 .value = "on",\ 415 }, 416 417 418 #define PC_COMPAT_2_3 \ 419 HW_COMPAT_2_3 \ 420 PC_CPU_MODEL_IDS("2.3.0") \ 421 {\ 422 .driver = TYPE_X86_CPU,\ 423 .property = "arat",\ 424 .value = "off",\ 425 },{\ 426 .driver = "qemu64" "-" TYPE_X86_CPU,\ 427 .property = "min-level",\ 428 .value = stringify(4),\ 429 },{\ 430 .driver = "kvm64" "-" TYPE_X86_CPU,\ 431 .property = "min-level",\ 432 .value = stringify(5),\ 433 },{\ 434 .driver = "pentium3" "-" TYPE_X86_CPU,\ 435 .property = "min-level",\ 436 .value = stringify(2),\ 437 },{\ 438 .driver = "n270" "-" TYPE_X86_CPU,\ 439 .property = "min-level",\ 440 .value = stringify(5),\ 441 },{\ 442 .driver = "Conroe" "-" TYPE_X86_CPU,\ 443 .property = "min-level",\ 444 .value = stringify(4),\ 445 },{\ 446 .driver = "Penryn" "-" TYPE_X86_CPU,\ 447 .property = "min-level",\ 448 .value = stringify(4),\ 449 },{\ 450 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 451 .property = "min-level",\ 452 .value = stringify(4),\ 453 },{\ 454 .driver = "n270" "-" TYPE_X86_CPU,\ 455 .property = "min-xlevel",\ 456 .value = stringify(0x8000000a),\ 457 },{\ 458 .driver = "Penryn" "-" TYPE_X86_CPU,\ 459 .property = "min-xlevel",\ 460 .value = stringify(0x8000000a),\ 461 },{\ 462 .driver = "Conroe" "-" TYPE_X86_CPU,\ 463 .property = "min-xlevel",\ 464 .value = stringify(0x8000000a),\ 465 },{\ 466 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 467 .property = "min-xlevel",\ 468 .value = stringify(0x8000000a),\ 469 },{\ 470 .driver = "Westmere" "-" TYPE_X86_CPU,\ 471 .property = "min-xlevel",\ 472 .value = stringify(0x8000000a),\ 473 },{\ 474 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 475 .property = "min-xlevel",\ 476 .value = stringify(0x8000000a),\ 477 },{\ 478 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 479 .property = "min-xlevel",\ 480 .value = stringify(0x8000000a),\ 481 },{\ 482 .driver = "Haswell" "-" TYPE_X86_CPU,\ 483 .property = "min-xlevel",\ 484 .value = stringify(0x8000000a),\ 485 },{\ 486 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 487 .property = "min-xlevel",\ 488 .value = stringify(0x8000000a),\ 489 },{\ 490 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 491 .property = "min-xlevel",\ 492 .value = stringify(0x8000000a),\ 493 },{\ 494 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 495 .property = "min-xlevel",\ 496 .value = stringify(0x8000000a),\ 497 },{\ 498 .driver = TYPE_X86_CPU,\ 499 .property = "kvm-no-smi-migration",\ 500 .value = "on",\ 501 }, 502 503 #define PC_COMPAT_2_2 \ 504 HW_COMPAT_2_2 \ 505 PC_CPU_MODEL_IDS("2.2.0") \ 506 {\ 507 .driver = "kvm64" "-" TYPE_X86_CPU,\ 508 .property = "vme",\ 509 .value = "off",\ 510 },\ 511 {\ 512 .driver = "kvm32" "-" TYPE_X86_CPU,\ 513 .property = "vme",\ 514 .value = "off",\ 515 },\ 516 {\ 517 .driver = "Conroe" "-" TYPE_X86_CPU,\ 518 .property = "vme",\ 519 .value = "off",\ 520 },\ 521 {\ 522 .driver = "Penryn" "-" TYPE_X86_CPU,\ 523 .property = "vme",\ 524 .value = "off",\ 525 },\ 526 {\ 527 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 528 .property = "vme",\ 529 .value = "off",\ 530 },\ 531 {\ 532 .driver = "Westmere" "-" TYPE_X86_CPU,\ 533 .property = "vme",\ 534 .value = "off",\ 535 },\ 536 {\ 537 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 538 .property = "vme",\ 539 .value = "off",\ 540 },\ 541 {\ 542 .driver = "Haswell" "-" TYPE_X86_CPU,\ 543 .property = "vme",\ 544 .value = "off",\ 545 },\ 546 {\ 547 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 548 .property = "vme",\ 549 .value = "off",\ 550 },\ 551 {\ 552 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 553 .property = "vme",\ 554 .value = "off",\ 555 },\ 556 {\ 557 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 558 .property = "vme",\ 559 .value = "off",\ 560 },\ 561 {\ 562 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 563 .property = "vme",\ 564 .value = "off",\ 565 },\ 566 {\ 567 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 568 .property = "vme",\ 569 .value = "off",\ 570 },\ 571 {\ 572 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 573 .property = "vme",\ 574 .value = "off",\ 575 },\ 576 {\ 577 .driver = "Haswell" "-" TYPE_X86_CPU,\ 578 .property = "f16c",\ 579 .value = "off",\ 580 },\ 581 {\ 582 .driver = "Haswell" "-" TYPE_X86_CPU,\ 583 .property = "rdrand",\ 584 .value = "off",\ 585 },\ 586 {\ 587 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 588 .property = "f16c",\ 589 .value = "off",\ 590 },\ 591 {\ 592 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 593 .property = "rdrand",\ 594 .value = "off",\ 595 }, 596 597 #define PC_COMPAT_2_1 \ 598 HW_COMPAT_2_1 \ 599 PC_CPU_MODEL_IDS("2.1.0") \ 600 {\ 601 .driver = "coreduo" "-" TYPE_X86_CPU,\ 602 .property = "vmx",\ 603 .value = "on",\ 604 },\ 605 {\ 606 .driver = "core2duo" "-" TYPE_X86_CPU,\ 607 .property = "vmx",\ 608 .value = "on",\ 609 }, 610 611 #define PC_COMPAT_2_0 \ 612 PC_CPU_MODEL_IDS("2.0.0") \ 613 {\ 614 .driver = "virtio-scsi-pci",\ 615 .property = "any_layout",\ 616 .value = "off",\ 617 },{\ 618 .driver = "PIIX4_PM",\ 619 .property = "memory-hotplug-support",\ 620 .value = "off",\ 621 },\ 622 {\ 623 .driver = "apic",\ 624 .property = "version",\ 625 .value = stringify(0x11),\ 626 },\ 627 {\ 628 .driver = "nec-usb-xhci",\ 629 .property = "superspeed-ports-first",\ 630 .value = "off",\ 631 },\ 632 {\ 633 .driver = "nec-usb-xhci",\ 634 .property = "force-pcie-endcap",\ 635 .value = "on",\ 636 },\ 637 {\ 638 .driver = "pci-serial",\ 639 .property = "prog_if",\ 640 .value = stringify(0),\ 641 },\ 642 {\ 643 .driver = "pci-serial-2x",\ 644 .property = "prog_if",\ 645 .value = stringify(0),\ 646 },\ 647 {\ 648 .driver = "pci-serial-4x",\ 649 .property = "prog_if",\ 650 .value = stringify(0),\ 651 },\ 652 {\ 653 .driver = "virtio-net-pci",\ 654 .property = "guest_announce",\ 655 .value = "off",\ 656 },\ 657 {\ 658 .driver = "ICH9-LPC",\ 659 .property = "memory-hotplug-support",\ 660 .value = "off",\ 661 },{\ 662 .driver = "xio3130-downstream",\ 663 .property = COMPAT_PROP_PCP,\ 664 .value = "off",\ 665 },{\ 666 .driver = "ioh3420",\ 667 .property = COMPAT_PROP_PCP,\ 668 .value = "off",\ 669 }, 670 671 #define PC_COMPAT_1_7 \ 672 PC_CPU_MODEL_IDS("1.7.0") \ 673 {\ 674 .driver = TYPE_USB_DEVICE,\ 675 .property = "msos-desc",\ 676 .value = "no",\ 677 },\ 678 {\ 679 .driver = "PIIX4_PM",\ 680 .property = "acpi-pci-hotplug-with-bridge-support",\ 681 .value = "off",\ 682 },\ 683 {\ 684 .driver = "hpet",\ 685 .property = HPET_INTCAP,\ 686 .value = stringify(4),\ 687 }, 688 689 #define PC_COMPAT_1_6 \ 690 PC_CPU_MODEL_IDS("1.6.0") \ 691 {\ 692 .driver = "e1000",\ 693 .property = "mitigation",\ 694 .value = "off",\ 695 },{\ 696 .driver = "qemu64-" TYPE_X86_CPU,\ 697 .property = "model",\ 698 .value = stringify(2),\ 699 },{\ 700 .driver = "qemu32-" TYPE_X86_CPU,\ 701 .property = "model",\ 702 .value = stringify(3),\ 703 },{\ 704 .driver = "i440FX-pcihost",\ 705 .property = "short_root_bus",\ 706 .value = stringify(1),\ 707 },{\ 708 .driver = "q35-pcihost",\ 709 .property = "short_root_bus",\ 710 .value = stringify(1),\ 711 }, 712 713 #define PC_COMPAT_1_5 \ 714 PC_CPU_MODEL_IDS("1.5.0") \ 715 {\ 716 .driver = "Conroe-" TYPE_X86_CPU,\ 717 .property = "model",\ 718 .value = stringify(2),\ 719 },{\ 720 .driver = "Conroe-" TYPE_X86_CPU,\ 721 .property = "min-level",\ 722 .value = stringify(2),\ 723 },{\ 724 .driver = "Penryn-" TYPE_X86_CPU,\ 725 .property = "model",\ 726 .value = stringify(2),\ 727 },{\ 728 .driver = "Penryn-" TYPE_X86_CPU,\ 729 .property = "min-level",\ 730 .value = stringify(2),\ 731 },{\ 732 .driver = "Nehalem-" TYPE_X86_CPU,\ 733 .property = "model",\ 734 .value = stringify(2),\ 735 },{\ 736 .driver = "Nehalem-" TYPE_X86_CPU,\ 737 .property = "min-level",\ 738 .value = stringify(2),\ 739 },{\ 740 .driver = "virtio-net-pci",\ 741 .property = "any_layout",\ 742 .value = "off",\ 743 },{\ 744 .driver = TYPE_X86_CPU,\ 745 .property = "pmu",\ 746 .value = "on",\ 747 },{\ 748 .driver = "i440FX-pcihost",\ 749 .property = "short_root_bus",\ 750 .value = stringify(0),\ 751 },{\ 752 .driver = "q35-pcihost",\ 753 .property = "short_root_bus",\ 754 .value = stringify(0),\ 755 }, 756 757 #define PC_COMPAT_1_4 \ 758 PC_CPU_MODEL_IDS("1.4.0") \ 759 {\ 760 .driver = "scsi-hd",\ 761 .property = "discard_granularity",\ 762 .value = stringify(0),\ 763 },{\ 764 .driver = "scsi-cd",\ 765 .property = "discard_granularity",\ 766 .value = stringify(0),\ 767 },{\ 768 .driver = "scsi-disk",\ 769 .property = "discard_granularity",\ 770 .value = stringify(0),\ 771 },{\ 772 .driver = "ide-hd",\ 773 .property = "discard_granularity",\ 774 .value = stringify(0),\ 775 },{\ 776 .driver = "ide-cd",\ 777 .property = "discard_granularity",\ 778 .value = stringify(0),\ 779 },{\ 780 .driver = "ide-drive",\ 781 .property = "discard_granularity",\ 782 .value = stringify(0),\ 783 },{\ 784 .driver = "virtio-blk-pci",\ 785 .property = "discard_granularity",\ 786 .value = stringify(0),\ 787 },{\ 788 .driver = "virtio-serial-pci",\ 789 .property = "vectors",\ 790 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 791 .value = stringify(0xFFFFFFFF),\ 792 },{ \ 793 .driver = "virtio-net-pci", \ 794 .property = "ctrl_guest_offloads", \ 795 .value = "off", \ 796 },{\ 797 .driver = "e1000",\ 798 .property = "romfile",\ 799 .value = "pxe-e1000.rom",\ 800 },{\ 801 .driver = "ne2k_pci",\ 802 .property = "romfile",\ 803 .value = "pxe-ne2k_pci.rom",\ 804 },{\ 805 .driver = "pcnet",\ 806 .property = "romfile",\ 807 .value = "pxe-pcnet.rom",\ 808 },{\ 809 .driver = "rtl8139",\ 810 .property = "romfile",\ 811 .value = "pxe-rtl8139.rom",\ 812 },{\ 813 .driver = "virtio-net-pci",\ 814 .property = "romfile",\ 815 .value = "pxe-virtio.rom",\ 816 },{\ 817 .driver = "486-" TYPE_X86_CPU,\ 818 .property = "model",\ 819 .value = stringify(0),\ 820 },\ 821 {\ 822 .driver = "n270" "-" TYPE_X86_CPU,\ 823 .property = "movbe",\ 824 .value = "off",\ 825 },\ 826 {\ 827 .driver = "Westmere" "-" TYPE_X86_CPU,\ 828 .property = "pclmulqdq",\ 829 .value = "off",\ 830 }, 831 832 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 833 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 834 { \ 835 MachineClass *mc = MACHINE_CLASS(oc); \ 836 optsfn(mc); \ 837 mc->init = initfn; \ 838 } \ 839 static const TypeInfo pc_machine_type_##suffix = { \ 840 .name = namestr TYPE_MACHINE_SUFFIX, \ 841 .parent = TYPE_PC_MACHINE, \ 842 .class_init = pc_machine_##suffix##_class_init, \ 843 }; \ 844 static void pc_machine_init_##suffix(void) \ 845 { \ 846 type_register(&pc_machine_type_##suffix); \ 847 } \ 848 type_init(pc_machine_init_##suffix) 849 850 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 851 #endif 852