xref: /openbmc/qemu/include/hw/i386/pc.h (revision effd60c8)
1 #ifndef HW_PC_H
2 #define HW_PC_H
3 
4 #include "qemu/notify.h"
5 #include "qapi/qapi-types-common.h"
6 #include "qemu/uuid.h"
7 #include "hw/boards.h"
8 #include "hw/block/fdc.h"
9 #include "hw/block/flash.h"
10 #include "hw/i386/x86.h"
11 
12 #include "hw/hotplug.h"
13 #include "qom/object.h"
14 #include "hw/i386/sgx-epc.h"
15 #include "hw/firmware/smbios.h"
16 #include "hw/cxl/cxl.h"
17 
18 #define HPET_INTCAP "hpet-intcap"
19 
20 /**
21  * PCMachineState:
22  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
23  * @boot_cpus: number of present VCPUs
24  */
25 typedef struct PCMachineState {
26     /*< private >*/
27     X86MachineState parent_obj;
28 
29     /* <public> */
30 
31     /* State for other subsystems/APIs: */
32     Notifier machine_done;
33 
34     /* Pointers to devices and objects: */
35     PCIBus *bus;
36     BusState *xenbus;
37     I2CBus *smbus;
38     PFlashCFI01 *flash[2];
39     ISADevice *pcspk;
40     DeviceState *iommu;
41 
42     /* Configuration options: */
43     uint64_t max_ram_below_4g;
44     OnOffAuto vmport;
45     SmbiosEntryPointType smbios_entry_point_type;
46     const char *south_bridge;
47 
48     bool acpi_build_enabled;
49     bool smbus_enabled;
50     bool sata_enabled;
51     bool hpet_enabled;
52     bool i8042_enabled;
53     bool default_bus_bypass_iommu;
54     uint64_t max_fw_size;
55 
56     /* ACPI Memory hotplug IO base address */
57     hwaddr memhp_io_base;
58 
59     SGXEPCState sgx_epc;
60     CXLState cxl_devices_state;
61 } PCMachineState;
62 
63 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
64 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
65 #define PC_MACHINE_VMPORT           "vmport"
66 #define PC_MACHINE_SMBUS            "smbus"
67 #define PC_MACHINE_SATA             "sata"
68 #define PC_MACHINE_I8042            "i8042"
69 #define PC_MACHINE_MAX_FW_SIZE      "max-fw-size"
70 #define PC_MACHINE_SMBIOS_EP        "smbios-entry-point-type"
71 
72 /**
73  * PCMachineClass:
74  *
75  * Compat fields:
76  *
77  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
78  *                        backend's alignment value if provided
79  * @acpi_data_size: Size of the chunk of memory at the top of RAM
80  *                  for the BIOS ACPI tables and other BIOS
81  *                  datastructures.
82  * @gigabyte_align: Make sure that guest addresses aligned at
83  *                  1Gbyte boundaries get mapped to host
84  *                  addresses aligned at 1Gbyte boundaries. This
85  *                  way we can use 1GByte pages in the host.
86  *
87  */
88 struct PCMachineClass {
89     /*< private >*/
90     X86MachineClass parent_class;
91 
92     /*< public >*/
93 
94     /* Device configuration: */
95     bool pci_enabled;
96     bool kvmclock_enabled;
97     const char *default_south_bridge;
98 
99     /* Compat options: */
100 
101     /* Default CPU model version.  See x86_cpu_set_default_version(). */
102     int default_cpu_version;
103 
104     /* ACPI compat: */
105     bool has_acpi_build;
106     bool rsdp_in_ram;
107     int legacy_acpi_table_size;
108     unsigned acpi_data_size;
109     int pci_root_uid;
110 
111     /* SMBIOS compat: */
112     bool smbios_defaults;
113     bool smbios_legacy_mode;
114     bool smbios_uuid_encoded;
115     SmbiosEntryPointType default_smbios_ep_type;
116 
117     /* RAM / address space compat: */
118     bool gigabyte_align;
119     bool has_reserved_memory;
120     bool enforce_aligned_dimm;
121     bool broken_reserved_end;
122     bool enforce_amd_1tb_hole;
123 
124     /* generate legacy CPU hotplug AML */
125     bool legacy_cpu_hotplug;
126 
127     /* use PVH to load kernels that support this feature */
128     bool pvh_enabled;
129 
130     /* create kvmclock device even when KVM PV features are not exposed */
131     bool kvmclock_create_always;
132 
133     /* resizable acpi blob compat */
134     bool resizable_acpi_blob;
135 
136     /*
137      * whether the machine type implements broken 32-bit address space bound
138      * check for memory.
139      */
140     bool broken_32bit_mem_addr_check;
141 };
142 
143 #define TYPE_PC_MACHINE "generic-pc-machine"
144 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
145 
146 /* ioapic.c */
147 
148 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
149 
150 /* pc.c */
151 extern int fd_bootchk;
152 
153 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
154 
155 void pc_guest_info_init(PCMachineState *pcms);
156 
157 #define PCI_HOST_PROP_RAM_MEM          "ram-mem"
158 #define PCI_HOST_PROP_PCI_MEM          "pci-mem"
159 #define PCI_HOST_PROP_SYSTEM_MEM       "system-mem"
160 #define PCI_HOST_PROP_IO_MEM           "io-mem"
161 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
162 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
163 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
164 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
165 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
166 #define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
167 #define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
168 
169 
170 void pc_pci_as_mapping_init(MemoryRegion *system_memory,
171                             MemoryRegion *pci_address_space);
172 
173 void xen_load_linux(PCMachineState *pcms);
174 void pc_memory_init(PCMachineState *pcms,
175                     MemoryRegion *system_memory,
176                     MemoryRegion *rom_memory,
177                     uint64_t pci_hole64_size);
178 uint64_t pc_pci_hole64_start(void);
179 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
180 void pc_basic_device_init(struct PCMachineState *pcms,
181                           ISABus *isa_bus, qemu_irq *gsi,
182                           ISADevice *rtc_state,
183                           bool create_fdctrl,
184                           uint32_t hpet_irqs);
185 void pc_cmos_init(PCMachineState *pcms,
186                   BusState *ide0, BusState *ide1,
187                   ISADevice *s);
188 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus,
189                  BusState *xen_bus);
190 
191 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
192 
193 /* port92.c */
194 #define PORT92_A20_LINE "a20"
195 
196 #define TYPE_PORT92 "port92"
197 
198 /* pc_sysfw.c */
199 void pc_system_flash_create(PCMachineState *pcms);
200 void pc_system_flash_cleanup_unused(PCMachineState *pcms);
201 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
202 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
203                                int *data_len);
204 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
205 
206 /* hw/i386/acpi-common.c */
207 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
208                        GArray *entry, bool force_enabled);
209 
210 /* sgx.c */
211 void pc_machine_init_sgx_epc(PCMachineState *pcms);
212 
213 extern GlobalProperty pc_compat_8_2[];
214 extern const size_t pc_compat_8_2_len;
215 
216 extern GlobalProperty pc_compat_8_1[];
217 extern const size_t pc_compat_8_1_len;
218 
219 extern GlobalProperty pc_compat_8_0[];
220 extern const size_t pc_compat_8_0_len;
221 
222 extern GlobalProperty pc_compat_7_2[];
223 extern const size_t pc_compat_7_2_len;
224 
225 extern GlobalProperty pc_compat_7_1[];
226 extern const size_t pc_compat_7_1_len;
227 
228 extern GlobalProperty pc_compat_7_0[];
229 extern const size_t pc_compat_7_0_len;
230 
231 extern GlobalProperty pc_compat_6_2[];
232 extern const size_t pc_compat_6_2_len;
233 
234 extern GlobalProperty pc_compat_6_1[];
235 extern const size_t pc_compat_6_1_len;
236 
237 extern GlobalProperty pc_compat_6_0[];
238 extern const size_t pc_compat_6_0_len;
239 
240 extern GlobalProperty pc_compat_5_2[];
241 extern const size_t pc_compat_5_2_len;
242 
243 extern GlobalProperty pc_compat_5_1[];
244 extern const size_t pc_compat_5_1_len;
245 
246 extern GlobalProperty pc_compat_5_0[];
247 extern const size_t pc_compat_5_0_len;
248 
249 extern GlobalProperty pc_compat_4_2[];
250 extern const size_t pc_compat_4_2_len;
251 
252 extern GlobalProperty pc_compat_4_1[];
253 extern const size_t pc_compat_4_1_len;
254 
255 extern GlobalProperty pc_compat_4_0[];
256 extern const size_t pc_compat_4_0_len;
257 
258 extern GlobalProperty pc_compat_3_1[];
259 extern const size_t pc_compat_3_1_len;
260 
261 extern GlobalProperty pc_compat_3_0[];
262 extern const size_t pc_compat_3_0_len;
263 
264 extern GlobalProperty pc_compat_2_12[];
265 extern const size_t pc_compat_2_12_len;
266 
267 extern GlobalProperty pc_compat_2_11[];
268 extern const size_t pc_compat_2_11_len;
269 
270 extern GlobalProperty pc_compat_2_10[];
271 extern const size_t pc_compat_2_10_len;
272 
273 extern GlobalProperty pc_compat_2_9[];
274 extern const size_t pc_compat_2_9_len;
275 
276 extern GlobalProperty pc_compat_2_8[];
277 extern const size_t pc_compat_2_8_len;
278 
279 extern GlobalProperty pc_compat_2_7[];
280 extern const size_t pc_compat_2_7_len;
281 
282 extern GlobalProperty pc_compat_2_6[];
283 extern const size_t pc_compat_2_6_len;
284 
285 extern GlobalProperty pc_compat_2_5[];
286 extern const size_t pc_compat_2_5_len;
287 
288 extern GlobalProperty pc_compat_2_4[];
289 extern const size_t pc_compat_2_4_len;
290 
291 extern GlobalProperty pc_compat_2_3[];
292 extern const size_t pc_compat_2_3_len;
293 
294 extern GlobalProperty pc_compat_2_2[];
295 extern const size_t pc_compat_2_2_len;
296 
297 extern GlobalProperty pc_compat_2_1[];
298 extern const size_t pc_compat_2_1_len;
299 
300 extern GlobalProperty pc_compat_2_0[];
301 extern const size_t pc_compat_2_0_len;
302 
303 extern GlobalProperty pc_compat_1_7[];
304 extern const size_t pc_compat_1_7_len;
305 
306 extern GlobalProperty pc_compat_1_6[];
307 extern const size_t pc_compat_1_6_len;
308 
309 extern GlobalProperty pc_compat_1_5[];
310 extern const size_t pc_compat_1_5_len;
311 
312 extern GlobalProperty pc_compat_1_4[];
313 extern const size_t pc_compat_1_4_len;
314 
315 int pc_machine_kvm_type(MachineState *machine, const char *vm_type);
316 
317 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
318     static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
319     { \
320         MachineClass *mc = MACHINE_CLASS(oc); \
321         optsfn(mc); \
322         mc->init = initfn; \
323         mc->kvm_type = pc_machine_kvm_type; \
324     } \
325     static const TypeInfo pc_machine_type_##suffix = { \
326         .name       = namestr TYPE_MACHINE_SUFFIX, \
327         .parent     = TYPE_PC_MACHINE, \
328         .class_init = pc_machine_##suffix##_class_init, \
329     }; \
330     static void pc_machine_init_##suffix(void) \
331     { \
332         type_register(&pc_machine_type_##suffix); \
333     } \
334     type_init(pc_machine_init_##suffix)
335 
336 #endif
337