1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 23 * address space begins. 24 * @hotplug_memory: hotplug memory addess space container 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 */ 27 struct PCMachineState { 28 /*< private >*/ 29 MachineState parent_obj; 30 31 /* <public> */ 32 ram_addr_t hotplug_memory_base; 33 MemoryRegion hotplug_memory; 34 35 HotplugHandler *acpi_dev; 36 37 uint64_t max_ram_below_4g; 38 }; 39 40 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 41 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 42 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 43 44 /** 45 * PCMachineClass: 46 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 47 */ 48 struct PCMachineClass { 49 /*< private >*/ 50 MachineClass parent_class; 51 52 /*< public >*/ 53 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 54 DeviceState *dev); 55 }; 56 57 typedef struct PCMachineState PCMachineState; 58 typedef struct PCMachineClass PCMachineClass; 59 60 #define TYPE_PC_MACHINE "generic-pc-machine" 61 #define PC_MACHINE(obj) \ 62 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 63 #define PC_MACHINE_GET_CLASS(obj) \ 64 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 65 #define PC_MACHINE_CLASS(klass) \ 66 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 67 68 void qemu_register_pc_machine(QEMUMachine *m); 69 70 /* PC-style peripherals (also used by other machines). */ 71 72 typedef struct PcPciInfo { 73 Range w32; 74 Range w64; 75 } PcPciInfo; 76 77 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 78 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 79 #define ACPI_PM_PROP_S4_VAL "s4_val" 80 #define ACPI_PM_PROP_SCI_INT "sci_int" 81 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 82 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 83 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 84 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 85 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 86 87 struct PcGuestInfo { 88 bool isapc_ram_fw; 89 hwaddr ram_size, ram_size_below_4g; 90 unsigned apic_id_limit; 91 bool apic_xrupt_override; 92 uint64_t numa_nodes; 93 uint64_t *node_mem; 94 uint64_t *node_cpu; 95 FWCfgState *fw_cfg; 96 int legacy_acpi_table_size; 97 bool has_acpi_build; 98 bool has_reserved_memory; 99 }; 100 101 /* parallel.c */ 102 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 103 { 104 DeviceState *dev; 105 ISADevice *isadev; 106 107 isadev = isa_try_create(bus, "isa-parallel"); 108 if (!isadev) { 109 return false; 110 } 111 dev = DEVICE(isadev); 112 qdev_prop_set_uint32(dev, "index", index); 113 qdev_prop_set_chr(dev, "chardev", chr); 114 if (qdev_init(dev) < 0) { 115 return false; 116 } 117 return true; 118 } 119 120 bool parallel_mm_init(MemoryRegion *address_space, 121 hwaddr base, int it_shift, qemu_irq irq, 122 CharDriverState *chr); 123 124 /* i8259.c */ 125 126 extern DeviceState *isa_pic; 127 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 128 qemu_irq *kvm_i8259_init(ISABus *bus); 129 int pic_read_irq(DeviceState *d); 130 int pic_get_output(DeviceState *d); 131 void pic_info(Monitor *mon, const QDict *qdict); 132 void irq_info(Monitor *mon, const QDict *qdict); 133 134 /* Global System Interrupts */ 135 136 #define GSI_NUM_PINS IOAPIC_NUM_PINS 137 138 typedef struct GSIState { 139 qemu_irq i8259_irq[ISA_NUM_IRQS]; 140 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 141 } GSIState; 142 143 void gsi_handler(void *opaque, int n, int level); 144 145 /* vmport.c */ 146 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 147 148 static inline void vmport_init(ISABus *bus) 149 { 150 isa_create_simple(bus, "vmport"); 151 } 152 153 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 154 void vmmouse_get_data(uint32_t *data); 155 void vmmouse_set_data(const uint32_t *data); 156 157 /* pckbd.c */ 158 159 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 160 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 161 MemoryRegion *region, ram_addr_t size, 162 hwaddr mask); 163 void i8042_isa_mouse_fake_event(void *opaque); 164 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 165 166 /* pc.c */ 167 extern int fd_bootchk; 168 169 void pc_register_ferr_irq(qemu_irq irq); 170 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 171 172 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 173 void pc_hot_add_cpu(const int64_t id, Error **errp); 174 void pc_acpi_init(const char *default_dsdt); 175 176 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 177 ram_addr_t above_4g_mem_size); 178 179 void pc_set_legacy_acpi_data_size(void); 180 181 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 182 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 183 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 184 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 185 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 186 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 187 188 189 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 190 MemoryRegion *pci_address_space); 191 192 FWCfgState *xen_load_linux(const char *kernel_filename, 193 const char *kernel_cmdline, 194 const char *initrd_filename, 195 ram_addr_t below_4g_mem_size, 196 PcGuestInfo *guest_info); 197 FWCfgState *pc_memory_init(MachineState *machine, 198 MemoryRegion *system_memory, 199 ram_addr_t below_4g_mem_size, 200 ram_addr_t above_4g_mem_size, 201 MemoryRegion *rom_memory, 202 MemoryRegion **ram_memory, 203 PcGuestInfo *guest_info); 204 qemu_irq *pc_allocate_cpu_irq(void); 205 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 206 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 207 ISADevice **rtc_state, 208 ISADevice **floppy, 209 bool no_vmport, 210 uint32 hpet_irqs); 211 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 212 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 213 const char *boot_device, 214 ISADevice *floppy, BusState *ide0, BusState *ide1, 215 ISADevice *s); 216 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 217 void pc_pci_device_init(PCIBus *pci_bus); 218 219 typedef void (*cpu_set_smm_t)(int smm, void *arg); 220 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 221 222 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 223 224 /* acpi_piix.c */ 225 226 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 227 qemu_irq sci_irq, qemu_irq smi_irq, 228 int kvm_enabled, FWCfgState *fw_cfg, 229 DeviceState **piix4_pm); 230 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 231 232 /* hpet.c */ 233 extern int no_hpet; 234 235 /* piix_pci.c */ 236 struct PCII440FXState; 237 typedef struct PCII440FXState PCII440FXState; 238 239 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 240 ISABus **isa_bus, qemu_irq *pic, 241 MemoryRegion *address_space_mem, 242 MemoryRegion *address_space_io, 243 ram_addr_t ram_size, 244 ram_addr_t below_4g_mem_size, 245 ram_addr_t above_4g_mem_size, 246 MemoryRegion *pci_memory, 247 MemoryRegion *ram_memory); 248 249 PCIBus *find_i440fx(void); 250 /* piix4.c */ 251 extern PCIDevice *piix4_dev; 252 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 253 254 /* vga.c */ 255 enum vga_retrace_method { 256 VGA_RETRACE_DUMB, 257 VGA_RETRACE_PRECISE 258 }; 259 260 extern enum vga_retrace_method vga_retrace_method; 261 262 int isa_vga_mm_init(hwaddr vram_base, 263 hwaddr ctrl_base, int it_shift, 264 MemoryRegion *address_space); 265 266 /* ne2000.c */ 267 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 268 { 269 DeviceState *dev; 270 ISADevice *isadev; 271 272 qemu_check_nic_model(nd, "ne2k_isa"); 273 274 isadev = isa_try_create(bus, "ne2k_isa"); 275 if (!isadev) { 276 return false; 277 } 278 dev = DEVICE(isadev); 279 qdev_prop_set_uint32(dev, "iobase", base); 280 qdev_prop_set_uint32(dev, "irq", irq); 281 qdev_set_nic_properties(dev, nd); 282 qdev_init_nofail(dev); 283 return true; 284 } 285 286 /* pc_sysfw.c */ 287 void pc_system_firmware_init(MemoryRegion *rom_memory, 288 bool isapc_ram_fw); 289 290 /* pvpanic.c */ 291 uint16_t pvpanic_port(void); 292 293 /* e820 types */ 294 #define E820_RAM 1 295 #define E820_RESERVED 2 296 #define E820_ACPI 3 297 #define E820_NVS 4 298 #define E820_UNUSABLE 5 299 300 int e820_add_entry(uint64_t, uint64_t, uint32_t); 301 int e820_get_num_entries(void); 302 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 303 304 #define PC_COMPAT_2_1 \ 305 {\ 306 .driver = "intel-hda",\ 307 .property = "old_msi_addr",\ 308 .value = "on",\ 309 },{\ 310 .driver = "VGA",\ 311 .property = "qemu-extended-regs",\ 312 .value = "off",\ 313 },{\ 314 .driver = "secondary-vga",\ 315 .property = "qemu-extended-regs",\ 316 .value = "off",\ 317 },{\ 318 .driver = "usb-mouse",\ 319 .property = "usb_version",\ 320 .value = stringify(1),\ 321 },{\ 322 .driver = "usb-kbd",\ 323 .property = "usb_version",\ 324 .value = stringify(1),\ 325 } 326 327 #define PC_COMPAT_2_0 \ 328 PC_COMPAT_2_1, \ 329 {\ 330 .driver = "virtio-scsi-pci",\ 331 .property = "any_layout",\ 332 .value = "off",\ 333 },{\ 334 .driver = "PIIX4_PM",\ 335 .property = "memory-hotplug-support",\ 336 .value = "off",\ 337 },\ 338 {\ 339 .driver = "apic",\ 340 .property = "version",\ 341 .value = stringify(0x11),\ 342 },\ 343 {\ 344 .driver = "nec-usb-xhci",\ 345 .property = "superspeed-ports-first",\ 346 .value = "off",\ 347 },\ 348 {\ 349 .driver = "nec-usb-xhci",\ 350 .property = "force-pcie-endcap",\ 351 .value = "on",\ 352 },\ 353 {\ 354 .driver = "pci-serial",\ 355 .property = "prog_if",\ 356 .value = stringify(0),\ 357 },\ 358 {\ 359 .driver = "pci-serial-2x",\ 360 .property = "prog_if",\ 361 .value = stringify(0),\ 362 },\ 363 {\ 364 .driver = "pci-serial-4x",\ 365 .property = "prog_if",\ 366 .value = stringify(0),\ 367 },\ 368 {\ 369 .driver = "virtio-net-pci",\ 370 .property = "guest_announce",\ 371 .value = "off",\ 372 },\ 373 {\ 374 .driver = "ICH9-LPC",\ 375 .property = "memory-hotplug-support",\ 376 .value = "off",\ 377 },{\ 378 .driver = "xio3130-downstream",\ 379 .property = COMPAT_PROP_PCP,\ 380 .value = "off",\ 381 },{\ 382 .driver = "ioh3420",\ 383 .property = COMPAT_PROP_PCP,\ 384 .value = "off",\ 385 } 386 387 #define PC_COMPAT_1_7 \ 388 PC_COMPAT_2_0, \ 389 {\ 390 .driver = TYPE_USB_DEVICE,\ 391 .property = "msos-desc",\ 392 .value = "no",\ 393 },\ 394 {\ 395 .driver = "PIIX4_PM",\ 396 .property = "acpi-pci-hotplug-with-bridge-support",\ 397 .value = "off",\ 398 },\ 399 {\ 400 .driver = "hpet",\ 401 .property = HPET_INTCAP,\ 402 .value = stringify(4),\ 403 } 404 405 #define PC_COMPAT_1_6 \ 406 PC_COMPAT_1_7, \ 407 {\ 408 .driver = "e1000",\ 409 .property = "mitigation",\ 410 .value = "off",\ 411 },{\ 412 .driver = "qemu64-" TYPE_X86_CPU,\ 413 .property = "model",\ 414 .value = stringify(2),\ 415 },{\ 416 .driver = "qemu32-" TYPE_X86_CPU,\ 417 .property = "model",\ 418 .value = stringify(3),\ 419 },{\ 420 .driver = "i440FX-pcihost",\ 421 .property = "short_root_bus",\ 422 .value = stringify(1),\ 423 },{\ 424 .driver = "q35-pcihost",\ 425 .property = "short_root_bus",\ 426 .value = stringify(1),\ 427 } 428 429 #define PC_COMPAT_1_5 \ 430 PC_COMPAT_1_6, \ 431 {\ 432 .driver = "Conroe-" TYPE_X86_CPU,\ 433 .property = "model",\ 434 .value = stringify(2),\ 435 },{\ 436 .driver = "Conroe-" TYPE_X86_CPU,\ 437 .property = "level",\ 438 .value = stringify(2),\ 439 },{\ 440 .driver = "Penryn-" TYPE_X86_CPU,\ 441 .property = "model",\ 442 .value = stringify(2),\ 443 },{\ 444 .driver = "Penryn-" TYPE_X86_CPU,\ 445 .property = "level",\ 446 .value = stringify(2),\ 447 },{\ 448 .driver = "Nehalem-" TYPE_X86_CPU,\ 449 .property = "model",\ 450 .value = stringify(2),\ 451 },{\ 452 .driver = "Nehalem-" TYPE_X86_CPU,\ 453 .property = "level",\ 454 .value = stringify(2),\ 455 },{\ 456 .driver = "virtio-net-pci",\ 457 .property = "any_layout",\ 458 .value = "off",\ 459 },{\ 460 .driver = TYPE_X86_CPU,\ 461 .property = "pmu",\ 462 .value = "on",\ 463 },{\ 464 .driver = "i440FX-pcihost",\ 465 .property = "short_root_bus",\ 466 .value = stringify(0),\ 467 },{\ 468 .driver = "q35-pcihost",\ 469 .property = "short_root_bus",\ 470 .value = stringify(0),\ 471 } 472 473 #define PC_COMPAT_1_4 \ 474 PC_COMPAT_1_5, \ 475 {\ 476 .driver = "scsi-hd",\ 477 .property = "discard_granularity",\ 478 .value = stringify(0),\ 479 },{\ 480 .driver = "scsi-cd",\ 481 .property = "discard_granularity",\ 482 .value = stringify(0),\ 483 },{\ 484 .driver = "scsi-disk",\ 485 .property = "discard_granularity",\ 486 .value = stringify(0),\ 487 },{\ 488 .driver = "ide-hd",\ 489 .property = "discard_granularity",\ 490 .value = stringify(0),\ 491 },{\ 492 .driver = "ide-cd",\ 493 .property = "discard_granularity",\ 494 .value = stringify(0),\ 495 },{\ 496 .driver = "ide-drive",\ 497 .property = "discard_granularity",\ 498 .value = stringify(0),\ 499 },{\ 500 .driver = "virtio-blk-pci",\ 501 .property = "discard_granularity",\ 502 .value = stringify(0),\ 503 },{\ 504 .driver = "virtio-serial-pci",\ 505 .property = "vectors",\ 506 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 507 .value = stringify(0xFFFFFFFF),\ 508 },{ \ 509 .driver = "virtio-net-pci", \ 510 .property = "ctrl_guest_offloads", \ 511 .value = "off", \ 512 },{\ 513 .driver = "e1000",\ 514 .property = "romfile",\ 515 .value = "pxe-e1000.rom",\ 516 },{\ 517 .driver = "ne2k_pci",\ 518 .property = "romfile",\ 519 .value = "pxe-ne2k_pci.rom",\ 520 },{\ 521 .driver = "pcnet",\ 522 .property = "romfile",\ 523 .value = "pxe-pcnet.rom",\ 524 },{\ 525 .driver = "rtl8139",\ 526 .property = "romfile",\ 527 .value = "pxe-rtl8139.rom",\ 528 },{\ 529 .driver = "virtio-net-pci",\ 530 .property = "romfile",\ 531 .value = "pxe-virtio.rom",\ 532 },{\ 533 .driver = "486-" TYPE_X86_CPU,\ 534 .property = "model",\ 535 .value = stringify(0),\ 536 } 537 538 #define PC_COMMON_MACHINE_OPTIONS \ 539 .default_boot_order = "cad" 540 541 #define PC_DEFAULT_MACHINE_OPTIONS \ 542 PC_COMMON_MACHINE_OPTIONS, \ 543 .hot_add_cpu = pc_hot_add_cpu, \ 544 .max_cpus = 255 545 546 #endif 547