xref: /openbmc/qemu/include/hw/i386/pc.h (revision e615c157)
1 #ifndef HW_PC_H
2 #define HW_PC_H
3 
4 #include "exec/memory.h"
5 #include "hw/boards.h"
6 #include "hw/block/fdc.h"
7 #include "hw/block/flash.h"
8 #include "net/net.h"
9 #include "hw/i386/x86.h"
10 
11 #include "qemu/range.h"
12 #include "qemu/bitmap.h"
13 #include "qemu/module.h"
14 #include "hw/pci/pci.h"
15 #include "hw/mem/pc-dimm.h"
16 #include "hw/mem/nvdimm.h"
17 #include "hw/acpi/acpi_dev_interface.h"
18 
19 #define HPET_INTCAP "hpet-intcap"
20 
21 /**
22  * PCMachineState:
23  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
24  * @boot_cpus: number of present VCPUs
25  * @smp_dies: number of dies per one package
26  */
27 struct PCMachineState {
28     /*< private >*/
29     X86MachineState parent_obj;
30 
31     /* <public> */
32 
33     /* State for other subsystems/APIs: */
34     Notifier machine_done;
35 
36     /* Pointers to devices and objects: */
37     HotplugHandler *acpi_dev;
38     PCIBus *bus;
39     I2CBus *smbus;
40     PFlashCFI01 *flash[2];
41 
42     /* Configuration options: */
43     OnOffAuto vmport;
44 
45     bool acpi_build_enabled;
46     bool smbus_enabled;
47     bool sata_enabled;
48     bool pit_enabled;
49 
50     /* NUMA information: */
51     uint64_t numa_nodes;
52     uint64_t *node_mem;
53 
54     /* ACPI Memory hotplug IO base address */
55     hwaddr memhp_io_base;
56 };
57 
58 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
59 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
60 #define PC_MACHINE_VMPORT           "vmport"
61 #define PC_MACHINE_SMBUS            "smbus"
62 #define PC_MACHINE_SATA             "sata"
63 #define PC_MACHINE_PIT              "pit"
64 
65 /**
66  * PCMachineClass:
67  *
68  * Compat fields:
69  *
70  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
71  *                        backend's alignment value if provided
72  * @acpi_data_size: Size of the chunk of memory at the top of RAM
73  *                  for the BIOS ACPI tables and other BIOS
74  *                  datastructures.
75  * @gigabyte_align: Make sure that guest addresses aligned at
76  *                  1Gbyte boundaries get mapped to host
77  *                  addresses aligned at 1Gbyte boundaries. This
78  *                  way we can use 1GByte pages in the host.
79  *
80  */
81 typedef struct PCMachineClass {
82     /*< private >*/
83     X86MachineClass parent_class;
84 
85     /*< public >*/
86 
87     /* Device configuration: */
88     bool pci_enabled;
89     bool kvmclock_enabled;
90     const char *default_nic_model;
91 
92     /* Compat options: */
93 
94     /* Default CPU model version.  See x86_cpu_set_default_version(). */
95     int default_cpu_version;
96 
97     /* ACPI compat: */
98     bool has_acpi_build;
99     bool rsdp_in_ram;
100     int legacy_acpi_table_size;
101     unsigned acpi_data_size;
102     bool do_not_add_smb_acpi;
103 
104     /* SMBIOS compat: */
105     bool smbios_defaults;
106     bool smbios_legacy_mode;
107     bool smbios_uuid_encoded;
108 
109     /* RAM / address space compat: */
110     bool gigabyte_align;
111     bool has_reserved_memory;
112     bool enforce_aligned_dimm;
113     bool broken_reserved_end;
114 
115     /* generate legacy CPU hotplug AML */
116     bool legacy_cpu_hotplug;
117 
118     /* use DMA capable linuxboot option rom */
119     bool linuxboot_dma_enabled;
120 
121     /* use PVH to load kernels that support this feature */
122     bool pvh_enabled;
123 } PCMachineClass;
124 
125 #define TYPE_PC_MACHINE "generic-pc-machine"
126 #define PC_MACHINE(obj) \
127     OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
128 #define PC_MACHINE_GET_CLASS(obj) \
129     OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
130 #define PC_MACHINE_CLASS(klass) \
131     OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
132 
133 /* ioapic.c */
134 
135 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
136 
137 /* vmport.c */
138 #define TYPE_VMPORT "vmport"
139 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
140 
141 static inline void vmport_init(ISABus *bus)
142 {
143     isa_create_simple(bus, TYPE_VMPORT);
144 }
145 
146 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
147 void vmmouse_get_data(uint32_t *data);
148 void vmmouse_set_data(const uint32_t *data);
149 
150 /* pc.c */
151 extern int fd_bootchk;
152 
153 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
154 
155 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
156 void pc_smp_parse(MachineState *ms, QemuOpts *opts);
157 
158 void pc_guest_info_init(PCMachineState *pcms);
159 
160 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
161 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
162 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
163 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
164 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
165 #define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
166 #define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
167 
168 
169 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
170                             MemoryRegion *pci_address_space);
171 
172 void xen_load_linux(PCMachineState *pcms);
173 void pc_memory_init(PCMachineState *pcms,
174                     MemoryRegion *system_memory,
175                     MemoryRegion *rom_memory,
176                     MemoryRegion **ram_memory);
177 uint64_t pc_pci_hole64_start(void);
178 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
179 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
180                           ISADevice **rtc_state,
181                           bool create_fdctrl,
182                           bool no_vmport,
183                           bool has_pit,
184                           uint32_t hpet_irqs);
185 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
186 void pc_cmos_init(PCMachineState *pcms,
187                   BusState *ide0, BusState *ide1,
188                   ISADevice *s);
189 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
190 void pc_pci_device_init(PCIBus *pci_bus);
191 
192 typedef void (*cpu_set_smm_t)(int smm, void *arg);
193 
194 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
195 
196 ISADevice *pc_find_fdc0(void);
197 int cmos_get_fd_drive_type(FloppyDriveType fd0);
198 
199 /* port92.c */
200 #define PORT92_A20_LINE "a20"
201 
202 #define TYPE_PORT92 "port92"
203 
204 /* pc_sysfw.c */
205 void pc_system_flash_create(PCMachineState *pcms);
206 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
207 
208 /* acpi-build.c */
209 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
210                        const CPUArchIdList *apic_ids, GArray *entry);
211 
212 extern GlobalProperty pc_compat_4_2[];
213 extern const size_t pc_compat_4_2_len;
214 
215 extern GlobalProperty pc_compat_4_1[];
216 extern const size_t pc_compat_4_1_len;
217 
218 extern GlobalProperty pc_compat_4_0[];
219 extern const size_t pc_compat_4_0_len;
220 
221 extern GlobalProperty pc_compat_3_1[];
222 extern const size_t pc_compat_3_1_len;
223 
224 extern GlobalProperty pc_compat_3_0[];
225 extern const size_t pc_compat_3_0_len;
226 
227 extern GlobalProperty pc_compat_2_12[];
228 extern const size_t pc_compat_2_12_len;
229 
230 extern GlobalProperty pc_compat_2_11[];
231 extern const size_t pc_compat_2_11_len;
232 
233 extern GlobalProperty pc_compat_2_10[];
234 extern const size_t pc_compat_2_10_len;
235 
236 extern GlobalProperty pc_compat_2_9[];
237 extern const size_t pc_compat_2_9_len;
238 
239 extern GlobalProperty pc_compat_2_8[];
240 extern const size_t pc_compat_2_8_len;
241 
242 extern GlobalProperty pc_compat_2_7[];
243 extern const size_t pc_compat_2_7_len;
244 
245 extern GlobalProperty pc_compat_2_6[];
246 extern const size_t pc_compat_2_6_len;
247 
248 extern GlobalProperty pc_compat_2_5[];
249 extern const size_t pc_compat_2_5_len;
250 
251 extern GlobalProperty pc_compat_2_4[];
252 extern const size_t pc_compat_2_4_len;
253 
254 extern GlobalProperty pc_compat_2_3[];
255 extern const size_t pc_compat_2_3_len;
256 
257 extern GlobalProperty pc_compat_2_2[];
258 extern const size_t pc_compat_2_2_len;
259 
260 extern GlobalProperty pc_compat_2_1[];
261 extern const size_t pc_compat_2_1_len;
262 
263 extern GlobalProperty pc_compat_2_0[];
264 extern const size_t pc_compat_2_0_len;
265 
266 extern GlobalProperty pc_compat_1_7[];
267 extern const size_t pc_compat_1_7_len;
268 
269 extern GlobalProperty pc_compat_1_6[];
270 extern const size_t pc_compat_1_6_len;
271 
272 extern GlobalProperty pc_compat_1_5[];
273 extern const size_t pc_compat_1_5_len;
274 
275 extern GlobalProperty pc_compat_1_4[];
276 extern const size_t pc_compat_1_4_len;
277 
278 /* Helper for setting model-id for CPU models that changed model-id
279  * depending on QEMU versions up to QEMU 2.4.
280  */
281 #define PC_CPU_MODEL_IDS(v) \
282     { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
283     { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
284     { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
285 
286 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
287     static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
288     { \
289         MachineClass *mc = MACHINE_CLASS(oc); \
290         optsfn(mc); \
291         mc->init = initfn; \
292     } \
293     static const TypeInfo pc_machine_type_##suffix = { \
294         .name       = namestr TYPE_MACHINE_SUFFIX, \
295         .parent     = TYPE_PC_MACHINE, \
296         .class_init = pc_machine_##suffix##_class_init, \
297     }; \
298     static void pc_machine_init_##suffix(void) \
299     { \
300         type_register(&pc_machine_type_##suffix); \
301     } \
302     type_init(pc_machine_init_##suffix)
303 
304 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
305 #endif
306