1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "hw/boards.h" 7 #include "hw/block/fdc.h" 8 #include "hw/block/flash.h" 9 #include "hw/i386/x86.h" 10 11 #include "hw/acpi/acpi_dev_interface.h" 12 #include "hw/hotplug.h" 13 14 #define HPET_INTCAP "hpet-intcap" 15 16 /** 17 * PCMachineState: 18 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 19 * @boot_cpus: number of present VCPUs 20 * @smp_dies: number of dies per one package 21 */ 22 struct PCMachineState { 23 /*< private >*/ 24 X86MachineState parent_obj; 25 26 /* <public> */ 27 28 /* State for other subsystems/APIs: */ 29 Notifier machine_done; 30 31 /* Pointers to devices and objects: */ 32 HotplugHandler *acpi_dev; 33 PCIBus *bus; 34 I2CBus *smbus; 35 PFlashCFI01 *flash[2]; 36 37 /* Configuration options: */ 38 OnOffAuto vmport; 39 40 bool acpi_build_enabled; 41 bool smbus_enabled; 42 bool sata_enabled; 43 bool pit_enabled; 44 45 /* NUMA information: */ 46 uint64_t numa_nodes; 47 uint64_t *node_mem; 48 49 /* ACPI Memory hotplug IO base address */ 50 hwaddr memhp_io_base; 51 }; 52 53 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 54 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 55 #define PC_MACHINE_VMPORT "vmport" 56 #define PC_MACHINE_SMBUS "smbus" 57 #define PC_MACHINE_SATA "sata" 58 #define PC_MACHINE_PIT "pit" 59 60 /** 61 * PCMachineClass: 62 * 63 * Compat fields: 64 * 65 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 66 * backend's alignment value if provided 67 * @acpi_data_size: Size of the chunk of memory at the top of RAM 68 * for the BIOS ACPI tables and other BIOS 69 * datastructures. 70 * @gigabyte_align: Make sure that guest addresses aligned at 71 * 1Gbyte boundaries get mapped to host 72 * addresses aligned at 1Gbyte boundaries. This 73 * way we can use 1GByte pages in the host. 74 * 75 */ 76 typedef struct PCMachineClass { 77 /*< private >*/ 78 X86MachineClass parent_class; 79 80 /*< public >*/ 81 82 /* Device configuration: */ 83 bool pci_enabled; 84 bool kvmclock_enabled; 85 const char *default_nic_model; 86 87 /* Compat options: */ 88 89 /* Default CPU model version. See x86_cpu_set_default_version(). */ 90 int default_cpu_version; 91 92 /* ACPI compat: */ 93 bool has_acpi_build; 94 bool rsdp_in_ram; 95 int legacy_acpi_table_size; 96 unsigned acpi_data_size; 97 bool do_not_add_smb_acpi; 98 99 /* SMBIOS compat: */ 100 bool smbios_defaults; 101 bool smbios_legacy_mode; 102 bool smbios_uuid_encoded; 103 104 /* RAM / address space compat: */ 105 bool gigabyte_align; 106 bool has_reserved_memory; 107 bool enforce_aligned_dimm; 108 bool broken_reserved_end; 109 110 /* generate legacy CPU hotplug AML */ 111 bool legacy_cpu_hotplug; 112 113 /* use DMA capable linuxboot option rom */ 114 bool linuxboot_dma_enabled; 115 116 /* use PVH to load kernels that support this feature */ 117 bool pvh_enabled; 118 } PCMachineClass; 119 120 #define TYPE_PC_MACHINE "generic-pc-machine" 121 #define PC_MACHINE(obj) \ 122 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 123 #define PC_MACHINE_GET_CLASS(obj) \ 124 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 125 #define PC_MACHINE_CLASS(klass) \ 126 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 127 128 /* ioapic.c */ 129 130 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 131 132 /* vmport.c */ 133 #define TYPE_VMPORT "vmport" 134 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 135 136 static inline void vmport_init(ISABus *bus) 137 { 138 isa_create_simple(bus, TYPE_VMPORT); 139 } 140 141 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 142 void vmmouse_get_data(uint32_t *data); 143 void vmmouse_set_data(const uint32_t *data); 144 145 /* pc.c */ 146 extern int fd_bootchk; 147 148 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 149 150 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp); 151 void pc_smp_parse(MachineState *ms, QemuOpts *opts); 152 153 void pc_guest_info_init(PCMachineState *pcms); 154 155 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 156 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 157 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 158 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 159 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 160 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 161 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 162 163 164 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 165 MemoryRegion *pci_address_space); 166 167 void xen_load_linux(PCMachineState *pcms); 168 void pc_memory_init(PCMachineState *pcms, 169 MemoryRegion *system_memory, 170 MemoryRegion *rom_memory, 171 MemoryRegion **ram_memory); 172 uint64_t pc_pci_hole64_start(void); 173 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 174 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 175 ISADevice **rtc_state, 176 bool create_fdctrl, 177 bool no_vmport, 178 bool has_pit, 179 uint32_t hpet_irqs); 180 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 181 void pc_cmos_init(PCMachineState *pcms, 182 BusState *ide0, BusState *ide1, 183 ISADevice *s); 184 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 185 void pc_pci_device_init(PCIBus *pci_bus); 186 187 typedef void (*cpu_set_smm_t)(int smm, void *arg); 188 189 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 190 191 ISADevice *pc_find_fdc0(void); 192 int cmos_get_fd_drive_type(FloppyDriveType fd0); 193 194 /* port92.c */ 195 #define PORT92_A20_LINE "a20" 196 197 #define TYPE_PORT92 "port92" 198 199 /* pc_sysfw.c */ 200 void pc_system_flash_create(PCMachineState *pcms); 201 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 202 203 /* acpi-build.c */ 204 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 205 const CPUArchIdList *apic_ids, GArray *entry); 206 207 extern GlobalProperty pc_compat_4_2[]; 208 extern const size_t pc_compat_4_2_len; 209 210 extern GlobalProperty pc_compat_4_1[]; 211 extern const size_t pc_compat_4_1_len; 212 213 extern GlobalProperty pc_compat_4_0[]; 214 extern const size_t pc_compat_4_0_len; 215 216 extern GlobalProperty pc_compat_3_1[]; 217 extern const size_t pc_compat_3_1_len; 218 219 extern GlobalProperty pc_compat_3_0[]; 220 extern const size_t pc_compat_3_0_len; 221 222 extern GlobalProperty pc_compat_2_12[]; 223 extern const size_t pc_compat_2_12_len; 224 225 extern GlobalProperty pc_compat_2_11[]; 226 extern const size_t pc_compat_2_11_len; 227 228 extern GlobalProperty pc_compat_2_10[]; 229 extern const size_t pc_compat_2_10_len; 230 231 extern GlobalProperty pc_compat_2_9[]; 232 extern const size_t pc_compat_2_9_len; 233 234 extern GlobalProperty pc_compat_2_8[]; 235 extern const size_t pc_compat_2_8_len; 236 237 extern GlobalProperty pc_compat_2_7[]; 238 extern const size_t pc_compat_2_7_len; 239 240 extern GlobalProperty pc_compat_2_6[]; 241 extern const size_t pc_compat_2_6_len; 242 243 extern GlobalProperty pc_compat_2_5[]; 244 extern const size_t pc_compat_2_5_len; 245 246 extern GlobalProperty pc_compat_2_4[]; 247 extern const size_t pc_compat_2_4_len; 248 249 extern GlobalProperty pc_compat_2_3[]; 250 extern const size_t pc_compat_2_3_len; 251 252 extern GlobalProperty pc_compat_2_2[]; 253 extern const size_t pc_compat_2_2_len; 254 255 extern GlobalProperty pc_compat_2_1[]; 256 extern const size_t pc_compat_2_1_len; 257 258 extern GlobalProperty pc_compat_2_0[]; 259 extern const size_t pc_compat_2_0_len; 260 261 extern GlobalProperty pc_compat_1_7[]; 262 extern const size_t pc_compat_1_7_len; 263 264 extern GlobalProperty pc_compat_1_6[]; 265 extern const size_t pc_compat_1_6_len; 266 267 extern GlobalProperty pc_compat_1_5[]; 268 extern const size_t pc_compat_1_5_len; 269 270 extern GlobalProperty pc_compat_1_4[]; 271 extern const size_t pc_compat_1_4_len; 272 273 /* Helper for setting model-id for CPU models that changed model-id 274 * depending on QEMU versions up to QEMU 2.4. 275 */ 276 #define PC_CPU_MODEL_IDS(v) \ 277 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 278 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 279 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, 280 281 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 282 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 283 { \ 284 MachineClass *mc = MACHINE_CLASS(oc); \ 285 optsfn(mc); \ 286 mc->init = initfn; \ 287 } \ 288 static const TypeInfo pc_machine_type_##suffix = { \ 289 .name = namestr TYPE_MACHINE_SUFFIX, \ 290 .parent = TYPE_PC_MACHINE, \ 291 .class_init = pc_machine_##suffix##_class_init, \ 292 }; \ 293 static void pc_machine_init_##suffix(void) \ 294 { \ 295 type_register(&pc_machine_type_##suffix); \ 296 } \ 297 type_init(pc_machine_init_##suffix) 298 299 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 300 #endif 301