1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "qemu/typedefs.h" 6 #include "exec/memory.h" 7 #include "hw/boards.h" 8 #include "hw/isa/isa.h" 9 #include "hw/block/fdc.h" 10 #include "net/net.h" 11 #include "hw/i386/ioapic.h" 12 13 #include "qemu/range.h" 14 #include "qemu/bitmap.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/pci/pci.h" 17 #include "hw/boards.h" 18 #include "hw/compat.h" 19 #include "hw/mem/pc-dimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 27 * backend's alignment value if provided 28 */ 29 struct PCMachineState { 30 /*< private >*/ 31 MachineState parent_obj; 32 33 /* <public> */ 34 MemoryHotplugState hotplug_memory; 35 36 HotplugHandler *acpi_dev; 37 ISADevice *rtc; 38 39 uint64_t max_ram_below_4g; 40 OnOffAuto vmport; 41 OnOffAuto smm; 42 bool enforce_aligned_dimm; 43 ram_addr_t below_4g_mem_size, above_4g_mem_size; 44 }; 45 46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 49 #define PC_MACHINE_VMPORT "vmport" 50 #define PC_MACHINE_SMM "smm" 51 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm" 52 53 /** 54 * PCMachineClass: 55 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 56 */ 57 struct PCMachineClass { 58 /*< private >*/ 59 MachineClass parent_class; 60 61 /*< public >*/ 62 bool broken_reserved_end; 63 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 64 DeviceState *dev); 65 }; 66 67 #define TYPE_PC_MACHINE "generic-pc-machine" 68 #define PC_MACHINE(obj) \ 69 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 70 #define PC_MACHINE_GET_CLASS(obj) \ 71 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 72 #define PC_MACHINE_CLASS(klass) \ 73 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 74 75 /* PC-style peripherals (also used by other machines). */ 76 77 typedef struct PcPciInfo { 78 Range w32; 79 Range w64; 80 } PcPciInfo; 81 82 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 83 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 84 #define ACPI_PM_PROP_S4_VAL "s4_val" 85 #define ACPI_PM_PROP_SCI_INT "sci_int" 86 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 87 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 88 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 89 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 90 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 91 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 92 93 struct PcGuestInfo { 94 bool isapc_ram_fw; 95 hwaddr ram_size, ram_size_below_4g; 96 unsigned apic_id_limit; 97 bool apic_xrupt_override; 98 uint64_t numa_nodes; 99 uint64_t *node_mem; 100 uint64_t *node_cpu; 101 FWCfgState *fw_cfg; 102 int legacy_acpi_table_size; 103 bool has_acpi_build; 104 bool has_reserved_memory; 105 bool rsdp_in_ram; 106 }; 107 108 /* parallel.c */ 109 110 void parallel_hds_isa_init(ISABus *bus, int n); 111 112 bool parallel_mm_init(MemoryRegion *address_space, 113 hwaddr base, int it_shift, qemu_irq irq, 114 CharDriverState *chr); 115 116 /* i8259.c */ 117 118 extern DeviceState *isa_pic; 119 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 120 qemu_irq *kvm_i8259_init(ISABus *bus); 121 int pic_read_irq(DeviceState *d); 122 int pic_get_output(DeviceState *d); 123 void hmp_info_pic(Monitor *mon, const QDict *qdict); 124 void hmp_info_irq(Monitor *mon, const QDict *qdict); 125 126 /* ioapic.c */ 127 128 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 129 130 /* Global System Interrupts */ 131 132 #define GSI_NUM_PINS IOAPIC_NUM_PINS 133 134 typedef struct GSIState { 135 qemu_irq i8259_irq[ISA_NUM_IRQS]; 136 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 137 } GSIState; 138 139 void gsi_handler(void *opaque, int n, int level); 140 141 /* vmport.c */ 142 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 143 144 static inline void vmport_init(ISABus *bus) 145 { 146 isa_create_simple(bus, "vmport"); 147 } 148 149 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 150 void vmmouse_get_data(uint32_t *data); 151 void vmmouse_set_data(const uint32_t *data); 152 153 /* pckbd.c */ 154 155 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 156 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 157 MemoryRegion *region, ram_addr_t size, 158 hwaddr mask); 159 void i8042_isa_mouse_fake_event(void *opaque); 160 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 161 162 /* pc.c */ 163 extern int fd_bootchk; 164 165 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 166 void pc_register_ferr_irq(qemu_irq irq); 167 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 168 169 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 170 void pc_hot_add_cpu(const int64_t id, Error **errp); 171 void pc_acpi_init(const char *default_dsdt); 172 173 PcGuestInfo *pc_guest_info_init(PCMachineState *pcms); 174 175 void pc_set_legacy_acpi_data_size(void); 176 177 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 178 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 179 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 180 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 181 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 182 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 183 184 185 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 186 MemoryRegion *pci_address_space); 187 188 FWCfgState *xen_load_linux(PCMachineState *pcms, 189 PcGuestInfo *guest_info); 190 FWCfgState *pc_memory_init(PCMachineState *pcms, 191 MemoryRegion *system_memory, 192 MemoryRegion *rom_memory, 193 MemoryRegion **ram_memory, 194 PcGuestInfo *guest_info); 195 qemu_irq pc_allocate_cpu_irq(void); 196 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 197 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 198 ISADevice **rtc_state, 199 bool create_fdctrl, 200 bool no_vmport, 201 uint32 hpet_irqs); 202 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 203 void pc_cmos_init(PCMachineState *pcms, 204 BusState *ide0, BusState *ide1, 205 ISADevice *s); 206 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 207 void pc_pci_device_init(PCIBus *pci_bus); 208 209 typedef void (*cpu_set_smm_t)(int smm, void *arg); 210 211 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 212 213 /* acpi_piix.c */ 214 215 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 216 qemu_irq sci_irq, qemu_irq smi_irq, 217 int smm_enabled, DeviceState **piix4_pm); 218 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 219 220 /* hpet.c */ 221 extern int no_hpet; 222 223 /* piix_pci.c */ 224 struct PCII440FXState; 225 typedef struct PCII440FXState PCII440FXState; 226 227 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 228 #define TYPE_I440FX_PCI_DEVICE "i440FX" 229 230 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 231 232 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 233 PCII440FXState **pi440fx_state, int *piix_devfn, 234 ISABus **isa_bus, qemu_irq *pic, 235 MemoryRegion *address_space_mem, 236 MemoryRegion *address_space_io, 237 ram_addr_t ram_size, 238 ram_addr_t below_4g_mem_size, 239 ram_addr_t above_4g_mem_size, 240 MemoryRegion *pci_memory, 241 MemoryRegion *ram_memory); 242 243 PCIBus *find_i440fx(void); 244 /* piix4.c */ 245 extern PCIDevice *piix4_dev; 246 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 247 248 /* vga.c */ 249 enum vga_retrace_method { 250 VGA_RETRACE_DUMB, 251 VGA_RETRACE_PRECISE 252 }; 253 254 extern enum vga_retrace_method vga_retrace_method; 255 256 int isa_vga_mm_init(hwaddr vram_base, 257 hwaddr ctrl_base, int it_shift, 258 MemoryRegion *address_space); 259 260 /* ne2000.c */ 261 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 262 { 263 DeviceState *dev; 264 ISADevice *isadev; 265 266 qemu_check_nic_model(nd, "ne2k_isa"); 267 268 isadev = isa_try_create(bus, "ne2k_isa"); 269 if (!isadev) { 270 return false; 271 } 272 dev = DEVICE(isadev); 273 qdev_prop_set_uint32(dev, "iobase", base); 274 qdev_prop_set_uint32(dev, "irq", irq); 275 qdev_set_nic_properties(dev, nd); 276 qdev_init_nofail(dev); 277 return true; 278 } 279 280 /* pc_sysfw.c */ 281 void pc_system_firmware_init(MemoryRegion *rom_memory, 282 bool isapc_ram_fw); 283 284 /* pvpanic.c */ 285 uint16_t pvpanic_port(void); 286 287 /* e820 types */ 288 #define E820_RAM 1 289 #define E820_RESERVED 2 290 #define E820_ACPI 3 291 #define E820_NVS 4 292 #define E820_UNUSABLE 5 293 294 int e820_add_entry(uint64_t, uint64_t, uint32_t); 295 int e820_get_num_entries(void); 296 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 297 298 #define PC_COMPAT_2_3 \ 299 HW_COMPAT_2_3 \ 300 {\ 301 .driver = TYPE_X86_CPU,\ 302 .property = "arat",\ 303 .value = "off",\ 304 },{\ 305 .driver = "qemu64" "-" TYPE_X86_CPU,\ 306 .property = "level",\ 307 .value = stringify(4),\ 308 },{\ 309 .driver = "kvm64" "-" TYPE_X86_CPU,\ 310 .property = "level",\ 311 .value = stringify(5),\ 312 },{\ 313 .driver = "pentium3" "-" TYPE_X86_CPU,\ 314 .property = "level",\ 315 .value = stringify(2),\ 316 },{\ 317 .driver = "n270" "-" TYPE_X86_CPU,\ 318 .property = "level",\ 319 .value = stringify(5),\ 320 },{\ 321 .driver = "Conroe" "-" TYPE_X86_CPU,\ 322 .property = "level",\ 323 .value = stringify(4),\ 324 },{\ 325 .driver = "Penryn" "-" TYPE_X86_CPU,\ 326 .property = "level",\ 327 .value = stringify(4),\ 328 },{\ 329 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 330 .property = "level",\ 331 .value = stringify(4),\ 332 },{\ 333 .driver = "n270" "-" TYPE_X86_CPU,\ 334 .property = "xlevel",\ 335 .value = stringify(0x8000000a),\ 336 },{\ 337 .driver = "Penryn" "-" TYPE_X86_CPU,\ 338 .property = "xlevel",\ 339 .value = stringify(0x8000000a),\ 340 },{\ 341 .driver = "Conroe" "-" TYPE_X86_CPU,\ 342 .property = "xlevel",\ 343 .value = stringify(0x8000000a),\ 344 },{\ 345 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 346 .property = "xlevel",\ 347 .value = stringify(0x8000000a),\ 348 },{\ 349 .driver = "Westmere" "-" TYPE_X86_CPU,\ 350 .property = "xlevel",\ 351 .value = stringify(0x8000000a),\ 352 },{\ 353 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 354 .property = "xlevel",\ 355 .value = stringify(0x8000000a),\ 356 },{\ 357 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 358 .property = "xlevel",\ 359 .value = stringify(0x8000000a),\ 360 },{\ 361 .driver = "Haswell" "-" TYPE_X86_CPU,\ 362 .property = "xlevel",\ 363 .value = stringify(0x8000000a),\ 364 },{\ 365 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 366 .property = "xlevel",\ 367 .value = stringify(0x8000000a),\ 368 },{\ 369 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 370 .property = "xlevel",\ 371 .value = stringify(0x8000000a),\ 372 },{\ 373 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 374 .property = "xlevel",\ 375 .value = stringify(0x8000000a),\ 376 }, 377 378 #define PC_COMPAT_2_2 \ 379 PC_COMPAT_2_3 \ 380 HW_COMPAT_2_2 \ 381 {\ 382 .driver = "kvm64" "-" TYPE_X86_CPU,\ 383 .property = "vme",\ 384 .value = "off",\ 385 },\ 386 {\ 387 .driver = "kvm32" "-" TYPE_X86_CPU,\ 388 .property = "vme",\ 389 .value = "off",\ 390 },\ 391 {\ 392 .driver = "Conroe" "-" TYPE_X86_CPU,\ 393 .property = "vme",\ 394 .value = "off",\ 395 },\ 396 {\ 397 .driver = "Penryn" "-" TYPE_X86_CPU,\ 398 .property = "vme",\ 399 .value = "off",\ 400 },\ 401 {\ 402 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 403 .property = "vme",\ 404 .value = "off",\ 405 },\ 406 {\ 407 .driver = "Westmere" "-" TYPE_X86_CPU,\ 408 .property = "vme",\ 409 .value = "off",\ 410 },\ 411 {\ 412 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 413 .property = "vme",\ 414 .value = "off",\ 415 },\ 416 {\ 417 .driver = "Haswell" "-" TYPE_X86_CPU,\ 418 .property = "vme",\ 419 .value = "off",\ 420 },\ 421 {\ 422 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 423 .property = "vme",\ 424 .value = "off",\ 425 },\ 426 {\ 427 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 428 .property = "vme",\ 429 .value = "off",\ 430 },\ 431 {\ 432 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 433 .property = "vme",\ 434 .value = "off",\ 435 },\ 436 {\ 437 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 438 .property = "vme",\ 439 .value = "off",\ 440 },\ 441 {\ 442 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 443 .property = "vme",\ 444 .value = "off",\ 445 },\ 446 {\ 447 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 448 .property = "vme",\ 449 .value = "off",\ 450 },\ 451 {\ 452 .driver = "Haswell" "-" TYPE_X86_CPU,\ 453 .property = "f16c",\ 454 .value = "off",\ 455 },\ 456 {\ 457 .driver = "Haswell" "-" TYPE_X86_CPU,\ 458 .property = "rdrand",\ 459 .value = "off",\ 460 },\ 461 {\ 462 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 463 .property = "f16c",\ 464 .value = "off",\ 465 },\ 466 {\ 467 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 468 .property = "rdrand",\ 469 .value = "off",\ 470 }, 471 472 #define PC_COMPAT_2_1 \ 473 PC_COMPAT_2_2 \ 474 HW_COMPAT_2_1 \ 475 {\ 476 .driver = "coreduo" "-" TYPE_X86_CPU,\ 477 .property = "vmx",\ 478 .value = "on",\ 479 },\ 480 {\ 481 .driver = "core2duo" "-" TYPE_X86_CPU,\ 482 .property = "vmx",\ 483 .value = "on",\ 484 }, 485 486 #define PC_COMPAT_2_0 \ 487 PC_COMPAT_2_1 \ 488 {\ 489 .driver = "virtio-scsi-pci",\ 490 .property = "any_layout",\ 491 .value = "off",\ 492 },{\ 493 .driver = "PIIX4_PM",\ 494 .property = "memory-hotplug-support",\ 495 .value = "off",\ 496 },\ 497 {\ 498 .driver = "apic",\ 499 .property = "version",\ 500 .value = stringify(0x11),\ 501 },\ 502 {\ 503 .driver = "nec-usb-xhci",\ 504 .property = "superspeed-ports-first",\ 505 .value = "off",\ 506 },\ 507 {\ 508 .driver = "nec-usb-xhci",\ 509 .property = "force-pcie-endcap",\ 510 .value = "on",\ 511 },\ 512 {\ 513 .driver = "pci-serial",\ 514 .property = "prog_if",\ 515 .value = stringify(0),\ 516 },\ 517 {\ 518 .driver = "pci-serial-2x",\ 519 .property = "prog_if",\ 520 .value = stringify(0),\ 521 },\ 522 {\ 523 .driver = "pci-serial-4x",\ 524 .property = "prog_if",\ 525 .value = stringify(0),\ 526 },\ 527 {\ 528 .driver = "virtio-net-pci",\ 529 .property = "guest_announce",\ 530 .value = "off",\ 531 },\ 532 {\ 533 .driver = "ICH9-LPC",\ 534 .property = "memory-hotplug-support",\ 535 .value = "off",\ 536 },{\ 537 .driver = "xio3130-downstream",\ 538 .property = COMPAT_PROP_PCP,\ 539 .value = "off",\ 540 },{\ 541 .driver = "ioh3420",\ 542 .property = COMPAT_PROP_PCP,\ 543 .value = "off",\ 544 }, 545 546 #define PC_COMPAT_1_7 \ 547 PC_COMPAT_2_0 \ 548 {\ 549 .driver = TYPE_USB_DEVICE,\ 550 .property = "msos-desc",\ 551 .value = "no",\ 552 },\ 553 {\ 554 .driver = "PIIX4_PM",\ 555 .property = "acpi-pci-hotplug-with-bridge-support",\ 556 .value = "off",\ 557 },\ 558 {\ 559 .driver = "hpet",\ 560 .property = HPET_INTCAP,\ 561 .value = stringify(4),\ 562 }, 563 564 #define PC_COMPAT_1_6 \ 565 PC_COMPAT_1_7 \ 566 {\ 567 .driver = "e1000",\ 568 .property = "mitigation",\ 569 .value = "off",\ 570 },{\ 571 .driver = "qemu64-" TYPE_X86_CPU,\ 572 .property = "model",\ 573 .value = stringify(2),\ 574 },{\ 575 .driver = "qemu32-" TYPE_X86_CPU,\ 576 .property = "model",\ 577 .value = stringify(3),\ 578 },{\ 579 .driver = "i440FX-pcihost",\ 580 .property = "short_root_bus",\ 581 .value = stringify(1),\ 582 },{\ 583 .driver = "q35-pcihost",\ 584 .property = "short_root_bus",\ 585 .value = stringify(1),\ 586 }, 587 588 #define PC_COMPAT_1_5 \ 589 PC_COMPAT_1_6 \ 590 {\ 591 .driver = "Conroe-" TYPE_X86_CPU,\ 592 .property = "model",\ 593 .value = stringify(2),\ 594 },{\ 595 .driver = "Conroe-" TYPE_X86_CPU,\ 596 .property = "level",\ 597 .value = stringify(2),\ 598 },{\ 599 .driver = "Penryn-" TYPE_X86_CPU,\ 600 .property = "model",\ 601 .value = stringify(2),\ 602 },{\ 603 .driver = "Penryn-" TYPE_X86_CPU,\ 604 .property = "level",\ 605 .value = stringify(2),\ 606 },{\ 607 .driver = "Nehalem-" TYPE_X86_CPU,\ 608 .property = "model",\ 609 .value = stringify(2),\ 610 },{\ 611 .driver = "Nehalem-" TYPE_X86_CPU,\ 612 .property = "level",\ 613 .value = stringify(2),\ 614 },{\ 615 .driver = "virtio-net-pci",\ 616 .property = "any_layout",\ 617 .value = "off",\ 618 },{\ 619 .driver = TYPE_X86_CPU,\ 620 .property = "pmu",\ 621 .value = "on",\ 622 },{\ 623 .driver = "i440FX-pcihost",\ 624 .property = "short_root_bus",\ 625 .value = stringify(0),\ 626 },{\ 627 .driver = "q35-pcihost",\ 628 .property = "short_root_bus",\ 629 .value = stringify(0),\ 630 }, 631 632 #define PC_COMPAT_1_4 \ 633 PC_COMPAT_1_5 \ 634 {\ 635 .driver = "scsi-hd",\ 636 .property = "discard_granularity",\ 637 .value = stringify(0),\ 638 },{\ 639 .driver = "scsi-cd",\ 640 .property = "discard_granularity",\ 641 .value = stringify(0),\ 642 },{\ 643 .driver = "scsi-disk",\ 644 .property = "discard_granularity",\ 645 .value = stringify(0),\ 646 },{\ 647 .driver = "ide-hd",\ 648 .property = "discard_granularity",\ 649 .value = stringify(0),\ 650 },{\ 651 .driver = "ide-cd",\ 652 .property = "discard_granularity",\ 653 .value = stringify(0),\ 654 },{\ 655 .driver = "ide-drive",\ 656 .property = "discard_granularity",\ 657 .value = stringify(0),\ 658 },{\ 659 .driver = "virtio-blk-pci",\ 660 .property = "discard_granularity",\ 661 .value = stringify(0),\ 662 },{\ 663 .driver = "virtio-serial-pci",\ 664 .property = "vectors",\ 665 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 666 .value = stringify(0xFFFFFFFF),\ 667 },{ \ 668 .driver = "virtio-net-pci", \ 669 .property = "ctrl_guest_offloads", \ 670 .value = "off", \ 671 },{\ 672 .driver = "e1000",\ 673 .property = "romfile",\ 674 .value = "pxe-e1000.rom",\ 675 },{\ 676 .driver = "ne2k_pci",\ 677 .property = "romfile",\ 678 .value = "pxe-ne2k_pci.rom",\ 679 },{\ 680 .driver = "pcnet",\ 681 .property = "romfile",\ 682 .value = "pxe-pcnet.rom",\ 683 },{\ 684 .driver = "rtl8139",\ 685 .property = "romfile",\ 686 .value = "pxe-rtl8139.rom",\ 687 },{\ 688 .driver = "virtio-net-pci",\ 689 .property = "romfile",\ 690 .value = "pxe-virtio.rom",\ 691 },{\ 692 .driver = "486-" TYPE_X86_CPU,\ 693 .property = "model",\ 694 .value = stringify(0),\ 695 },\ 696 {\ 697 .driver = "n270" "-" TYPE_X86_CPU,\ 698 .property = "movbe",\ 699 .value = "off",\ 700 },\ 701 {\ 702 .driver = "Westmere" "-" TYPE_X86_CPU,\ 703 .property = "pclmulqdq",\ 704 .value = "off",\ 705 }, 706 707 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 708 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 709 { \ 710 MachineClass *mc = MACHINE_CLASS(oc); \ 711 optsfn(mc); \ 712 mc->name = namestr; \ 713 mc->init = initfn; \ 714 } \ 715 static const TypeInfo pc_machine_type_##suffix = { \ 716 .name = namestr TYPE_MACHINE_SUFFIX, \ 717 .parent = TYPE_PC_MACHINE, \ 718 .class_init = pc_machine_##suffix##_class_init, \ 719 }; \ 720 static void pc_machine_init_##suffix(void) \ 721 { \ 722 type_register(&pc_machine_type_##suffix); \ 723 } \ 724 machine_init(pc_machine_init_##suffix) 725 726 #define SET_MACHINE_COMPAT(m, COMPAT) do { \ 727 static GlobalProperty props[] = { \ 728 COMPAT \ 729 { /* end of list */ } \ 730 }; \ 731 (m)->compat_props = props; \ 732 } while (0) 733 734 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 735 #endif 736