1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 #include "hw/compat.h" 18 19 #define HPET_INTCAP "hpet-intcap" 20 21 /** 22 * PCMachineState: 23 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 24 * address space begins. 25 * @hotplug_memory: hotplug memory addess space container 26 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 27 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 28 * backend's alignment value if provided 29 */ 30 struct PCMachineState { 31 /*< private >*/ 32 MachineState parent_obj; 33 34 /* <public> */ 35 ram_addr_t hotplug_memory_base; 36 MemoryRegion hotplug_memory; 37 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 41 uint64_t max_ram_below_4g; 42 OnOffAuto vmport; 43 bool enforce_aligned_dimm; 44 }; 45 46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 49 #define PC_MACHINE_VMPORT "vmport" 50 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm" 51 52 /** 53 * PCMachineClass: 54 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 55 */ 56 struct PCMachineClass { 57 /*< private >*/ 58 MachineClass parent_class; 59 60 /*< public >*/ 61 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 62 DeviceState *dev); 63 }; 64 65 typedef struct PCMachineState PCMachineState; 66 typedef struct PCMachineClass PCMachineClass; 67 68 #define TYPE_PC_MACHINE "generic-pc-machine" 69 #define PC_MACHINE(obj) \ 70 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 71 #define PC_MACHINE_GET_CLASS(obj) \ 72 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 73 #define PC_MACHINE_CLASS(klass) \ 74 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 75 76 void qemu_register_pc_machine(QEMUMachine *m); 77 78 /* PC-style peripherals (also used by other machines). */ 79 80 typedef struct PcPciInfo { 81 Range w32; 82 Range w64; 83 } PcPciInfo; 84 85 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 86 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 87 #define ACPI_PM_PROP_S4_VAL "s4_val" 88 #define ACPI_PM_PROP_SCI_INT "sci_int" 89 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 90 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 91 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 92 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 93 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 94 95 struct PcGuestInfo { 96 bool isapc_ram_fw; 97 hwaddr ram_size, ram_size_below_4g; 98 unsigned apic_id_limit; 99 bool apic_xrupt_override; 100 uint64_t numa_nodes; 101 uint64_t *node_mem; 102 uint64_t *node_cpu; 103 FWCfgState *fw_cfg; 104 int legacy_acpi_table_size; 105 bool has_acpi_build; 106 bool has_reserved_memory; 107 }; 108 109 /* parallel.c */ 110 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 111 { 112 DeviceState *dev; 113 ISADevice *isadev; 114 115 isadev = isa_try_create(bus, "isa-parallel"); 116 if (!isadev) { 117 return false; 118 } 119 dev = DEVICE(isadev); 120 qdev_prop_set_uint32(dev, "index", index); 121 qdev_prop_set_chr(dev, "chardev", chr); 122 if (qdev_init(dev) < 0) { 123 return false; 124 } 125 return true; 126 } 127 128 bool parallel_mm_init(MemoryRegion *address_space, 129 hwaddr base, int it_shift, qemu_irq irq, 130 CharDriverState *chr); 131 132 /* i8259.c */ 133 134 extern DeviceState *isa_pic; 135 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 136 qemu_irq *kvm_i8259_init(ISABus *bus); 137 int pic_read_irq(DeviceState *d); 138 int pic_get_output(DeviceState *d); 139 void pic_info(Monitor *mon, const QDict *qdict); 140 void irq_info(Monitor *mon, const QDict *qdict); 141 142 /* Global System Interrupts */ 143 144 #define GSI_NUM_PINS IOAPIC_NUM_PINS 145 146 typedef struct GSIState { 147 qemu_irq i8259_irq[ISA_NUM_IRQS]; 148 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 149 } GSIState; 150 151 void gsi_handler(void *opaque, int n, int level); 152 153 /* vmport.c */ 154 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 155 156 static inline void vmport_init(ISABus *bus) 157 { 158 isa_create_simple(bus, "vmport"); 159 } 160 161 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 162 void vmmouse_get_data(uint32_t *data); 163 void vmmouse_set_data(const uint32_t *data); 164 165 /* pckbd.c */ 166 167 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 168 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 169 MemoryRegion *region, ram_addr_t size, 170 hwaddr mask); 171 void i8042_isa_mouse_fake_event(void *opaque); 172 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 173 174 /* pc.c */ 175 extern int fd_bootchk; 176 177 void pc_register_ferr_irq(qemu_irq irq); 178 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 179 180 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 181 void pc_hot_add_cpu(const int64_t id, Error **errp); 182 void pc_acpi_init(const char *default_dsdt); 183 184 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 185 ram_addr_t above_4g_mem_size); 186 187 void pc_set_legacy_acpi_data_size(void); 188 189 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 190 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 191 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 192 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 193 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 194 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 195 196 197 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 198 MemoryRegion *pci_address_space); 199 200 FWCfgState *xen_load_linux(const char *kernel_filename, 201 const char *kernel_cmdline, 202 const char *initrd_filename, 203 ram_addr_t below_4g_mem_size, 204 PcGuestInfo *guest_info); 205 FWCfgState *pc_memory_init(MachineState *machine, 206 MemoryRegion *system_memory, 207 ram_addr_t below_4g_mem_size, 208 ram_addr_t above_4g_mem_size, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory, 211 PcGuestInfo *guest_info); 212 qemu_irq *pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 ISADevice **floppy, 217 bool no_vmport, 218 uint32 hpet_irqs); 219 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 220 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 221 const char *boot_device, MachineState *machine, 222 ISADevice *floppy, BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 229 230 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 231 232 /* acpi_piix.c */ 233 234 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 235 qemu_irq sci_irq, qemu_irq smi_irq, 236 int kvm_enabled, FWCfgState *fw_cfg, 237 DeviceState **piix4_pm); 238 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 239 240 /* hpet.c */ 241 extern int no_hpet; 242 243 /* piix_pci.c */ 244 struct PCII440FXState; 245 typedef struct PCII440FXState PCII440FXState; 246 247 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 248 ISABus **isa_bus, qemu_irq *pic, 249 MemoryRegion *address_space_mem, 250 MemoryRegion *address_space_io, 251 ram_addr_t ram_size, 252 ram_addr_t below_4g_mem_size, 253 ram_addr_t above_4g_mem_size, 254 MemoryRegion *pci_memory, 255 MemoryRegion *ram_memory); 256 257 PCIBus *find_i440fx(void); 258 /* piix4.c */ 259 extern PCIDevice *piix4_dev; 260 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 261 262 /* vga.c */ 263 enum vga_retrace_method { 264 VGA_RETRACE_DUMB, 265 VGA_RETRACE_PRECISE 266 }; 267 268 extern enum vga_retrace_method vga_retrace_method; 269 270 int isa_vga_mm_init(hwaddr vram_base, 271 hwaddr ctrl_base, int it_shift, 272 MemoryRegion *address_space); 273 274 /* ne2000.c */ 275 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 276 { 277 DeviceState *dev; 278 ISADevice *isadev; 279 280 qemu_check_nic_model(nd, "ne2k_isa"); 281 282 isadev = isa_try_create(bus, "ne2k_isa"); 283 if (!isadev) { 284 return false; 285 } 286 dev = DEVICE(isadev); 287 qdev_prop_set_uint32(dev, "iobase", base); 288 qdev_prop_set_uint32(dev, "irq", irq); 289 qdev_set_nic_properties(dev, nd); 290 qdev_init_nofail(dev); 291 return true; 292 } 293 294 /* pc_sysfw.c */ 295 void pc_system_firmware_init(MemoryRegion *rom_memory, 296 bool isapc_ram_fw); 297 298 /* pvpanic.c */ 299 uint16_t pvpanic_port(void); 300 301 /* e820 types */ 302 #define E820_RAM 1 303 #define E820_RESERVED 2 304 #define E820_ACPI 3 305 #define E820_NVS 4 306 #define E820_UNUSABLE 5 307 308 int e820_add_entry(uint64_t, uint64_t, uint32_t); 309 int e820_get_num_entries(void); 310 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 311 312 #define PC_COMPAT_2_0 \ 313 HW_COMPAT_2_1, \ 314 {\ 315 .driver = "virtio-scsi-pci",\ 316 .property = "any_layout",\ 317 .value = "off",\ 318 },{\ 319 .driver = "PIIX4_PM",\ 320 .property = "memory-hotplug-support",\ 321 .value = "off",\ 322 },\ 323 {\ 324 .driver = "apic",\ 325 .property = "version",\ 326 .value = stringify(0x11),\ 327 },\ 328 {\ 329 .driver = "nec-usb-xhci",\ 330 .property = "superspeed-ports-first",\ 331 .value = "off",\ 332 },\ 333 {\ 334 .driver = "nec-usb-xhci",\ 335 .property = "force-pcie-endcap",\ 336 .value = "on",\ 337 },\ 338 {\ 339 .driver = "pci-serial",\ 340 .property = "prog_if",\ 341 .value = stringify(0),\ 342 },\ 343 {\ 344 .driver = "pci-serial-2x",\ 345 .property = "prog_if",\ 346 .value = stringify(0),\ 347 },\ 348 {\ 349 .driver = "pci-serial-4x",\ 350 .property = "prog_if",\ 351 .value = stringify(0),\ 352 },\ 353 {\ 354 .driver = "virtio-net-pci",\ 355 .property = "guest_announce",\ 356 .value = "off",\ 357 },\ 358 {\ 359 .driver = "ICH9-LPC",\ 360 .property = "memory-hotplug-support",\ 361 .value = "off",\ 362 },{\ 363 .driver = "xio3130-downstream",\ 364 .property = COMPAT_PROP_PCP,\ 365 .value = "off",\ 366 },{\ 367 .driver = "ioh3420",\ 368 .property = COMPAT_PROP_PCP,\ 369 .value = "off",\ 370 } 371 372 #define PC_COMPAT_1_7 \ 373 PC_COMPAT_2_0, \ 374 {\ 375 .driver = TYPE_USB_DEVICE,\ 376 .property = "msos-desc",\ 377 .value = "no",\ 378 },\ 379 {\ 380 .driver = "PIIX4_PM",\ 381 .property = "acpi-pci-hotplug-with-bridge-support",\ 382 .value = "off",\ 383 },\ 384 {\ 385 .driver = "hpet",\ 386 .property = HPET_INTCAP,\ 387 .value = stringify(4),\ 388 } 389 390 #define PC_COMPAT_1_6 \ 391 PC_COMPAT_1_7, \ 392 {\ 393 .driver = "e1000",\ 394 .property = "mitigation",\ 395 .value = "off",\ 396 },{\ 397 .driver = "qemu64-" TYPE_X86_CPU,\ 398 .property = "model",\ 399 .value = stringify(2),\ 400 },{\ 401 .driver = "qemu32-" TYPE_X86_CPU,\ 402 .property = "model",\ 403 .value = stringify(3),\ 404 },{\ 405 .driver = "i440FX-pcihost",\ 406 .property = "short_root_bus",\ 407 .value = stringify(1),\ 408 },{\ 409 .driver = "q35-pcihost",\ 410 .property = "short_root_bus",\ 411 .value = stringify(1),\ 412 } 413 414 #define PC_COMPAT_1_5 \ 415 PC_COMPAT_1_6, \ 416 {\ 417 .driver = "Conroe-" TYPE_X86_CPU,\ 418 .property = "model",\ 419 .value = stringify(2),\ 420 },{\ 421 .driver = "Conroe-" TYPE_X86_CPU,\ 422 .property = "level",\ 423 .value = stringify(2),\ 424 },{\ 425 .driver = "Penryn-" TYPE_X86_CPU,\ 426 .property = "model",\ 427 .value = stringify(2),\ 428 },{\ 429 .driver = "Penryn-" TYPE_X86_CPU,\ 430 .property = "level",\ 431 .value = stringify(2),\ 432 },{\ 433 .driver = "Nehalem-" TYPE_X86_CPU,\ 434 .property = "model",\ 435 .value = stringify(2),\ 436 },{\ 437 .driver = "Nehalem-" TYPE_X86_CPU,\ 438 .property = "level",\ 439 .value = stringify(2),\ 440 },{\ 441 .driver = "virtio-net-pci",\ 442 .property = "any_layout",\ 443 .value = "off",\ 444 },{\ 445 .driver = TYPE_X86_CPU,\ 446 .property = "pmu",\ 447 .value = "on",\ 448 },{\ 449 .driver = "i440FX-pcihost",\ 450 .property = "short_root_bus",\ 451 .value = stringify(0),\ 452 },{\ 453 .driver = "q35-pcihost",\ 454 .property = "short_root_bus",\ 455 .value = stringify(0),\ 456 } 457 458 #define PC_COMPAT_1_4 \ 459 PC_COMPAT_1_5, \ 460 {\ 461 .driver = "scsi-hd",\ 462 .property = "discard_granularity",\ 463 .value = stringify(0),\ 464 },{\ 465 .driver = "scsi-cd",\ 466 .property = "discard_granularity",\ 467 .value = stringify(0),\ 468 },{\ 469 .driver = "scsi-disk",\ 470 .property = "discard_granularity",\ 471 .value = stringify(0),\ 472 },{\ 473 .driver = "ide-hd",\ 474 .property = "discard_granularity",\ 475 .value = stringify(0),\ 476 },{\ 477 .driver = "ide-cd",\ 478 .property = "discard_granularity",\ 479 .value = stringify(0),\ 480 },{\ 481 .driver = "ide-drive",\ 482 .property = "discard_granularity",\ 483 .value = stringify(0),\ 484 },{\ 485 .driver = "virtio-blk-pci",\ 486 .property = "discard_granularity",\ 487 .value = stringify(0),\ 488 },{\ 489 .driver = "virtio-serial-pci",\ 490 .property = "vectors",\ 491 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 492 .value = stringify(0xFFFFFFFF),\ 493 },{ \ 494 .driver = "virtio-net-pci", \ 495 .property = "ctrl_guest_offloads", \ 496 .value = "off", \ 497 },{\ 498 .driver = "e1000",\ 499 .property = "romfile",\ 500 .value = "pxe-e1000.rom",\ 501 },{\ 502 .driver = "ne2k_pci",\ 503 .property = "romfile",\ 504 .value = "pxe-ne2k_pci.rom",\ 505 },{\ 506 .driver = "pcnet",\ 507 .property = "romfile",\ 508 .value = "pxe-pcnet.rom",\ 509 },{\ 510 .driver = "rtl8139",\ 511 .property = "romfile",\ 512 .value = "pxe-rtl8139.rom",\ 513 },{\ 514 .driver = "virtio-net-pci",\ 515 .property = "romfile",\ 516 .value = "pxe-virtio.rom",\ 517 },{\ 518 .driver = "486-" TYPE_X86_CPU,\ 519 .property = "model",\ 520 .value = stringify(0),\ 521 } 522 523 #define PC_COMMON_MACHINE_OPTIONS \ 524 .default_boot_order = "cad" 525 526 #define PC_DEFAULT_MACHINE_OPTIONS \ 527 PC_COMMON_MACHINE_OPTIONS, \ 528 .hot_add_cpu = pc_hot_add_cpu, \ 529 .max_cpus = 255 530 531 #endif 532