1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 MemoryHotplugState hotplug_memory; 36 Notifier machine_done; 37 38 /* Pointers to devices and objects: */ 39 HotplugHandler *acpi_dev; 40 ISADevice *rtc; 41 PCIBus *bus; 42 FWCfgState *fw_cfg; 43 qemu_irq *gsi; 44 45 /* Configuration options: */ 46 uint64_t max_ram_below_4g; 47 OnOffAuto vmport; 48 OnOffAuto smm; 49 50 AcpiNVDIMMState acpi_nvdimm_state; 51 52 bool acpi_build_enabled; 53 bool smbus; 54 bool sata; 55 bool pit; 56 57 /* RAM information (sizes, addresses, configuration): */ 58 ram_addr_t below_4g_mem_size, above_4g_mem_size; 59 60 /* CPU and apic information: */ 61 bool apic_xrupt_override; 62 unsigned apic_id_limit; 63 uint16_t boot_cpus; 64 65 /* NUMA information: */ 66 uint64_t numa_nodes; 67 uint64_t *node_mem; 68 69 /* Address space used by IOAPIC device. All IOAPIC interrupts 70 * will be translated to MSI messages in the address space. */ 71 AddressSpace *ioapic_as; 72 }; 73 74 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 75 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 76 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 77 #define PC_MACHINE_VMPORT "vmport" 78 #define PC_MACHINE_SMM "smm" 79 #define PC_MACHINE_NVDIMM "nvdimm" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 const char *default_nic_model; 118 119 /* Compat options: */ 120 121 /* ACPI compat: */ 122 bool has_acpi_build; 123 bool rsdp_in_ram; 124 int legacy_acpi_table_size; 125 unsigned acpi_data_size; 126 127 /* SMBIOS compat: */ 128 bool smbios_defaults; 129 bool smbios_legacy_mode; 130 bool smbios_uuid_encoded; 131 132 /* RAM / address space compat: */ 133 bool gigabyte_align; 134 bool has_reserved_memory; 135 bool enforce_aligned_dimm; 136 bool broken_reserved_end; 137 138 /* TSC rate migration: */ 139 bool save_tsc_khz; 140 /* generate legacy CPU hotplug AML */ 141 bool legacy_cpu_hotplug; 142 143 /* use DMA capable linuxboot option rom */ 144 bool linuxboot_dma_enabled; 145 }; 146 147 #define TYPE_PC_MACHINE "generic-pc-machine" 148 #define PC_MACHINE(obj) \ 149 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 150 #define PC_MACHINE_GET_CLASS(obj) \ 151 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 152 #define PC_MACHINE_CLASS(klass) \ 153 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 154 155 /* parallel.c */ 156 157 void parallel_hds_isa_init(ISABus *bus, int n); 158 159 bool parallel_mm_init(MemoryRegion *address_space, 160 hwaddr base, int it_shift, qemu_irq irq, 161 Chardev *chr); 162 163 /* i8259.c */ 164 165 extern DeviceState *isa_pic; 166 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 167 qemu_irq *kvm_i8259_init(ISABus *bus); 168 int pic_read_irq(DeviceState *d); 169 int pic_get_output(DeviceState *d); 170 171 /* ioapic.c */ 172 173 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 174 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 175 176 /* Global System Interrupts */ 177 178 #define GSI_NUM_PINS IOAPIC_NUM_PINS 179 180 typedef struct GSIState { 181 qemu_irq i8259_irq[ISA_NUM_IRQS]; 182 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 183 } GSIState; 184 185 void gsi_handler(void *opaque, int n, int level); 186 187 /* vmport.c */ 188 #define TYPE_VMPORT "vmport" 189 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 190 191 static inline void vmport_init(ISABus *bus) 192 { 193 isa_create_simple(bus, TYPE_VMPORT); 194 } 195 196 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 197 void vmmouse_get_data(uint32_t *data); 198 void vmmouse_set_data(const uint32_t *data); 199 200 /* pckbd.c */ 201 #define I8042_A20_LINE "a20" 202 203 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 204 MemoryRegion *region, ram_addr_t size, 205 hwaddr mask); 206 void i8042_isa_mouse_fake_event(void *opaque); 207 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 208 209 /* pc.c */ 210 extern int fd_bootchk; 211 212 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 213 void pc_register_ferr_irq(qemu_irq irq); 214 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 215 216 void pc_cpus_init(PCMachineState *pcms); 217 void pc_hot_add_cpu(const int64_t id, Error **errp); 218 void pc_acpi_init(const char *default_dsdt); 219 220 void pc_guest_info_init(PCMachineState *pcms); 221 222 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 223 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 224 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 225 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 226 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 227 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 228 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 229 230 231 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 232 MemoryRegion *pci_address_space); 233 234 void xen_load_linux(PCMachineState *pcms); 235 void pc_memory_init(PCMachineState *pcms, 236 MemoryRegion *system_memory, 237 MemoryRegion *rom_memory, 238 MemoryRegion **ram_memory); 239 uint64_t pc_pci_hole64_start(void); 240 qemu_irq pc_allocate_cpu_irq(void); 241 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 242 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 243 ISADevice **rtc_state, 244 bool create_fdctrl, 245 bool no_vmport, 246 bool has_pit, 247 uint32_t hpet_irqs); 248 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 249 void pc_cmos_init(PCMachineState *pcms, 250 BusState *ide0, BusState *ide1, 251 ISADevice *s); 252 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 253 void pc_pci_device_init(PCIBus *pci_bus); 254 255 typedef void (*cpu_set_smm_t)(int smm, void *arg); 256 257 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 258 259 ISADevice *pc_find_fdc0(void); 260 int cmos_get_fd_drive_type(FloppyDriveType fd0); 261 262 #define FW_CFG_IO_BASE 0x510 263 264 #define PORT92_A20_LINE "a20" 265 266 /* acpi_piix.c */ 267 268 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 269 qemu_irq sci_irq, qemu_irq smi_irq, 270 int smm_enabled, DeviceState **piix4_pm); 271 272 /* hpet.c */ 273 extern int no_hpet; 274 275 /* piix_pci.c */ 276 struct PCII440FXState; 277 typedef struct PCII440FXState PCII440FXState; 278 279 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 280 #define TYPE_I440FX_PCI_DEVICE "i440FX" 281 282 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 283 284 /* 285 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 286 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 287 */ 288 #define RCR_IOPORT 0xcf9 289 290 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 291 PCII440FXState **pi440fx_state, int *piix_devfn, 292 ISABus **isa_bus, qemu_irq *pic, 293 MemoryRegion *address_space_mem, 294 MemoryRegion *address_space_io, 295 ram_addr_t ram_size, 296 ram_addr_t below_4g_mem_size, 297 ram_addr_t above_4g_mem_size, 298 MemoryRegion *pci_memory, 299 MemoryRegion *ram_memory); 300 301 PCIBus *find_i440fx(void); 302 /* piix4.c */ 303 extern PCIDevice *piix4_dev; 304 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 305 306 /* pc_sysfw.c */ 307 void pc_system_firmware_init(MemoryRegion *rom_memory, 308 bool isapc_ram_fw); 309 310 /* acpi-build.c */ 311 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 312 const CPUArchIdList *apic_ids, GArray *entry); 313 314 /* e820 types */ 315 #define E820_RAM 1 316 #define E820_RESERVED 2 317 #define E820_ACPI 3 318 #define E820_NVS 4 319 #define E820_UNUSABLE 5 320 321 int e820_add_entry(uint64_t, uint64_t, uint32_t); 322 int e820_get_num_entries(void); 323 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 324 325 #define PC_COMPAT_2_11 \ 326 HW_COMPAT_2_11 \ 327 {\ 328 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 329 .property = "clflushopt",\ 330 .value = "off",\ 331 }, 332 333 #define PC_COMPAT_2_10 \ 334 HW_COMPAT_2_10 \ 335 {\ 336 .driver = TYPE_X86_CPU,\ 337 .property = "x-hv-max-vps",\ 338 .value = "0x40",\ 339 },{\ 340 .driver = "i440FX-pcihost",\ 341 .property = "x-pci-hole64-fix",\ 342 .value = "off",\ 343 },{\ 344 .driver = "q35-pcihost",\ 345 .property = "x-pci-hole64-fix",\ 346 .value = "off",\ 347 }, 348 349 #define PC_COMPAT_2_9 \ 350 HW_COMPAT_2_9 \ 351 {\ 352 .driver = "mch",\ 353 .property = "extended-tseg-mbytes",\ 354 .value = stringify(0),\ 355 },\ 356 357 #define PC_COMPAT_2_8 \ 358 HW_COMPAT_2_8 \ 359 {\ 360 .driver = TYPE_X86_CPU,\ 361 .property = "tcg-cpuid",\ 362 .value = "off",\ 363 },\ 364 {\ 365 .driver = "kvmclock",\ 366 .property = "x-mach-use-reliable-get-clock",\ 367 .value = "off",\ 368 },\ 369 {\ 370 .driver = "ICH9-LPC",\ 371 .property = "x-smi-broadcast",\ 372 .value = "off",\ 373 },\ 374 {\ 375 .driver = TYPE_X86_CPU,\ 376 .property = "vmware-cpuid-freq",\ 377 .value = "off",\ 378 },\ 379 {\ 380 .driver = "Haswell-" TYPE_X86_CPU,\ 381 .property = "stepping",\ 382 .value = "1",\ 383 }, 384 385 #define PC_COMPAT_2_7 \ 386 HW_COMPAT_2_7 \ 387 {\ 388 .driver = TYPE_X86_CPU,\ 389 .property = "l3-cache",\ 390 .value = "off",\ 391 },\ 392 {\ 393 .driver = TYPE_X86_CPU,\ 394 .property = "full-cpuid-auto-level",\ 395 .value = "off",\ 396 },\ 397 {\ 398 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 399 .property = "family",\ 400 .value = "15",\ 401 },\ 402 {\ 403 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 404 .property = "model",\ 405 .value = "6",\ 406 },\ 407 {\ 408 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 409 .property = "stepping",\ 410 .value = "1",\ 411 },\ 412 {\ 413 .driver = "isa-pcspk",\ 414 .property = "migrate",\ 415 .value = "off",\ 416 }, 417 418 #define PC_COMPAT_2_6 \ 419 HW_COMPAT_2_6 \ 420 {\ 421 .driver = TYPE_X86_CPU,\ 422 .property = "cpuid-0xb",\ 423 .value = "off",\ 424 },{\ 425 .driver = "vmxnet3",\ 426 .property = "romfile",\ 427 .value = "",\ 428 },\ 429 {\ 430 .driver = TYPE_X86_CPU,\ 431 .property = "fill-mtrr-mask",\ 432 .value = "off",\ 433 },\ 434 {\ 435 .driver = "apic-common",\ 436 .property = "legacy-instance-id",\ 437 .value = "on",\ 438 }, 439 440 #define PC_COMPAT_2_5 \ 441 HW_COMPAT_2_5 442 443 /* Helper for setting model-id for CPU models that changed model-id 444 * depending on QEMU versions up to QEMU 2.4. 445 */ 446 #define PC_CPU_MODEL_IDS(v) \ 447 {\ 448 .driver = "qemu32-" TYPE_X86_CPU,\ 449 .property = "model-id",\ 450 .value = "QEMU Virtual CPU version " v,\ 451 },\ 452 {\ 453 .driver = "qemu64-" TYPE_X86_CPU,\ 454 .property = "model-id",\ 455 .value = "QEMU Virtual CPU version " v,\ 456 },\ 457 {\ 458 .driver = "athlon-" TYPE_X86_CPU,\ 459 .property = "model-id",\ 460 .value = "QEMU Virtual CPU version " v,\ 461 }, 462 463 #define PC_COMPAT_2_4 \ 464 HW_COMPAT_2_4 \ 465 PC_CPU_MODEL_IDS("2.4.0") \ 466 {\ 467 .driver = "Haswell-" TYPE_X86_CPU,\ 468 .property = "abm",\ 469 .value = "off",\ 470 },\ 471 {\ 472 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 473 .property = "abm",\ 474 .value = "off",\ 475 },\ 476 {\ 477 .driver = "Broadwell-" TYPE_X86_CPU,\ 478 .property = "abm",\ 479 .value = "off",\ 480 },\ 481 {\ 482 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 483 .property = "abm",\ 484 .value = "off",\ 485 },\ 486 {\ 487 .driver = "host" "-" TYPE_X86_CPU,\ 488 .property = "host-cache-info",\ 489 .value = "on",\ 490 },\ 491 {\ 492 .driver = TYPE_X86_CPU,\ 493 .property = "check",\ 494 .value = "off",\ 495 },\ 496 {\ 497 .driver = "qemu64" "-" TYPE_X86_CPU,\ 498 .property = "sse4a",\ 499 .value = "on",\ 500 },\ 501 {\ 502 .driver = "qemu64" "-" TYPE_X86_CPU,\ 503 .property = "abm",\ 504 .value = "on",\ 505 },\ 506 {\ 507 .driver = "qemu64" "-" TYPE_X86_CPU,\ 508 .property = "popcnt",\ 509 .value = "on",\ 510 },\ 511 {\ 512 .driver = "qemu32" "-" TYPE_X86_CPU,\ 513 .property = "popcnt",\ 514 .value = "on",\ 515 },{\ 516 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 517 .property = "rdtscp",\ 518 .value = "on",\ 519 },{\ 520 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 521 .property = "rdtscp",\ 522 .value = "on",\ 523 },{\ 524 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 525 .property = "rdtscp",\ 526 .value = "on",\ 527 },{\ 528 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 529 .property = "rdtscp",\ 530 .value = "on",\ 531 }, 532 533 534 #define PC_COMPAT_2_3 \ 535 HW_COMPAT_2_3 \ 536 PC_CPU_MODEL_IDS("2.3.0") \ 537 {\ 538 .driver = TYPE_X86_CPU,\ 539 .property = "arat",\ 540 .value = "off",\ 541 },{\ 542 .driver = "qemu64" "-" TYPE_X86_CPU,\ 543 .property = "min-level",\ 544 .value = stringify(4),\ 545 },{\ 546 .driver = "kvm64" "-" TYPE_X86_CPU,\ 547 .property = "min-level",\ 548 .value = stringify(5),\ 549 },{\ 550 .driver = "pentium3" "-" TYPE_X86_CPU,\ 551 .property = "min-level",\ 552 .value = stringify(2),\ 553 },{\ 554 .driver = "n270" "-" TYPE_X86_CPU,\ 555 .property = "min-level",\ 556 .value = stringify(5),\ 557 },{\ 558 .driver = "Conroe" "-" TYPE_X86_CPU,\ 559 .property = "min-level",\ 560 .value = stringify(4),\ 561 },{\ 562 .driver = "Penryn" "-" TYPE_X86_CPU,\ 563 .property = "min-level",\ 564 .value = stringify(4),\ 565 },{\ 566 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 567 .property = "min-level",\ 568 .value = stringify(4),\ 569 },{\ 570 .driver = "n270" "-" TYPE_X86_CPU,\ 571 .property = "min-xlevel",\ 572 .value = stringify(0x8000000a),\ 573 },{\ 574 .driver = "Penryn" "-" TYPE_X86_CPU,\ 575 .property = "min-xlevel",\ 576 .value = stringify(0x8000000a),\ 577 },{\ 578 .driver = "Conroe" "-" TYPE_X86_CPU,\ 579 .property = "min-xlevel",\ 580 .value = stringify(0x8000000a),\ 581 },{\ 582 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 583 .property = "min-xlevel",\ 584 .value = stringify(0x8000000a),\ 585 },{\ 586 .driver = "Westmere" "-" TYPE_X86_CPU,\ 587 .property = "min-xlevel",\ 588 .value = stringify(0x8000000a),\ 589 },{\ 590 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 591 .property = "min-xlevel",\ 592 .value = stringify(0x8000000a),\ 593 },{\ 594 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 595 .property = "min-xlevel",\ 596 .value = stringify(0x8000000a),\ 597 },{\ 598 .driver = "Haswell" "-" TYPE_X86_CPU,\ 599 .property = "min-xlevel",\ 600 .value = stringify(0x8000000a),\ 601 },{\ 602 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 603 .property = "min-xlevel",\ 604 .value = stringify(0x8000000a),\ 605 },{\ 606 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 607 .property = "min-xlevel",\ 608 .value = stringify(0x8000000a),\ 609 },{\ 610 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 611 .property = "min-xlevel",\ 612 .value = stringify(0x8000000a),\ 613 },{\ 614 .driver = TYPE_X86_CPU,\ 615 .property = "kvm-no-smi-migration",\ 616 .value = "on",\ 617 }, 618 619 #define PC_COMPAT_2_2 \ 620 HW_COMPAT_2_2 \ 621 PC_CPU_MODEL_IDS("2.3.0") \ 622 {\ 623 .driver = "kvm64" "-" TYPE_X86_CPU,\ 624 .property = "vme",\ 625 .value = "off",\ 626 },\ 627 {\ 628 .driver = "kvm32" "-" TYPE_X86_CPU,\ 629 .property = "vme",\ 630 .value = "off",\ 631 },\ 632 {\ 633 .driver = "Conroe" "-" TYPE_X86_CPU,\ 634 .property = "vme",\ 635 .value = "off",\ 636 },\ 637 {\ 638 .driver = "Penryn" "-" TYPE_X86_CPU,\ 639 .property = "vme",\ 640 .value = "off",\ 641 },\ 642 {\ 643 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 644 .property = "vme",\ 645 .value = "off",\ 646 },\ 647 {\ 648 .driver = "Westmere" "-" TYPE_X86_CPU,\ 649 .property = "vme",\ 650 .value = "off",\ 651 },\ 652 {\ 653 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 654 .property = "vme",\ 655 .value = "off",\ 656 },\ 657 {\ 658 .driver = "Haswell" "-" TYPE_X86_CPU,\ 659 .property = "vme",\ 660 .value = "off",\ 661 },\ 662 {\ 663 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 664 .property = "vme",\ 665 .value = "off",\ 666 },\ 667 {\ 668 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 669 .property = "vme",\ 670 .value = "off",\ 671 },\ 672 {\ 673 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 674 .property = "vme",\ 675 .value = "off",\ 676 },\ 677 {\ 678 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 679 .property = "vme",\ 680 .value = "off",\ 681 },\ 682 {\ 683 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 684 .property = "vme",\ 685 .value = "off",\ 686 },\ 687 {\ 688 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 689 .property = "vme",\ 690 .value = "off",\ 691 },\ 692 {\ 693 .driver = "Haswell" "-" TYPE_X86_CPU,\ 694 .property = "f16c",\ 695 .value = "off",\ 696 },\ 697 {\ 698 .driver = "Haswell" "-" TYPE_X86_CPU,\ 699 .property = "rdrand",\ 700 .value = "off",\ 701 },\ 702 {\ 703 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 704 .property = "f16c",\ 705 .value = "off",\ 706 },\ 707 {\ 708 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 709 .property = "rdrand",\ 710 .value = "off",\ 711 }, 712 713 #define PC_COMPAT_2_1 \ 714 HW_COMPAT_2_1 \ 715 PC_CPU_MODEL_IDS("2.1.0") \ 716 {\ 717 .driver = "coreduo" "-" TYPE_X86_CPU,\ 718 .property = "vmx",\ 719 .value = "on",\ 720 },\ 721 {\ 722 .driver = "core2duo" "-" TYPE_X86_CPU,\ 723 .property = "vmx",\ 724 .value = "on",\ 725 }, 726 727 #define PC_COMPAT_2_0 \ 728 PC_CPU_MODEL_IDS("2.0.0") \ 729 {\ 730 .driver = "virtio-scsi-pci",\ 731 .property = "any_layout",\ 732 .value = "off",\ 733 },{\ 734 .driver = "PIIX4_PM",\ 735 .property = "memory-hotplug-support",\ 736 .value = "off",\ 737 },\ 738 {\ 739 .driver = "apic",\ 740 .property = "version",\ 741 .value = stringify(0x11),\ 742 },\ 743 {\ 744 .driver = "nec-usb-xhci",\ 745 .property = "superspeed-ports-first",\ 746 .value = "off",\ 747 },\ 748 {\ 749 .driver = "nec-usb-xhci",\ 750 .property = "force-pcie-endcap",\ 751 .value = "on",\ 752 },\ 753 {\ 754 .driver = "pci-serial",\ 755 .property = "prog_if",\ 756 .value = stringify(0),\ 757 },\ 758 {\ 759 .driver = "pci-serial-2x",\ 760 .property = "prog_if",\ 761 .value = stringify(0),\ 762 },\ 763 {\ 764 .driver = "pci-serial-4x",\ 765 .property = "prog_if",\ 766 .value = stringify(0),\ 767 },\ 768 {\ 769 .driver = "virtio-net-pci",\ 770 .property = "guest_announce",\ 771 .value = "off",\ 772 },\ 773 {\ 774 .driver = "ICH9-LPC",\ 775 .property = "memory-hotplug-support",\ 776 .value = "off",\ 777 },{\ 778 .driver = "xio3130-downstream",\ 779 .property = COMPAT_PROP_PCP,\ 780 .value = "off",\ 781 },{\ 782 .driver = "ioh3420",\ 783 .property = COMPAT_PROP_PCP,\ 784 .value = "off",\ 785 }, 786 787 #define PC_COMPAT_1_7 \ 788 PC_CPU_MODEL_IDS("1.7.0") \ 789 {\ 790 .driver = TYPE_USB_DEVICE,\ 791 .property = "msos-desc",\ 792 .value = "no",\ 793 },\ 794 {\ 795 .driver = "PIIX4_PM",\ 796 .property = "acpi-pci-hotplug-with-bridge-support",\ 797 .value = "off",\ 798 },\ 799 {\ 800 .driver = "hpet",\ 801 .property = HPET_INTCAP,\ 802 .value = stringify(4),\ 803 }, 804 805 #define PC_COMPAT_1_6 \ 806 PC_CPU_MODEL_IDS("1.6.0") \ 807 {\ 808 .driver = "e1000",\ 809 .property = "mitigation",\ 810 .value = "off",\ 811 },{\ 812 .driver = "qemu64-" TYPE_X86_CPU,\ 813 .property = "model",\ 814 .value = stringify(2),\ 815 },{\ 816 .driver = "qemu32-" TYPE_X86_CPU,\ 817 .property = "model",\ 818 .value = stringify(3),\ 819 },{\ 820 .driver = "i440FX-pcihost",\ 821 .property = "short_root_bus",\ 822 .value = stringify(1),\ 823 },{\ 824 .driver = "q35-pcihost",\ 825 .property = "short_root_bus",\ 826 .value = stringify(1),\ 827 }, 828 829 #define PC_COMPAT_1_5 \ 830 PC_CPU_MODEL_IDS("1.5.0") \ 831 {\ 832 .driver = "Conroe-" TYPE_X86_CPU,\ 833 .property = "model",\ 834 .value = stringify(2),\ 835 },{\ 836 .driver = "Conroe-" TYPE_X86_CPU,\ 837 .property = "min-level",\ 838 .value = stringify(2),\ 839 },{\ 840 .driver = "Penryn-" TYPE_X86_CPU,\ 841 .property = "model",\ 842 .value = stringify(2),\ 843 },{\ 844 .driver = "Penryn-" TYPE_X86_CPU,\ 845 .property = "min-level",\ 846 .value = stringify(2),\ 847 },{\ 848 .driver = "Nehalem-" TYPE_X86_CPU,\ 849 .property = "model",\ 850 .value = stringify(2),\ 851 },{\ 852 .driver = "Nehalem-" TYPE_X86_CPU,\ 853 .property = "min-level",\ 854 .value = stringify(2),\ 855 },{\ 856 .driver = "virtio-net-pci",\ 857 .property = "any_layout",\ 858 .value = "off",\ 859 },{\ 860 .driver = TYPE_X86_CPU,\ 861 .property = "pmu",\ 862 .value = "on",\ 863 },{\ 864 .driver = "i440FX-pcihost",\ 865 .property = "short_root_bus",\ 866 .value = stringify(0),\ 867 },{\ 868 .driver = "q35-pcihost",\ 869 .property = "short_root_bus",\ 870 .value = stringify(0),\ 871 }, 872 873 #define PC_COMPAT_1_4 \ 874 PC_CPU_MODEL_IDS("1.4.0") \ 875 {\ 876 .driver = "scsi-hd",\ 877 .property = "discard_granularity",\ 878 .value = stringify(0),\ 879 },{\ 880 .driver = "scsi-cd",\ 881 .property = "discard_granularity",\ 882 .value = stringify(0),\ 883 },{\ 884 .driver = "scsi-disk",\ 885 .property = "discard_granularity",\ 886 .value = stringify(0),\ 887 },{\ 888 .driver = "ide-hd",\ 889 .property = "discard_granularity",\ 890 .value = stringify(0),\ 891 },{\ 892 .driver = "ide-cd",\ 893 .property = "discard_granularity",\ 894 .value = stringify(0),\ 895 },{\ 896 .driver = "ide-drive",\ 897 .property = "discard_granularity",\ 898 .value = stringify(0),\ 899 },{\ 900 .driver = "virtio-blk-pci",\ 901 .property = "discard_granularity",\ 902 .value = stringify(0),\ 903 },{\ 904 .driver = "virtio-serial-pci",\ 905 .property = "vectors",\ 906 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 907 .value = stringify(0xFFFFFFFF),\ 908 },{ \ 909 .driver = "virtio-net-pci", \ 910 .property = "ctrl_guest_offloads", \ 911 .value = "off", \ 912 },{\ 913 .driver = "e1000",\ 914 .property = "romfile",\ 915 .value = "pxe-e1000.rom",\ 916 },{\ 917 .driver = "ne2k_pci",\ 918 .property = "romfile",\ 919 .value = "pxe-ne2k_pci.rom",\ 920 },{\ 921 .driver = "pcnet",\ 922 .property = "romfile",\ 923 .value = "pxe-pcnet.rom",\ 924 },{\ 925 .driver = "rtl8139",\ 926 .property = "romfile",\ 927 .value = "pxe-rtl8139.rom",\ 928 },{\ 929 .driver = "virtio-net-pci",\ 930 .property = "romfile",\ 931 .value = "pxe-virtio.rom",\ 932 },{\ 933 .driver = "486-" TYPE_X86_CPU,\ 934 .property = "model",\ 935 .value = stringify(0),\ 936 },\ 937 {\ 938 .driver = "n270" "-" TYPE_X86_CPU,\ 939 .property = "movbe",\ 940 .value = "off",\ 941 },\ 942 {\ 943 .driver = "Westmere" "-" TYPE_X86_CPU,\ 944 .property = "pclmulqdq",\ 945 .value = "off",\ 946 }, 947 948 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 949 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 950 { \ 951 MachineClass *mc = MACHINE_CLASS(oc); \ 952 optsfn(mc); \ 953 mc->init = initfn; \ 954 } \ 955 static const TypeInfo pc_machine_type_##suffix = { \ 956 .name = namestr TYPE_MACHINE_SUFFIX, \ 957 .parent = TYPE_PC_MACHINE, \ 958 .class_init = pc_machine_##suffix##_class_init, \ 959 }; \ 960 static void pc_machine_init_##suffix(void) \ 961 { \ 962 type_register(&pc_machine_type_##suffix); \ 963 } \ 964 type_init(pc_machine_init_##suffix) 965 966 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 967 #endif 968