1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 MemoryHotplugState hotplug_memory; 36 Notifier machine_done; 37 38 /* Pointers to devices and objects: */ 39 HotplugHandler *acpi_dev; 40 ISADevice *rtc; 41 PCIBus *bus; 42 FWCfgState *fw_cfg; 43 qemu_irq *gsi; 44 45 /* Configuration options: */ 46 uint64_t max_ram_below_4g; 47 OnOffAuto vmport; 48 OnOffAuto smm; 49 50 AcpiNVDIMMState acpi_nvdimm_state; 51 52 bool acpi_build_enabled; 53 bool smbus; 54 bool sata; 55 bool pit; 56 57 /* RAM information (sizes, addresses, configuration): */ 58 ram_addr_t below_4g_mem_size, above_4g_mem_size; 59 60 /* CPU and apic information: */ 61 bool apic_xrupt_override; 62 unsigned apic_id_limit; 63 uint16_t boot_cpus; 64 65 /* NUMA information: */ 66 uint64_t numa_nodes; 67 uint64_t *node_mem; 68 69 /* Address space used by IOAPIC device. All IOAPIC interrupts 70 * will be translated to MSI messages in the address space. */ 71 AddressSpace *ioapic_as; 72 }; 73 74 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 75 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 76 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 77 #define PC_MACHINE_VMPORT "vmport" 78 #define PC_MACHINE_SMM "smm" 79 #define PC_MACHINE_NVDIMM "nvdimm" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 const char *default_nic_model; 118 119 /* Compat options: */ 120 121 /* ACPI compat: */ 122 bool has_acpi_build; 123 bool rsdp_in_ram; 124 int legacy_acpi_table_size; 125 unsigned acpi_data_size; 126 127 /* SMBIOS compat: */ 128 bool smbios_defaults; 129 bool smbios_legacy_mode; 130 bool smbios_uuid_encoded; 131 132 /* RAM / address space compat: */ 133 bool gigabyte_align; 134 bool has_reserved_memory; 135 bool enforce_aligned_dimm; 136 bool broken_reserved_end; 137 138 /* TSC rate migration: */ 139 bool save_tsc_khz; 140 /* generate legacy CPU hotplug AML */ 141 bool legacy_cpu_hotplug; 142 143 /* use DMA capable linuxboot option rom */ 144 bool linuxboot_dma_enabled; 145 }; 146 147 #define TYPE_PC_MACHINE "generic-pc-machine" 148 #define PC_MACHINE(obj) \ 149 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 150 #define PC_MACHINE_GET_CLASS(obj) \ 151 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 152 #define PC_MACHINE_CLASS(klass) \ 153 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 154 155 /* i8259.c */ 156 157 extern DeviceState *isa_pic; 158 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 159 qemu_irq *kvm_i8259_init(ISABus *bus); 160 int pic_read_irq(DeviceState *d); 161 int pic_get_output(DeviceState *d); 162 163 /* ioapic.c */ 164 165 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 166 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 167 168 /* Global System Interrupts */ 169 170 #define GSI_NUM_PINS IOAPIC_NUM_PINS 171 172 typedef struct GSIState { 173 qemu_irq i8259_irq[ISA_NUM_IRQS]; 174 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 175 } GSIState; 176 177 void gsi_handler(void *opaque, int n, int level); 178 179 /* vmport.c */ 180 #define TYPE_VMPORT "vmport" 181 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 182 183 static inline void vmport_init(ISABus *bus) 184 { 185 isa_create_simple(bus, TYPE_VMPORT); 186 } 187 188 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 189 void vmmouse_get_data(uint32_t *data); 190 void vmmouse_set_data(const uint32_t *data); 191 192 /* pckbd.c */ 193 #define I8042_A20_LINE "a20" 194 195 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 196 MemoryRegion *region, ram_addr_t size, 197 hwaddr mask); 198 void i8042_isa_mouse_fake_event(void *opaque); 199 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 200 201 /* pc.c */ 202 extern int fd_bootchk; 203 204 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 205 void pc_register_ferr_irq(qemu_irq irq); 206 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 207 208 void pc_cpus_init(PCMachineState *pcms); 209 void pc_hot_add_cpu(const int64_t id, Error **errp); 210 void pc_acpi_init(const char *default_dsdt); 211 212 void pc_guest_info_init(PCMachineState *pcms); 213 214 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 215 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 216 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 217 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 218 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 219 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 220 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 221 222 223 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 224 MemoryRegion *pci_address_space); 225 226 void xen_load_linux(PCMachineState *pcms); 227 void pc_memory_init(PCMachineState *pcms, 228 MemoryRegion *system_memory, 229 MemoryRegion *rom_memory, 230 MemoryRegion **ram_memory); 231 uint64_t pc_pci_hole64_start(void); 232 qemu_irq pc_allocate_cpu_irq(void); 233 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 234 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 235 ISADevice **rtc_state, 236 bool create_fdctrl, 237 bool no_vmport, 238 bool has_pit, 239 uint32_t hpet_irqs); 240 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 241 void pc_cmos_init(PCMachineState *pcms, 242 BusState *ide0, BusState *ide1, 243 ISADevice *s); 244 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 245 void pc_pci_device_init(PCIBus *pci_bus); 246 247 typedef void (*cpu_set_smm_t)(int smm, void *arg); 248 249 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 250 251 ISADevice *pc_find_fdc0(void); 252 int cmos_get_fd_drive_type(FloppyDriveType fd0); 253 254 #define FW_CFG_IO_BASE 0x510 255 256 #define PORT92_A20_LINE "a20" 257 258 /* acpi_piix.c */ 259 260 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 261 qemu_irq sci_irq, qemu_irq smi_irq, 262 int smm_enabled, DeviceState **piix4_pm); 263 264 /* hpet.c */ 265 extern int no_hpet; 266 267 /* piix_pci.c */ 268 struct PCII440FXState; 269 typedef struct PCII440FXState PCII440FXState; 270 271 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 272 #define TYPE_I440FX_PCI_DEVICE "i440FX" 273 274 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 275 276 /* 277 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 278 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 279 */ 280 #define RCR_IOPORT 0xcf9 281 282 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 283 PCII440FXState **pi440fx_state, int *piix_devfn, 284 ISABus **isa_bus, qemu_irq *pic, 285 MemoryRegion *address_space_mem, 286 MemoryRegion *address_space_io, 287 ram_addr_t ram_size, 288 ram_addr_t below_4g_mem_size, 289 ram_addr_t above_4g_mem_size, 290 MemoryRegion *pci_memory, 291 MemoryRegion *ram_memory); 292 293 PCIBus *find_i440fx(void); 294 /* piix4.c */ 295 extern PCIDevice *piix4_dev; 296 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 297 298 /* pc_sysfw.c */ 299 void pc_system_firmware_init(MemoryRegion *rom_memory, 300 bool isapc_ram_fw); 301 302 /* acpi-build.c */ 303 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 304 const CPUArchIdList *apic_ids, GArray *entry); 305 306 /* e820 types */ 307 #define E820_RAM 1 308 #define E820_RESERVED 2 309 #define E820_ACPI 3 310 #define E820_NVS 4 311 #define E820_UNUSABLE 5 312 313 int e820_add_entry(uint64_t, uint64_t, uint32_t); 314 int e820_get_num_entries(void); 315 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 316 317 #define PC_COMPAT_2_11 \ 318 HW_COMPAT_2_11 \ 319 {\ 320 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 321 .property = "clflushopt",\ 322 .value = "off",\ 323 }, 324 325 #define PC_COMPAT_2_10 \ 326 HW_COMPAT_2_10 \ 327 {\ 328 .driver = TYPE_X86_CPU,\ 329 .property = "x-hv-max-vps",\ 330 .value = "0x40",\ 331 },{\ 332 .driver = "i440FX-pcihost",\ 333 .property = "x-pci-hole64-fix",\ 334 .value = "off",\ 335 },{\ 336 .driver = "q35-pcihost",\ 337 .property = "x-pci-hole64-fix",\ 338 .value = "off",\ 339 }, 340 341 #define PC_COMPAT_2_9 \ 342 HW_COMPAT_2_9 \ 343 {\ 344 .driver = "mch",\ 345 .property = "extended-tseg-mbytes",\ 346 .value = stringify(0),\ 347 },\ 348 349 #define PC_COMPAT_2_8 \ 350 HW_COMPAT_2_8 \ 351 {\ 352 .driver = TYPE_X86_CPU,\ 353 .property = "tcg-cpuid",\ 354 .value = "off",\ 355 },\ 356 {\ 357 .driver = "kvmclock",\ 358 .property = "x-mach-use-reliable-get-clock",\ 359 .value = "off",\ 360 },\ 361 {\ 362 .driver = "ICH9-LPC",\ 363 .property = "x-smi-broadcast",\ 364 .value = "off",\ 365 },\ 366 {\ 367 .driver = TYPE_X86_CPU,\ 368 .property = "vmware-cpuid-freq",\ 369 .value = "off",\ 370 },\ 371 {\ 372 .driver = "Haswell-" TYPE_X86_CPU,\ 373 .property = "stepping",\ 374 .value = "1",\ 375 }, 376 377 #define PC_COMPAT_2_7 \ 378 HW_COMPAT_2_7 \ 379 {\ 380 .driver = TYPE_X86_CPU,\ 381 .property = "l3-cache",\ 382 .value = "off",\ 383 },\ 384 {\ 385 .driver = TYPE_X86_CPU,\ 386 .property = "full-cpuid-auto-level",\ 387 .value = "off",\ 388 },\ 389 {\ 390 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 391 .property = "family",\ 392 .value = "15",\ 393 },\ 394 {\ 395 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 396 .property = "model",\ 397 .value = "6",\ 398 },\ 399 {\ 400 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 401 .property = "stepping",\ 402 .value = "1",\ 403 },\ 404 {\ 405 .driver = "isa-pcspk",\ 406 .property = "migrate",\ 407 .value = "off",\ 408 }, 409 410 #define PC_COMPAT_2_6 \ 411 HW_COMPAT_2_6 \ 412 {\ 413 .driver = TYPE_X86_CPU,\ 414 .property = "cpuid-0xb",\ 415 .value = "off",\ 416 },{\ 417 .driver = "vmxnet3",\ 418 .property = "romfile",\ 419 .value = "",\ 420 },\ 421 {\ 422 .driver = TYPE_X86_CPU,\ 423 .property = "fill-mtrr-mask",\ 424 .value = "off",\ 425 },\ 426 {\ 427 .driver = "apic-common",\ 428 .property = "legacy-instance-id",\ 429 .value = "on",\ 430 }, 431 432 #define PC_COMPAT_2_5 \ 433 HW_COMPAT_2_5 434 435 /* Helper for setting model-id for CPU models that changed model-id 436 * depending on QEMU versions up to QEMU 2.4. 437 */ 438 #define PC_CPU_MODEL_IDS(v) \ 439 {\ 440 .driver = "qemu32-" TYPE_X86_CPU,\ 441 .property = "model-id",\ 442 .value = "QEMU Virtual CPU version " v,\ 443 },\ 444 {\ 445 .driver = "qemu64-" TYPE_X86_CPU,\ 446 .property = "model-id",\ 447 .value = "QEMU Virtual CPU version " v,\ 448 },\ 449 {\ 450 .driver = "athlon-" TYPE_X86_CPU,\ 451 .property = "model-id",\ 452 .value = "QEMU Virtual CPU version " v,\ 453 }, 454 455 #define PC_COMPAT_2_4 \ 456 HW_COMPAT_2_4 \ 457 PC_CPU_MODEL_IDS("2.4.0") \ 458 {\ 459 .driver = "Haswell-" TYPE_X86_CPU,\ 460 .property = "abm",\ 461 .value = "off",\ 462 },\ 463 {\ 464 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 465 .property = "abm",\ 466 .value = "off",\ 467 },\ 468 {\ 469 .driver = "Broadwell-" TYPE_X86_CPU,\ 470 .property = "abm",\ 471 .value = "off",\ 472 },\ 473 {\ 474 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 475 .property = "abm",\ 476 .value = "off",\ 477 },\ 478 {\ 479 .driver = "host" "-" TYPE_X86_CPU,\ 480 .property = "host-cache-info",\ 481 .value = "on",\ 482 },\ 483 {\ 484 .driver = TYPE_X86_CPU,\ 485 .property = "check",\ 486 .value = "off",\ 487 },\ 488 {\ 489 .driver = "qemu64" "-" TYPE_X86_CPU,\ 490 .property = "sse4a",\ 491 .value = "on",\ 492 },\ 493 {\ 494 .driver = "qemu64" "-" TYPE_X86_CPU,\ 495 .property = "abm",\ 496 .value = "on",\ 497 },\ 498 {\ 499 .driver = "qemu64" "-" TYPE_X86_CPU,\ 500 .property = "popcnt",\ 501 .value = "on",\ 502 },\ 503 {\ 504 .driver = "qemu32" "-" TYPE_X86_CPU,\ 505 .property = "popcnt",\ 506 .value = "on",\ 507 },{\ 508 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 509 .property = "rdtscp",\ 510 .value = "on",\ 511 },{\ 512 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 513 .property = "rdtscp",\ 514 .value = "on",\ 515 },{\ 516 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 517 .property = "rdtscp",\ 518 .value = "on",\ 519 },{\ 520 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 521 .property = "rdtscp",\ 522 .value = "on",\ 523 }, 524 525 526 #define PC_COMPAT_2_3 \ 527 HW_COMPAT_2_3 \ 528 PC_CPU_MODEL_IDS("2.3.0") \ 529 {\ 530 .driver = TYPE_X86_CPU,\ 531 .property = "arat",\ 532 .value = "off",\ 533 },{\ 534 .driver = "qemu64" "-" TYPE_X86_CPU,\ 535 .property = "min-level",\ 536 .value = stringify(4),\ 537 },{\ 538 .driver = "kvm64" "-" TYPE_X86_CPU,\ 539 .property = "min-level",\ 540 .value = stringify(5),\ 541 },{\ 542 .driver = "pentium3" "-" TYPE_X86_CPU,\ 543 .property = "min-level",\ 544 .value = stringify(2),\ 545 },{\ 546 .driver = "n270" "-" TYPE_X86_CPU,\ 547 .property = "min-level",\ 548 .value = stringify(5),\ 549 },{\ 550 .driver = "Conroe" "-" TYPE_X86_CPU,\ 551 .property = "min-level",\ 552 .value = stringify(4),\ 553 },{\ 554 .driver = "Penryn" "-" TYPE_X86_CPU,\ 555 .property = "min-level",\ 556 .value = stringify(4),\ 557 },{\ 558 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 559 .property = "min-level",\ 560 .value = stringify(4),\ 561 },{\ 562 .driver = "n270" "-" TYPE_X86_CPU,\ 563 .property = "min-xlevel",\ 564 .value = stringify(0x8000000a),\ 565 },{\ 566 .driver = "Penryn" "-" TYPE_X86_CPU,\ 567 .property = "min-xlevel",\ 568 .value = stringify(0x8000000a),\ 569 },{\ 570 .driver = "Conroe" "-" TYPE_X86_CPU,\ 571 .property = "min-xlevel",\ 572 .value = stringify(0x8000000a),\ 573 },{\ 574 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 575 .property = "min-xlevel",\ 576 .value = stringify(0x8000000a),\ 577 },{\ 578 .driver = "Westmere" "-" TYPE_X86_CPU,\ 579 .property = "min-xlevel",\ 580 .value = stringify(0x8000000a),\ 581 },{\ 582 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 583 .property = "min-xlevel",\ 584 .value = stringify(0x8000000a),\ 585 },{\ 586 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 587 .property = "min-xlevel",\ 588 .value = stringify(0x8000000a),\ 589 },{\ 590 .driver = "Haswell" "-" TYPE_X86_CPU,\ 591 .property = "min-xlevel",\ 592 .value = stringify(0x8000000a),\ 593 },{\ 594 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 595 .property = "min-xlevel",\ 596 .value = stringify(0x8000000a),\ 597 },{\ 598 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 599 .property = "min-xlevel",\ 600 .value = stringify(0x8000000a),\ 601 },{\ 602 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 603 .property = "min-xlevel",\ 604 .value = stringify(0x8000000a),\ 605 },{\ 606 .driver = TYPE_X86_CPU,\ 607 .property = "kvm-no-smi-migration",\ 608 .value = "on",\ 609 }, 610 611 #define PC_COMPAT_2_2 \ 612 HW_COMPAT_2_2 \ 613 PC_CPU_MODEL_IDS("2.3.0") \ 614 {\ 615 .driver = "kvm64" "-" TYPE_X86_CPU,\ 616 .property = "vme",\ 617 .value = "off",\ 618 },\ 619 {\ 620 .driver = "kvm32" "-" TYPE_X86_CPU,\ 621 .property = "vme",\ 622 .value = "off",\ 623 },\ 624 {\ 625 .driver = "Conroe" "-" TYPE_X86_CPU,\ 626 .property = "vme",\ 627 .value = "off",\ 628 },\ 629 {\ 630 .driver = "Penryn" "-" TYPE_X86_CPU,\ 631 .property = "vme",\ 632 .value = "off",\ 633 },\ 634 {\ 635 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 636 .property = "vme",\ 637 .value = "off",\ 638 },\ 639 {\ 640 .driver = "Westmere" "-" TYPE_X86_CPU,\ 641 .property = "vme",\ 642 .value = "off",\ 643 },\ 644 {\ 645 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 646 .property = "vme",\ 647 .value = "off",\ 648 },\ 649 {\ 650 .driver = "Haswell" "-" TYPE_X86_CPU,\ 651 .property = "vme",\ 652 .value = "off",\ 653 },\ 654 {\ 655 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 656 .property = "vme",\ 657 .value = "off",\ 658 },\ 659 {\ 660 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 661 .property = "vme",\ 662 .value = "off",\ 663 },\ 664 {\ 665 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 666 .property = "vme",\ 667 .value = "off",\ 668 },\ 669 {\ 670 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 671 .property = "vme",\ 672 .value = "off",\ 673 },\ 674 {\ 675 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 676 .property = "vme",\ 677 .value = "off",\ 678 },\ 679 {\ 680 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 681 .property = "vme",\ 682 .value = "off",\ 683 },\ 684 {\ 685 .driver = "Haswell" "-" TYPE_X86_CPU,\ 686 .property = "f16c",\ 687 .value = "off",\ 688 },\ 689 {\ 690 .driver = "Haswell" "-" TYPE_X86_CPU,\ 691 .property = "rdrand",\ 692 .value = "off",\ 693 },\ 694 {\ 695 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 696 .property = "f16c",\ 697 .value = "off",\ 698 },\ 699 {\ 700 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 701 .property = "rdrand",\ 702 .value = "off",\ 703 }, 704 705 #define PC_COMPAT_2_1 \ 706 HW_COMPAT_2_1 \ 707 PC_CPU_MODEL_IDS("2.1.0") \ 708 {\ 709 .driver = "coreduo" "-" TYPE_X86_CPU,\ 710 .property = "vmx",\ 711 .value = "on",\ 712 },\ 713 {\ 714 .driver = "core2duo" "-" TYPE_X86_CPU,\ 715 .property = "vmx",\ 716 .value = "on",\ 717 }, 718 719 #define PC_COMPAT_2_0 \ 720 PC_CPU_MODEL_IDS("2.0.0") \ 721 {\ 722 .driver = "virtio-scsi-pci",\ 723 .property = "any_layout",\ 724 .value = "off",\ 725 },{\ 726 .driver = "PIIX4_PM",\ 727 .property = "memory-hotplug-support",\ 728 .value = "off",\ 729 },\ 730 {\ 731 .driver = "apic",\ 732 .property = "version",\ 733 .value = stringify(0x11),\ 734 },\ 735 {\ 736 .driver = "nec-usb-xhci",\ 737 .property = "superspeed-ports-first",\ 738 .value = "off",\ 739 },\ 740 {\ 741 .driver = "nec-usb-xhci",\ 742 .property = "force-pcie-endcap",\ 743 .value = "on",\ 744 },\ 745 {\ 746 .driver = "pci-serial",\ 747 .property = "prog_if",\ 748 .value = stringify(0),\ 749 },\ 750 {\ 751 .driver = "pci-serial-2x",\ 752 .property = "prog_if",\ 753 .value = stringify(0),\ 754 },\ 755 {\ 756 .driver = "pci-serial-4x",\ 757 .property = "prog_if",\ 758 .value = stringify(0),\ 759 },\ 760 {\ 761 .driver = "virtio-net-pci",\ 762 .property = "guest_announce",\ 763 .value = "off",\ 764 },\ 765 {\ 766 .driver = "ICH9-LPC",\ 767 .property = "memory-hotplug-support",\ 768 .value = "off",\ 769 },{\ 770 .driver = "xio3130-downstream",\ 771 .property = COMPAT_PROP_PCP,\ 772 .value = "off",\ 773 },{\ 774 .driver = "ioh3420",\ 775 .property = COMPAT_PROP_PCP,\ 776 .value = "off",\ 777 }, 778 779 #define PC_COMPAT_1_7 \ 780 PC_CPU_MODEL_IDS("1.7.0") \ 781 {\ 782 .driver = TYPE_USB_DEVICE,\ 783 .property = "msos-desc",\ 784 .value = "no",\ 785 },\ 786 {\ 787 .driver = "PIIX4_PM",\ 788 .property = "acpi-pci-hotplug-with-bridge-support",\ 789 .value = "off",\ 790 },\ 791 {\ 792 .driver = "hpet",\ 793 .property = HPET_INTCAP,\ 794 .value = stringify(4),\ 795 }, 796 797 #define PC_COMPAT_1_6 \ 798 PC_CPU_MODEL_IDS("1.6.0") \ 799 {\ 800 .driver = "e1000",\ 801 .property = "mitigation",\ 802 .value = "off",\ 803 },{\ 804 .driver = "qemu64-" TYPE_X86_CPU,\ 805 .property = "model",\ 806 .value = stringify(2),\ 807 },{\ 808 .driver = "qemu32-" TYPE_X86_CPU,\ 809 .property = "model",\ 810 .value = stringify(3),\ 811 },{\ 812 .driver = "i440FX-pcihost",\ 813 .property = "short_root_bus",\ 814 .value = stringify(1),\ 815 },{\ 816 .driver = "q35-pcihost",\ 817 .property = "short_root_bus",\ 818 .value = stringify(1),\ 819 }, 820 821 #define PC_COMPAT_1_5 \ 822 PC_CPU_MODEL_IDS("1.5.0") \ 823 {\ 824 .driver = "Conroe-" TYPE_X86_CPU,\ 825 .property = "model",\ 826 .value = stringify(2),\ 827 },{\ 828 .driver = "Conroe-" TYPE_X86_CPU,\ 829 .property = "min-level",\ 830 .value = stringify(2),\ 831 },{\ 832 .driver = "Penryn-" TYPE_X86_CPU,\ 833 .property = "model",\ 834 .value = stringify(2),\ 835 },{\ 836 .driver = "Penryn-" TYPE_X86_CPU,\ 837 .property = "min-level",\ 838 .value = stringify(2),\ 839 },{\ 840 .driver = "Nehalem-" TYPE_X86_CPU,\ 841 .property = "model",\ 842 .value = stringify(2),\ 843 },{\ 844 .driver = "Nehalem-" TYPE_X86_CPU,\ 845 .property = "min-level",\ 846 .value = stringify(2),\ 847 },{\ 848 .driver = "virtio-net-pci",\ 849 .property = "any_layout",\ 850 .value = "off",\ 851 },{\ 852 .driver = TYPE_X86_CPU,\ 853 .property = "pmu",\ 854 .value = "on",\ 855 },{\ 856 .driver = "i440FX-pcihost",\ 857 .property = "short_root_bus",\ 858 .value = stringify(0),\ 859 },{\ 860 .driver = "q35-pcihost",\ 861 .property = "short_root_bus",\ 862 .value = stringify(0),\ 863 }, 864 865 #define PC_COMPAT_1_4 \ 866 PC_CPU_MODEL_IDS("1.4.0") \ 867 {\ 868 .driver = "scsi-hd",\ 869 .property = "discard_granularity",\ 870 .value = stringify(0),\ 871 },{\ 872 .driver = "scsi-cd",\ 873 .property = "discard_granularity",\ 874 .value = stringify(0),\ 875 },{\ 876 .driver = "scsi-disk",\ 877 .property = "discard_granularity",\ 878 .value = stringify(0),\ 879 },{\ 880 .driver = "ide-hd",\ 881 .property = "discard_granularity",\ 882 .value = stringify(0),\ 883 },{\ 884 .driver = "ide-cd",\ 885 .property = "discard_granularity",\ 886 .value = stringify(0),\ 887 },{\ 888 .driver = "ide-drive",\ 889 .property = "discard_granularity",\ 890 .value = stringify(0),\ 891 },{\ 892 .driver = "virtio-blk-pci",\ 893 .property = "discard_granularity",\ 894 .value = stringify(0),\ 895 },{\ 896 .driver = "virtio-serial-pci",\ 897 .property = "vectors",\ 898 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 899 .value = stringify(0xFFFFFFFF),\ 900 },{ \ 901 .driver = "virtio-net-pci", \ 902 .property = "ctrl_guest_offloads", \ 903 .value = "off", \ 904 },{\ 905 .driver = "e1000",\ 906 .property = "romfile",\ 907 .value = "pxe-e1000.rom",\ 908 },{\ 909 .driver = "ne2k_pci",\ 910 .property = "romfile",\ 911 .value = "pxe-ne2k_pci.rom",\ 912 },{\ 913 .driver = "pcnet",\ 914 .property = "romfile",\ 915 .value = "pxe-pcnet.rom",\ 916 },{\ 917 .driver = "rtl8139",\ 918 .property = "romfile",\ 919 .value = "pxe-rtl8139.rom",\ 920 },{\ 921 .driver = "virtio-net-pci",\ 922 .property = "romfile",\ 923 .value = "pxe-virtio.rom",\ 924 },{\ 925 .driver = "486-" TYPE_X86_CPU,\ 926 .property = "model",\ 927 .value = stringify(0),\ 928 },\ 929 {\ 930 .driver = "n270" "-" TYPE_X86_CPU,\ 931 .property = "movbe",\ 932 .value = "off",\ 933 },\ 934 {\ 935 .driver = "Westmere" "-" TYPE_X86_CPU,\ 936 .property = "pclmulqdq",\ 937 .value = "off",\ 938 }, 939 940 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 941 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 942 { \ 943 MachineClass *mc = MACHINE_CLASS(oc); \ 944 optsfn(mc); \ 945 mc->init = initfn; \ 946 } \ 947 static const TypeInfo pc_machine_type_##suffix = { \ 948 .name = namestr TYPE_MACHINE_SUFFIX, \ 949 .parent = TYPE_PC_MACHINE, \ 950 .class_init = pc_machine_##suffix##_class_init, \ 951 }; \ 952 static void pc_machine_init_##suffix(void) \ 953 { \ 954 type_register(&pc_machine_type_##suffix); \ 955 } \ 956 type_init(pc_machine_init_##suffix) 957 958 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 959 #endif 960