1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 23 * address space begins. 24 * @hotplug_memory: hotplug memory addess space container 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 */ 27 struct PCMachineState { 28 /*< private >*/ 29 MachineState parent_obj; 30 31 /* <public> */ 32 ram_addr_t hotplug_memory_base; 33 MemoryRegion hotplug_memory; 34 35 HotplugHandler *acpi_dev; 36 37 uint64_t max_ram_below_4g; 38 }; 39 40 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 41 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 42 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 43 44 /** 45 * PCMachineClass: 46 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 47 */ 48 struct PCMachineClass { 49 /*< private >*/ 50 MachineClass parent_class; 51 52 /*< public >*/ 53 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 54 DeviceState *dev); 55 }; 56 57 typedef struct PCMachineState PCMachineState; 58 typedef struct PCMachineClass PCMachineClass; 59 60 #define TYPE_PC_MACHINE "generic-pc-machine" 61 #define PC_MACHINE(obj) \ 62 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 63 #define PC_MACHINE_GET_CLASS(obj) \ 64 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 65 #define PC_MACHINE_CLASS(klass) \ 66 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 67 68 void qemu_register_pc_machine(QEMUMachine *m); 69 70 /* PC-style peripherals (also used by other machines). */ 71 72 typedef struct PcPciInfo { 73 Range w32; 74 Range w64; 75 } PcPciInfo; 76 77 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 78 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 79 #define ACPI_PM_PROP_S4_VAL "s4_val" 80 #define ACPI_PM_PROP_SCI_INT "sci_int" 81 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 82 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 83 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 84 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 85 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 86 87 struct PcGuestInfo { 88 bool isapc_ram_fw; 89 hwaddr ram_size, ram_size_below_4g; 90 unsigned apic_id_limit; 91 bool apic_xrupt_override; 92 uint64_t numa_nodes; 93 uint64_t *node_mem; 94 uint64_t *node_cpu; 95 FWCfgState *fw_cfg; 96 int legacy_acpi_table_size; 97 bool has_acpi_build; 98 bool has_reserved_memory; 99 }; 100 101 /* parallel.c */ 102 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 103 { 104 DeviceState *dev; 105 ISADevice *isadev; 106 107 isadev = isa_try_create(bus, "isa-parallel"); 108 if (!isadev) { 109 return false; 110 } 111 dev = DEVICE(isadev); 112 qdev_prop_set_uint32(dev, "index", index); 113 qdev_prop_set_chr(dev, "chardev", chr); 114 if (qdev_init(dev) < 0) { 115 return false; 116 } 117 return true; 118 } 119 120 bool parallel_mm_init(MemoryRegion *address_space, 121 hwaddr base, int it_shift, qemu_irq irq, 122 CharDriverState *chr); 123 124 /* i8259.c */ 125 126 extern DeviceState *isa_pic; 127 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 128 qemu_irq *kvm_i8259_init(ISABus *bus); 129 int pic_read_irq(DeviceState *d); 130 int pic_get_output(DeviceState *d); 131 void pic_info(Monitor *mon, const QDict *qdict); 132 void irq_info(Monitor *mon, const QDict *qdict); 133 134 /* Global System Interrupts */ 135 136 #define GSI_NUM_PINS IOAPIC_NUM_PINS 137 138 typedef struct GSIState { 139 qemu_irq i8259_irq[ISA_NUM_IRQS]; 140 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 141 } GSIState; 142 143 void gsi_handler(void *opaque, int n, int level); 144 145 /* vmport.c */ 146 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 147 148 static inline void vmport_init(ISABus *bus) 149 { 150 isa_create_simple(bus, "vmport"); 151 } 152 153 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 154 void vmmouse_get_data(uint32_t *data); 155 void vmmouse_set_data(const uint32_t *data); 156 157 /* pckbd.c */ 158 159 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 160 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 161 MemoryRegion *region, ram_addr_t size, 162 hwaddr mask); 163 void i8042_isa_mouse_fake_event(void *opaque); 164 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 165 166 /* pc.c */ 167 extern int fd_bootchk; 168 169 void pc_register_ferr_irq(qemu_irq irq); 170 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 171 172 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 173 void pc_hot_add_cpu(const int64_t id, Error **errp); 174 void pc_acpi_init(const char *default_dsdt); 175 176 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 177 ram_addr_t above_4g_mem_size); 178 179 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 180 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 181 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 182 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 183 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 184 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 185 186 187 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 188 MemoryRegion *pci_address_space); 189 190 FWCfgState *xen_load_linux(const char *kernel_filename, 191 const char *kernel_cmdline, 192 const char *initrd_filename, 193 ram_addr_t below_4g_mem_size, 194 PcGuestInfo *guest_info); 195 FWCfgState *pc_memory_init(MachineState *machine, 196 MemoryRegion *system_memory, 197 ram_addr_t below_4g_mem_size, 198 ram_addr_t above_4g_mem_size, 199 MemoryRegion *rom_memory, 200 MemoryRegion **ram_memory, 201 PcGuestInfo *guest_info); 202 qemu_irq *pc_allocate_cpu_irq(void); 203 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 204 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 205 ISADevice **rtc_state, 206 ISADevice **floppy, 207 bool no_vmport, 208 uint32 hpet_irqs); 209 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 210 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 211 const char *boot_device, 212 ISADevice *floppy, BusState *ide0, BusState *ide1, 213 ISADevice *s); 214 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 215 void pc_pci_device_init(PCIBus *pci_bus); 216 217 typedef void (*cpu_set_smm_t)(int smm, void *arg); 218 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 219 220 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 221 222 /* acpi_piix.c */ 223 224 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 225 qemu_irq sci_irq, qemu_irq smi_irq, 226 int kvm_enabled, FWCfgState *fw_cfg, 227 DeviceState **piix4_pm); 228 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 229 230 /* hpet.c */ 231 extern int no_hpet; 232 233 /* piix_pci.c */ 234 struct PCII440FXState; 235 typedef struct PCII440FXState PCII440FXState; 236 237 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 238 ISABus **isa_bus, qemu_irq *pic, 239 MemoryRegion *address_space_mem, 240 MemoryRegion *address_space_io, 241 ram_addr_t ram_size, 242 ram_addr_t below_4g_mem_size, 243 ram_addr_t above_4g_mem_size, 244 MemoryRegion *pci_memory, 245 MemoryRegion *ram_memory); 246 247 PCIBus *find_i440fx(void); 248 /* piix4.c */ 249 extern PCIDevice *piix4_dev; 250 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 251 252 /* vga.c */ 253 enum vga_retrace_method { 254 VGA_RETRACE_DUMB, 255 VGA_RETRACE_PRECISE 256 }; 257 258 extern enum vga_retrace_method vga_retrace_method; 259 260 int isa_vga_mm_init(hwaddr vram_base, 261 hwaddr ctrl_base, int it_shift, 262 MemoryRegion *address_space); 263 264 /* ne2000.c */ 265 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 266 { 267 DeviceState *dev; 268 ISADevice *isadev; 269 270 qemu_check_nic_model(nd, "ne2k_isa"); 271 272 isadev = isa_try_create(bus, "ne2k_isa"); 273 if (!isadev) { 274 return false; 275 } 276 dev = DEVICE(isadev); 277 qdev_prop_set_uint32(dev, "iobase", base); 278 qdev_prop_set_uint32(dev, "irq", irq); 279 qdev_set_nic_properties(dev, nd); 280 qdev_init_nofail(dev); 281 return true; 282 } 283 284 /* pc_sysfw.c */ 285 void pc_system_firmware_init(MemoryRegion *rom_memory, 286 bool isapc_ram_fw); 287 288 /* pvpanic.c */ 289 uint16_t pvpanic_port(void); 290 291 /* e820 types */ 292 #define E820_RAM 1 293 #define E820_RESERVED 2 294 #define E820_ACPI 3 295 #define E820_NVS 4 296 #define E820_UNUSABLE 5 297 298 int e820_add_entry(uint64_t, uint64_t, uint32_t); 299 int e820_get_num_entries(void); 300 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 301 302 #define PC_COMPAT_2_1 \ 303 {\ 304 .driver = "intel-hda",\ 305 .property = "old_msi_addr",\ 306 .value = "on",\ 307 } 308 309 #define PC_COMPAT_2_0 \ 310 PC_COMPAT_2_1, \ 311 {\ 312 .driver = "virtio-scsi-pci",\ 313 .property = "any_layout",\ 314 .value = "off",\ 315 },{\ 316 .driver = "PIIX4_PM",\ 317 .property = "memory-hotplug-support",\ 318 .value = "off",\ 319 },\ 320 {\ 321 .driver = "apic",\ 322 .property = "version",\ 323 .value = stringify(0x11),\ 324 },\ 325 {\ 326 .driver = "nec-usb-xhci",\ 327 .property = "superspeed-ports-first",\ 328 .value = "off",\ 329 },\ 330 {\ 331 .driver = "pci-serial",\ 332 .property = "prog_if",\ 333 .value = stringify(0),\ 334 },\ 335 {\ 336 .driver = "pci-serial-2x",\ 337 .property = "prog_if",\ 338 .value = stringify(0),\ 339 },\ 340 {\ 341 .driver = "pci-serial-4x",\ 342 .property = "prog_if",\ 343 .value = stringify(0),\ 344 },\ 345 {\ 346 .driver = "virtio-net-pci",\ 347 .property = "guest_announce",\ 348 .value = "off",\ 349 },\ 350 {\ 351 .driver = "ICH9-LPC",\ 352 .property = "memory-hotplug-support",\ 353 .value = "off",\ 354 },{\ 355 .driver = "xio3130-downstream",\ 356 .property = COMPAT_PROP_PCP,\ 357 .value = "off",\ 358 },{\ 359 .driver = "ioh3420",\ 360 .property = COMPAT_PROP_PCP,\ 361 .value = "off",\ 362 } 363 364 #define PC_COMPAT_1_7 \ 365 PC_COMPAT_2_0, \ 366 {\ 367 .driver = TYPE_USB_DEVICE,\ 368 .property = "msos-desc",\ 369 .value = "no",\ 370 },\ 371 {\ 372 .driver = "PIIX4_PM",\ 373 .property = "acpi-pci-hotplug-with-bridge-support",\ 374 .value = "off",\ 375 },\ 376 {\ 377 .driver = "hpet",\ 378 .property = HPET_INTCAP,\ 379 .value = stringify(4),\ 380 } 381 382 #define PC_COMPAT_1_6 \ 383 PC_COMPAT_1_7, \ 384 {\ 385 .driver = "e1000",\ 386 .property = "mitigation",\ 387 .value = "off",\ 388 },{\ 389 .driver = "qemu64-" TYPE_X86_CPU,\ 390 .property = "model",\ 391 .value = stringify(2),\ 392 },{\ 393 .driver = "qemu32-" TYPE_X86_CPU,\ 394 .property = "model",\ 395 .value = stringify(3),\ 396 },{\ 397 .driver = "i440FX-pcihost",\ 398 .property = "short_root_bus",\ 399 .value = stringify(1),\ 400 },{\ 401 .driver = "q35-pcihost",\ 402 .property = "short_root_bus",\ 403 .value = stringify(1),\ 404 } 405 406 #define PC_COMPAT_1_5 \ 407 PC_COMPAT_1_6, \ 408 {\ 409 .driver = "Conroe-" TYPE_X86_CPU,\ 410 .property = "model",\ 411 .value = stringify(2),\ 412 },{\ 413 .driver = "Conroe-" TYPE_X86_CPU,\ 414 .property = "level",\ 415 .value = stringify(2),\ 416 },{\ 417 .driver = "Penryn-" TYPE_X86_CPU,\ 418 .property = "model",\ 419 .value = stringify(2),\ 420 },{\ 421 .driver = "Penryn-" TYPE_X86_CPU,\ 422 .property = "level",\ 423 .value = stringify(2),\ 424 },{\ 425 .driver = "Nehalem-" TYPE_X86_CPU,\ 426 .property = "model",\ 427 .value = stringify(2),\ 428 },{\ 429 .driver = "Nehalem-" TYPE_X86_CPU,\ 430 .property = "level",\ 431 .value = stringify(2),\ 432 },{\ 433 .driver = "virtio-net-pci",\ 434 .property = "any_layout",\ 435 .value = "off",\ 436 },{\ 437 .driver = TYPE_X86_CPU,\ 438 .property = "pmu",\ 439 .value = "on",\ 440 },{\ 441 .driver = "i440FX-pcihost",\ 442 .property = "short_root_bus",\ 443 .value = stringify(0),\ 444 },{\ 445 .driver = "q35-pcihost",\ 446 .property = "short_root_bus",\ 447 .value = stringify(0),\ 448 } 449 450 #define PC_COMPAT_1_4 \ 451 PC_COMPAT_1_5, \ 452 {\ 453 .driver = "scsi-hd",\ 454 .property = "discard_granularity",\ 455 .value = stringify(0),\ 456 },{\ 457 .driver = "scsi-cd",\ 458 .property = "discard_granularity",\ 459 .value = stringify(0),\ 460 },{\ 461 .driver = "scsi-disk",\ 462 .property = "discard_granularity",\ 463 .value = stringify(0),\ 464 },{\ 465 .driver = "ide-hd",\ 466 .property = "discard_granularity",\ 467 .value = stringify(0),\ 468 },{\ 469 .driver = "ide-cd",\ 470 .property = "discard_granularity",\ 471 .value = stringify(0),\ 472 },{\ 473 .driver = "ide-drive",\ 474 .property = "discard_granularity",\ 475 .value = stringify(0),\ 476 },{\ 477 .driver = "virtio-blk-pci",\ 478 .property = "discard_granularity",\ 479 .value = stringify(0),\ 480 },{\ 481 .driver = "virtio-serial-pci",\ 482 .property = "vectors",\ 483 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 484 .value = stringify(0xFFFFFFFF),\ 485 },{ \ 486 .driver = "virtio-net-pci", \ 487 .property = "ctrl_guest_offloads", \ 488 .value = "off", \ 489 },{\ 490 .driver = "e1000",\ 491 .property = "romfile",\ 492 .value = "pxe-e1000.rom",\ 493 },{\ 494 .driver = "ne2k_pci",\ 495 .property = "romfile",\ 496 .value = "pxe-ne2k_pci.rom",\ 497 },{\ 498 .driver = "pcnet",\ 499 .property = "romfile",\ 500 .value = "pxe-pcnet.rom",\ 501 },{\ 502 .driver = "rtl8139",\ 503 .property = "romfile",\ 504 .value = "pxe-rtl8139.rom",\ 505 },{\ 506 .driver = "virtio-net-pci",\ 507 .property = "romfile",\ 508 .value = "pxe-virtio.rom",\ 509 },{\ 510 .driver = "486-" TYPE_X86_CPU,\ 511 .property = "model",\ 512 .value = stringify(0),\ 513 } 514 515 #define PC_COMMON_MACHINE_OPTIONS \ 516 .default_boot_order = "cad" 517 518 #define PC_DEFAULT_MACHINE_OPTIONS \ 519 PC_COMMON_MACHINE_OPTIONS, \ 520 .hot_add_cpu = pc_hot_add_cpu, \ 521 .max_cpus = 255 522 523 #endif 524