1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 MemoryHotplugState hotplug_memory; 36 Notifier machine_done; 37 38 /* Pointers to devices and objects: */ 39 HotplugHandler *acpi_dev; 40 ISADevice *rtc; 41 PCIBus *bus; 42 FWCfgState *fw_cfg; 43 qemu_irq *gsi; 44 45 /* Configuration options: */ 46 uint64_t max_ram_below_4g; 47 OnOffAuto vmport; 48 OnOffAuto smm; 49 50 AcpiNVDIMMState acpi_nvdimm_state; 51 52 bool acpi_build_enabled; 53 bool smbus; 54 bool sata; 55 bool pit; 56 57 /* RAM information (sizes, addresses, configuration): */ 58 ram_addr_t below_4g_mem_size, above_4g_mem_size; 59 60 /* CPU and apic information: */ 61 bool apic_xrupt_override; 62 unsigned apic_id_limit; 63 uint16_t boot_cpus; 64 65 /* NUMA information: */ 66 uint64_t numa_nodes; 67 uint64_t *node_mem; 68 69 /* Address space used by IOAPIC device. All IOAPIC interrupts 70 * will be translated to MSI messages in the address space. */ 71 AddressSpace *ioapic_as; 72 }; 73 74 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 75 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 76 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 77 #define PC_MACHINE_VMPORT "vmport" 78 #define PC_MACHINE_SMM "smm" 79 #define PC_MACHINE_NVDIMM "nvdimm" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 118 /* Compat options: */ 119 120 /* ACPI compat: */ 121 bool has_acpi_build; 122 bool rsdp_in_ram; 123 int legacy_acpi_table_size; 124 unsigned acpi_data_size; 125 126 /* SMBIOS compat: */ 127 bool smbios_defaults; 128 bool smbios_legacy_mode; 129 bool smbios_uuid_encoded; 130 131 /* RAM / address space compat: */ 132 bool gigabyte_align; 133 bool has_reserved_memory; 134 bool enforce_aligned_dimm; 135 bool broken_reserved_end; 136 137 /* TSC rate migration: */ 138 bool save_tsc_khz; 139 /* generate legacy CPU hotplug AML */ 140 bool legacy_cpu_hotplug; 141 142 /* use DMA capable linuxboot option rom */ 143 bool linuxboot_dma_enabled; 144 }; 145 146 #define TYPE_PC_MACHINE "generic-pc-machine" 147 #define PC_MACHINE(obj) \ 148 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 149 #define PC_MACHINE_GET_CLASS(obj) \ 150 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 151 #define PC_MACHINE_CLASS(klass) \ 152 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 153 154 /* PC-style peripherals (also used by other machines). */ 155 156 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 157 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 158 #define ACPI_PM_PROP_S4_VAL "s4_val" 159 #define ACPI_PM_PROP_SCI_INT "sci_int" 160 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 161 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 162 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 163 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 164 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 165 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 166 167 /* parallel.c */ 168 169 void parallel_hds_isa_init(ISABus *bus, int n); 170 171 bool parallel_mm_init(MemoryRegion *address_space, 172 hwaddr base, int it_shift, qemu_irq irq, 173 Chardev *chr); 174 175 /* i8259.c */ 176 177 extern DeviceState *isa_pic; 178 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 179 qemu_irq *kvm_i8259_init(ISABus *bus); 180 int pic_read_irq(DeviceState *d); 181 int pic_get_output(DeviceState *d); 182 183 /* ioapic.c */ 184 185 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 186 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 187 188 /* Global System Interrupts */ 189 190 #define GSI_NUM_PINS IOAPIC_NUM_PINS 191 192 typedef struct GSIState { 193 qemu_irq i8259_irq[ISA_NUM_IRQS]; 194 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 195 } GSIState; 196 197 void gsi_handler(void *opaque, int n, int level); 198 199 /* vmport.c */ 200 #define TYPE_VMPORT "vmport" 201 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 202 203 static inline void vmport_init(ISABus *bus) 204 { 205 isa_create_simple(bus, TYPE_VMPORT); 206 } 207 208 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 209 void vmmouse_get_data(uint32_t *data); 210 void vmmouse_set_data(const uint32_t *data); 211 212 /* pckbd.c */ 213 #define I8042_A20_LINE "a20" 214 215 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 216 MemoryRegion *region, ram_addr_t size, 217 hwaddr mask); 218 void i8042_isa_mouse_fake_event(void *opaque); 219 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 220 221 /* pc.c */ 222 extern int fd_bootchk; 223 224 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 225 void pc_register_ferr_irq(qemu_irq irq); 226 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 227 228 void pc_cpus_init(PCMachineState *pcms); 229 void pc_hot_add_cpu(const int64_t id, Error **errp); 230 void pc_acpi_init(const char *default_dsdt); 231 232 void pc_guest_info_init(PCMachineState *pcms); 233 234 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 235 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 236 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 237 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 238 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 239 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 240 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 241 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 242 243 244 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 245 MemoryRegion *pci_address_space); 246 247 void xen_load_linux(PCMachineState *pcms); 248 void pc_memory_init(PCMachineState *pcms, 249 MemoryRegion *system_memory, 250 MemoryRegion *rom_memory, 251 MemoryRegion **ram_memory); 252 qemu_irq pc_allocate_cpu_irq(void); 253 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 254 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 255 ISADevice **rtc_state, 256 bool create_fdctrl, 257 bool no_vmport, 258 bool has_pit, 259 uint32_t hpet_irqs); 260 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 261 void pc_cmos_init(PCMachineState *pcms, 262 BusState *ide0, BusState *ide1, 263 ISADevice *s); 264 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 265 void pc_pci_device_init(PCIBus *pci_bus); 266 267 typedef void (*cpu_set_smm_t)(int smm, void *arg); 268 269 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 270 271 ISADevice *pc_find_fdc0(void); 272 int cmos_get_fd_drive_type(FloppyDriveType fd0); 273 274 #define FW_CFG_IO_BASE 0x510 275 276 #define PORT92_A20_LINE "a20" 277 278 /* acpi_piix.c */ 279 280 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 281 qemu_irq sci_irq, qemu_irq smi_irq, 282 int smm_enabled, DeviceState **piix4_pm); 283 284 /* hpet.c */ 285 extern int no_hpet; 286 287 /* piix_pci.c */ 288 struct PCII440FXState; 289 typedef struct PCII440FXState PCII440FXState; 290 291 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 292 #define TYPE_I440FX_PCI_DEVICE "i440FX" 293 294 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 295 296 /* 297 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 298 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 299 */ 300 #define RCR_IOPORT 0xcf9 301 302 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 303 PCII440FXState **pi440fx_state, int *piix_devfn, 304 ISABus **isa_bus, qemu_irq *pic, 305 MemoryRegion *address_space_mem, 306 MemoryRegion *address_space_io, 307 ram_addr_t ram_size, 308 ram_addr_t below_4g_mem_size, 309 ram_addr_t above_4g_mem_size, 310 MemoryRegion *pci_memory, 311 MemoryRegion *ram_memory); 312 313 PCIBus *find_i440fx(void); 314 /* piix4.c */ 315 extern PCIDevice *piix4_dev; 316 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 317 318 /* vga.c */ 319 enum vga_retrace_method { 320 VGA_RETRACE_DUMB, 321 VGA_RETRACE_PRECISE 322 }; 323 324 extern enum vga_retrace_method vga_retrace_method; 325 326 int isa_vga_mm_init(hwaddr vram_base, 327 hwaddr ctrl_base, int it_shift, 328 MemoryRegion *address_space); 329 330 /* ne2000.c */ 331 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 332 { 333 DeviceState *dev; 334 ISADevice *isadev; 335 336 qemu_check_nic_model(nd, "ne2k_isa"); 337 338 isadev = isa_try_create(bus, "ne2k_isa"); 339 if (!isadev) { 340 return false; 341 } 342 dev = DEVICE(isadev); 343 qdev_prop_set_uint32(dev, "iobase", base); 344 qdev_prop_set_uint32(dev, "irq", irq); 345 qdev_set_nic_properties(dev, nd); 346 qdev_init_nofail(dev); 347 return true; 348 } 349 350 /* pc_sysfw.c */ 351 void pc_system_firmware_init(MemoryRegion *rom_memory, 352 bool isapc_ram_fw); 353 354 /* pvpanic.c */ 355 uint16_t pvpanic_port(void); 356 357 /* acpi-build.c */ 358 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 359 const CPUArchIdList *apic_ids, GArray *entry); 360 361 /* e820 types */ 362 #define E820_RAM 1 363 #define E820_RESERVED 2 364 #define E820_ACPI 3 365 #define E820_NVS 4 366 #define E820_UNUSABLE 5 367 368 int e820_add_entry(uint64_t, uint64_t, uint32_t); 369 int e820_get_num_entries(void); 370 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 371 372 #define PC_COMPAT_2_10 \ 373 HW_COMPAT_2_10 \ 374 375 #define PC_COMPAT_2_9 \ 376 HW_COMPAT_2_9 \ 377 {\ 378 .driver = "mch",\ 379 .property = "extended-tseg-mbytes",\ 380 .value = stringify(0),\ 381 },\ 382 383 #define PC_COMPAT_2_8 \ 384 HW_COMPAT_2_8 \ 385 {\ 386 .driver = TYPE_X86_CPU,\ 387 .property = "tcg-cpuid",\ 388 .value = "off",\ 389 },\ 390 {\ 391 .driver = "kvmclock",\ 392 .property = "x-mach-use-reliable-get-clock",\ 393 .value = "off",\ 394 },\ 395 {\ 396 .driver = "ICH9-LPC",\ 397 .property = "x-smi-broadcast",\ 398 .value = "off",\ 399 },\ 400 {\ 401 .driver = TYPE_X86_CPU,\ 402 .property = "vmware-cpuid-freq",\ 403 .value = "off",\ 404 },\ 405 {\ 406 .driver = "Haswell-" TYPE_X86_CPU,\ 407 .property = "stepping",\ 408 .value = "1",\ 409 }, 410 411 #define PC_COMPAT_2_7 \ 412 HW_COMPAT_2_7 \ 413 {\ 414 .driver = TYPE_X86_CPU,\ 415 .property = "l3-cache",\ 416 .value = "off",\ 417 },\ 418 {\ 419 .driver = TYPE_X86_CPU,\ 420 .property = "full-cpuid-auto-level",\ 421 .value = "off",\ 422 },\ 423 {\ 424 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 425 .property = "family",\ 426 .value = "15",\ 427 },\ 428 {\ 429 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 430 .property = "model",\ 431 .value = "6",\ 432 },\ 433 {\ 434 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 435 .property = "stepping",\ 436 .value = "1",\ 437 },\ 438 {\ 439 .driver = "isa-pcspk",\ 440 .property = "migrate",\ 441 .value = "off",\ 442 }, 443 444 #define PC_COMPAT_2_6 \ 445 HW_COMPAT_2_6 \ 446 {\ 447 .driver = TYPE_X86_CPU,\ 448 .property = "cpuid-0xb",\ 449 .value = "off",\ 450 },{\ 451 .driver = "vmxnet3",\ 452 .property = "romfile",\ 453 .value = "",\ 454 },\ 455 {\ 456 .driver = TYPE_X86_CPU,\ 457 .property = "fill-mtrr-mask",\ 458 .value = "off",\ 459 },\ 460 {\ 461 .driver = "apic-common",\ 462 .property = "legacy-instance-id",\ 463 .value = "on",\ 464 }, 465 466 #define PC_COMPAT_2_5 \ 467 HW_COMPAT_2_5 468 469 /* Helper for setting model-id for CPU models that changed model-id 470 * depending on QEMU versions up to QEMU 2.4. 471 */ 472 #define PC_CPU_MODEL_IDS(v) \ 473 {\ 474 .driver = "qemu32-" TYPE_X86_CPU,\ 475 .property = "model-id",\ 476 .value = "QEMU Virtual CPU version " v,\ 477 },\ 478 {\ 479 .driver = "qemu64-" TYPE_X86_CPU,\ 480 .property = "model-id",\ 481 .value = "QEMU Virtual CPU version " v,\ 482 },\ 483 {\ 484 .driver = "athlon-" TYPE_X86_CPU,\ 485 .property = "model-id",\ 486 .value = "QEMU Virtual CPU version " v,\ 487 }, 488 489 #define PC_COMPAT_2_4 \ 490 HW_COMPAT_2_4 \ 491 PC_CPU_MODEL_IDS("2.4.0") \ 492 {\ 493 .driver = "Haswell-" TYPE_X86_CPU,\ 494 .property = "abm",\ 495 .value = "off",\ 496 },\ 497 {\ 498 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 499 .property = "abm",\ 500 .value = "off",\ 501 },\ 502 {\ 503 .driver = "Broadwell-" TYPE_X86_CPU,\ 504 .property = "abm",\ 505 .value = "off",\ 506 },\ 507 {\ 508 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 509 .property = "abm",\ 510 .value = "off",\ 511 },\ 512 {\ 513 .driver = "host" "-" TYPE_X86_CPU,\ 514 .property = "host-cache-info",\ 515 .value = "on",\ 516 },\ 517 {\ 518 .driver = TYPE_X86_CPU,\ 519 .property = "check",\ 520 .value = "off",\ 521 },\ 522 {\ 523 .driver = "qemu64" "-" TYPE_X86_CPU,\ 524 .property = "sse4a",\ 525 .value = "on",\ 526 },\ 527 {\ 528 .driver = "qemu64" "-" TYPE_X86_CPU,\ 529 .property = "abm",\ 530 .value = "on",\ 531 },\ 532 {\ 533 .driver = "qemu64" "-" TYPE_X86_CPU,\ 534 .property = "popcnt",\ 535 .value = "on",\ 536 },\ 537 {\ 538 .driver = "qemu32" "-" TYPE_X86_CPU,\ 539 .property = "popcnt",\ 540 .value = "on",\ 541 },{\ 542 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 543 .property = "rdtscp",\ 544 .value = "on",\ 545 },{\ 546 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 547 .property = "rdtscp",\ 548 .value = "on",\ 549 },{\ 550 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 551 .property = "rdtscp",\ 552 .value = "on",\ 553 },{\ 554 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 555 .property = "rdtscp",\ 556 .value = "on",\ 557 }, 558 559 560 #define PC_COMPAT_2_3 \ 561 HW_COMPAT_2_3 \ 562 PC_CPU_MODEL_IDS("2.3.0") \ 563 {\ 564 .driver = TYPE_X86_CPU,\ 565 .property = "arat",\ 566 .value = "off",\ 567 },{\ 568 .driver = "qemu64" "-" TYPE_X86_CPU,\ 569 .property = "min-level",\ 570 .value = stringify(4),\ 571 },{\ 572 .driver = "kvm64" "-" TYPE_X86_CPU,\ 573 .property = "min-level",\ 574 .value = stringify(5),\ 575 },{\ 576 .driver = "pentium3" "-" TYPE_X86_CPU,\ 577 .property = "min-level",\ 578 .value = stringify(2),\ 579 },{\ 580 .driver = "n270" "-" TYPE_X86_CPU,\ 581 .property = "min-level",\ 582 .value = stringify(5),\ 583 },{\ 584 .driver = "Conroe" "-" TYPE_X86_CPU,\ 585 .property = "min-level",\ 586 .value = stringify(4),\ 587 },{\ 588 .driver = "Penryn" "-" TYPE_X86_CPU,\ 589 .property = "min-level",\ 590 .value = stringify(4),\ 591 },{\ 592 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 593 .property = "min-level",\ 594 .value = stringify(4),\ 595 },{\ 596 .driver = "n270" "-" TYPE_X86_CPU,\ 597 .property = "min-xlevel",\ 598 .value = stringify(0x8000000a),\ 599 },{\ 600 .driver = "Penryn" "-" TYPE_X86_CPU,\ 601 .property = "min-xlevel",\ 602 .value = stringify(0x8000000a),\ 603 },{\ 604 .driver = "Conroe" "-" TYPE_X86_CPU,\ 605 .property = "min-xlevel",\ 606 .value = stringify(0x8000000a),\ 607 },{\ 608 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 609 .property = "min-xlevel",\ 610 .value = stringify(0x8000000a),\ 611 },{\ 612 .driver = "Westmere" "-" TYPE_X86_CPU,\ 613 .property = "min-xlevel",\ 614 .value = stringify(0x8000000a),\ 615 },{\ 616 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 617 .property = "min-xlevel",\ 618 .value = stringify(0x8000000a),\ 619 },{\ 620 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 621 .property = "min-xlevel",\ 622 .value = stringify(0x8000000a),\ 623 },{\ 624 .driver = "Haswell" "-" TYPE_X86_CPU,\ 625 .property = "min-xlevel",\ 626 .value = stringify(0x8000000a),\ 627 },{\ 628 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 629 .property = "min-xlevel",\ 630 .value = stringify(0x8000000a),\ 631 },{\ 632 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 633 .property = "min-xlevel",\ 634 .value = stringify(0x8000000a),\ 635 },{\ 636 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 637 .property = "min-xlevel",\ 638 .value = stringify(0x8000000a),\ 639 },{\ 640 .driver = TYPE_X86_CPU,\ 641 .property = "kvm-no-smi-migration",\ 642 .value = "on",\ 643 }, 644 645 #define PC_COMPAT_2_2 \ 646 HW_COMPAT_2_2 \ 647 PC_CPU_MODEL_IDS("2.3.0") \ 648 {\ 649 .driver = "kvm64" "-" TYPE_X86_CPU,\ 650 .property = "vme",\ 651 .value = "off",\ 652 },\ 653 {\ 654 .driver = "kvm32" "-" TYPE_X86_CPU,\ 655 .property = "vme",\ 656 .value = "off",\ 657 },\ 658 {\ 659 .driver = "Conroe" "-" TYPE_X86_CPU,\ 660 .property = "vme",\ 661 .value = "off",\ 662 },\ 663 {\ 664 .driver = "Penryn" "-" TYPE_X86_CPU,\ 665 .property = "vme",\ 666 .value = "off",\ 667 },\ 668 {\ 669 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 670 .property = "vme",\ 671 .value = "off",\ 672 },\ 673 {\ 674 .driver = "Westmere" "-" TYPE_X86_CPU,\ 675 .property = "vme",\ 676 .value = "off",\ 677 },\ 678 {\ 679 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 680 .property = "vme",\ 681 .value = "off",\ 682 },\ 683 {\ 684 .driver = "Haswell" "-" TYPE_X86_CPU,\ 685 .property = "vme",\ 686 .value = "off",\ 687 },\ 688 {\ 689 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 690 .property = "vme",\ 691 .value = "off",\ 692 },\ 693 {\ 694 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 695 .property = "vme",\ 696 .value = "off",\ 697 },\ 698 {\ 699 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 700 .property = "vme",\ 701 .value = "off",\ 702 },\ 703 {\ 704 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 705 .property = "vme",\ 706 .value = "off",\ 707 },\ 708 {\ 709 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 710 .property = "vme",\ 711 .value = "off",\ 712 },\ 713 {\ 714 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 715 .property = "vme",\ 716 .value = "off",\ 717 },\ 718 {\ 719 .driver = "Haswell" "-" TYPE_X86_CPU,\ 720 .property = "f16c",\ 721 .value = "off",\ 722 },\ 723 {\ 724 .driver = "Haswell" "-" TYPE_X86_CPU,\ 725 .property = "rdrand",\ 726 .value = "off",\ 727 },\ 728 {\ 729 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 730 .property = "f16c",\ 731 .value = "off",\ 732 },\ 733 {\ 734 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 735 .property = "rdrand",\ 736 .value = "off",\ 737 }, 738 739 #define PC_COMPAT_2_1 \ 740 HW_COMPAT_2_1 \ 741 PC_CPU_MODEL_IDS("2.1.0") \ 742 {\ 743 .driver = "coreduo" "-" TYPE_X86_CPU,\ 744 .property = "vmx",\ 745 .value = "on",\ 746 },\ 747 {\ 748 .driver = "core2duo" "-" TYPE_X86_CPU,\ 749 .property = "vmx",\ 750 .value = "on",\ 751 }, 752 753 #define PC_COMPAT_2_0 \ 754 PC_CPU_MODEL_IDS("2.0.0") \ 755 {\ 756 .driver = "virtio-scsi-pci",\ 757 .property = "any_layout",\ 758 .value = "off",\ 759 },{\ 760 .driver = "PIIX4_PM",\ 761 .property = "memory-hotplug-support",\ 762 .value = "off",\ 763 },\ 764 {\ 765 .driver = "apic",\ 766 .property = "version",\ 767 .value = stringify(0x11),\ 768 },\ 769 {\ 770 .driver = "nec-usb-xhci",\ 771 .property = "superspeed-ports-first",\ 772 .value = "off",\ 773 },\ 774 {\ 775 .driver = "nec-usb-xhci",\ 776 .property = "force-pcie-endcap",\ 777 .value = "on",\ 778 },\ 779 {\ 780 .driver = "pci-serial",\ 781 .property = "prog_if",\ 782 .value = stringify(0),\ 783 },\ 784 {\ 785 .driver = "pci-serial-2x",\ 786 .property = "prog_if",\ 787 .value = stringify(0),\ 788 },\ 789 {\ 790 .driver = "pci-serial-4x",\ 791 .property = "prog_if",\ 792 .value = stringify(0),\ 793 },\ 794 {\ 795 .driver = "virtio-net-pci",\ 796 .property = "guest_announce",\ 797 .value = "off",\ 798 },\ 799 {\ 800 .driver = "ICH9-LPC",\ 801 .property = "memory-hotplug-support",\ 802 .value = "off",\ 803 },{\ 804 .driver = "xio3130-downstream",\ 805 .property = COMPAT_PROP_PCP,\ 806 .value = "off",\ 807 },{\ 808 .driver = "ioh3420",\ 809 .property = COMPAT_PROP_PCP,\ 810 .value = "off",\ 811 }, 812 813 #define PC_COMPAT_1_7 \ 814 PC_CPU_MODEL_IDS("1.7.0") \ 815 {\ 816 .driver = TYPE_USB_DEVICE,\ 817 .property = "msos-desc",\ 818 .value = "no",\ 819 },\ 820 {\ 821 .driver = "PIIX4_PM",\ 822 .property = "acpi-pci-hotplug-with-bridge-support",\ 823 .value = "off",\ 824 },\ 825 {\ 826 .driver = "hpet",\ 827 .property = HPET_INTCAP,\ 828 .value = stringify(4),\ 829 }, 830 831 #define PC_COMPAT_1_6 \ 832 PC_CPU_MODEL_IDS("1.6.0") \ 833 {\ 834 .driver = "e1000",\ 835 .property = "mitigation",\ 836 .value = "off",\ 837 },{\ 838 .driver = "qemu64-" TYPE_X86_CPU,\ 839 .property = "model",\ 840 .value = stringify(2),\ 841 },{\ 842 .driver = "qemu32-" TYPE_X86_CPU,\ 843 .property = "model",\ 844 .value = stringify(3),\ 845 },{\ 846 .driver = "i440FX-pcihost",\ 847 .property = "short_root_bus",\ 848 .value = stringify(1),\ 849 },{\ 850 .driver = "q35-pcihost",\ 851 .property = "short_root_bus",\ 852 .value = stringify(1),\ 853 }, 854 855 #define PC_COMPAT_1_5 \ 856 PC_CPU_MODEL_IDS("1.5.0") \ 857 {\ 858 .driver = "Conroe-" TYPE_X86_CPU,\ 859 .property = "model",\ 860 .value = stringify(2),\ 861 },{\ 862 .driver = "Conroe-" TYPE_X86_CPU,\ 863 .property = "min-level",\ 864 .value = stringify(2),\ 865 },{\ 866 .driver = "Penryn-" TYPE_X86_CPU,\ 867 .property = "model",\ 868 .value = stringify(2),\ 869 },{\ 870 .driver = "Penryn-" TYPE_X86_CPU,\ 871 .property = "min-level",\ 872 .value = stringify(2),\ 873 },{\ 874 .driver = "Nehalem-" TYPE_X86_CPU,\ 875 .property = "model",\ 876 .value = stringify(2),\ 877 },{\ 878 .driver = "Nehalem-" TYPE_X86_CPU,\ 879 .property = "min-level",\ 880 .value = stringify(2),\ 881 },{\ 882 .driver = "virtio-net-pci",\ 883 .property = "any_layout",\ 884 .value = "off",\ 885 },{\ 886 .driver = TYPE_X86_CPU,\ 887 .property = "pmu",\ 888 .value = "on",\ 889 },{\ 890 .driver = "i440FX-pcihost",\ 891 .property = "short_root_bus",\ 892 .value = stringify(0),\ 893 },{\ 894 .driver = "q35-pcihost",\ 895 .property = "short_root_bus",\ 896 .value = stringify(0),\ 897 }, 898 899 #define PC_COMPAT_1_4 \ 900 PC_CPU_MODEL_IDS("1.4.0") \ 901 {\ 902 .driver = "scsi-hd",\ 903 .property = "discard_granularity",\ 904 .value = stringify(0),\ 905 },{\ 906 .driver = "scsi-cd",\ 907 .property = "discard_granularity",\ 908 .value = stringify(0),\ 909 },{\ 910 .driver = "scsi-disk",\ 911 .property = "discard_granularity",\ 912 .value = stringify(0),\ 913 },{\ 914 .driver = "ide-hd",\ 915 .property = "discard_granularity",\ 916 .value = stringify(0),\ 917 },{\ 918 .driver = "ide-cd",\ 919 .property = "discard_granularity",\ 920 .value = stringify(0),\ 921 },{\ 922 .driver = "ide-drive",\ 923 .property = "discard_granularity",\ 924 .value = stringify(0),\ 925 },{\ 926 .driver = "virtio-blk-pci",\ 927 .property = "discard_granularity",\ 928 .value = stringify(0),\ 929 },{\ 930 .driver = "virtio-serial-pci",\ 931 .property = "vectors",\ 932 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 933 .value = stringify(0xFFFFFFFF),\ 934 },{ \ 935 .driver = "virtio-net-pci", \ 936 .property = "ctrl_guest_offloads", \ 937 .value = "off", \ 938 },{\ 939 .driver = "e1000",\ 940 .property = "romfile",\ 941 .value = "pxe-e1000.rom",\ 942 },{\ 943 .driver = "ne2k_pci",\ 944 .property = "romfile",\ 945 .value = "pxe-ne2k_pci.rom",\ 946 },{\ 947 .driver = "pcnet",\ 948 .property = "romfile",\ 949 .value = "pxe-pcnet.rom",\ 950 },{\ 951 .driver = "rtl8139",\ 952 .property = "romfile",\ 953 .value = "pxe-rtl8139.rom",\ 954 },{\ 955 .driver = "virtio-net-pci",\ 956 .property = "romfile",\ 957 .value = "pxe-virtio.rom",\ 958 },{\ 959 .driver = "486-" TYPE_X86_CPU,\ 960 .property = "model",\ 961 .value = stringify(0),\ 962 },\ 963 {\ 964 .driver = "n270" "-" TYPE_X86_CPU,\ 965 .property = "movbe",\ 966 .value = "off",\ 967 },\ 968 {\ 969 .driver = "Westmere" "-" TYPE_X86_CPU,\ 970 .property = "pclmulqdq",\ 971 .value = "off",\ 972 }, 973 974 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 975 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 976 { \ 977 MachineClass *mc = MACHINE_CLASS(oc); \ 978 optsfn(mc); \ 979 mc->init = initfn; \ 980 } \ 981 static const TypeInfo pc_machine_type_##suffix = { \ 982 .name = namestr TYPE_MACHINE_SUFFIX, \ 983 .parent = TYPE_PC_MACHINE, \ 984 .class_init = pc_machine_##suffix##_class_init, \ 985 }; \ 986 static void pc_machine_init_##suffix(void) \ 987 { \ 988 type_register(&pc_machine_type_##suffix); \ 989 } \ 990 type_init(pc_machine_init_##suffix) 991 992 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 993 #endif 994