1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "qemu/typedefs.h" 6 #include "exec/memory.h" 7 #include "hw/boards.h" 8 #include "hw/isa/isa.h" 9 #include "hw/block/fdc.h" 10 #include "net/net.h" 11 #include "hw/i386/ioapic.h" 12 13 #include "qemu/range.h" 14 #include "qemu/bitmap.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/pci/pci.h" 17 #include "hw/boards.h" 18 #include "hw/compat.h" 19 #include "hw/mem/pc-dimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 #ifdef CONFIG_KVM 24 #define kvm_pit_in_kernel() \ 25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 26 #define kvm_pic_in_kernel() \ 27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 28 #define kvm_ioapic_in_kernel() \ 29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 30 #else 31 #define kvm_pit_in_kernel() 0 32 #define kvm_pic_in_kernel() 0 33 #define kvm_ioapic_in_kernel() 0 34 #endif 35 36 /** 37 * PCMachineState: 38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 39 */ 40 struct PCMachineState { 41 /*< private >*/ 42 MachineState parent_obj; 43 44 /* <public> */ 45 46 /* State for other subsystems/APIs: */ 47 MemoryHotplugState hotplug_memory; 48 49 /* Pointers to devices and objects: */ 50 HotplugHandler *acpi_dev; 51 ISADevice *rtc; 52 PCIBus *bus; 53 54 /* Configuration options: */ 55 uint64_t max_ram_below_4g; 56 OnOffAuto vmport; 57 OnOffAuto smm; 58 bool nvdimm; 59 60 /* RAM information (sizes, addresses, configuration): */ 61 ram_addr_t below_4g_mem_size, above_4g_mem_size; 62 }; 63 64 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 65 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 66 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 67 #define PC_MACHINE_VMPORT "vmport" 68 #define PC_MACHINE_SMM "smm" 69 #define PC_MACHINE_NVDIMM "nvdimm" 70 71 /** 72 * PCMachineClass: 73 * 74 * Methods: 75 * 76 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 77 * 78 * Compat fields: 79 * 80 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 81 * backend's alignment value if provided 82 * @acpi_data_size: Size of the chunk of memory at the top of RAM 83 * for the BIOS ACPI tables and other BIOS 84 * datastructures. 85 * @gigabyte_align: Make sure that guest addresses aligned at 86 * 1Gbyte boundaries get mapped to host 87 * addresses aligned at 1Gbyte boundaries. This 88 * way we can use 1GByte pages in the host. 89 * 90 */ 91 struct PCMachineClass { 92 /*< private >*/ 93 MachineClass parent_class; 94 95 /*< public >*/ 96 97 /* Methods: */ 98 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 99 DeviceState *dev); 100 101 /* Device configuration: */ 102 bool pci_enabled; 103 bool kvmclock_enabled; 104 105 /* Compat options: */ 106 107 /* ACPI compat: */ 108 bool has_acpi_build; 109 bool rsdp_in_ram; 110 int legacy_acpi_table_size; 111 unsigned acpi_data_size; 112 113 /* SMBIOS compat: */ 114 bool smbios_defaults; 115 bool smbios_legacy_mode; 116 bool smbios_uuid_encoded; 117 118 /* RAM / address space compat: */ 119 bool gigabyte_align; 120 bool has_reserved_memory; 121 bool enforce_aligned_dimm; 122 bool broken_reserved_end; 123 }; 124 125 #define TYPE_PC_MACHINE "generic-pc-machine" 126 #define PC_MACHINE(obj) \ 127 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 128 #define PC_MACHINE_GET_CLASS(obj) \ 129 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 130 #define PC_MACHINE_CLASS(klass) \ 131 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 132 133 /* PC-style peripherals (also used by other machines). */ 134 135 typedef struct PcPciInfo { 136 Range w32; 137 Range w64; 138 } PcPciInfo; 139 140 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 141 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 142 #define ACPI_PM_PROP_S4_VAL "s4_val" 143 #define ACPI_PM_PROP_SCI_INT "sci_int" 144 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 145 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 146 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 147 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 148 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 149 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 150 151 struct PcGuestInfo { 152 bool isapc_ram_fw; 153 hwaddr ram_size, ram_size_below_4g; 154 unsigned apic_id_limit; 155 bool apic_xrupt_override; 156 uint64_t numa_nodes; 157 uint64_t *node_mem; 158 uint64_t *node_cpu; 159 FWCfgState *fw_cfg; 160 int legacy_acpi_table_size; 161 bool has_acpi_build; 162 bool has_reserved_memory; 163 bool rsdp_in_ram; 164 }; 165 166 /* parallel.c */ 167 168 void parallel_hds_isa_init(ISABus *bus, int n); 169 170 bool parallel_mm_init(MemoryRegion *address_space, 171 hwaddr base, int it_shift, qemu_irq irq, 172 CharDriverState *chr); 173 174 /* i8259.c */ 175 176 extern DeviceState *isa_pic; 177 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 178 qemu_irq *kvm_i8259_init(ISABus *bus); 179 int pic_read_irq(DeviceState *d); 180 int pic_get_output(DeviceState *d); 181 void hmp_info_pic(Monitor *mon, const QDict *qdict); 182 void hmp_info_irq(Monitor *mon, const QDict *qdict); 183 184 /* ioapic.c */ 185 186 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 187 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 188 189 /* Global System Interrupts */ 190 191 #define GSI_NUM_PINS IOAPIC_NUM_PINS 192 193 typedef struct GSIState { 194 qemu_irq i8259_irq[ISA_NUM_IRQS]; 195 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 196 } GSIState; 197 198 void gsi_handler(void *opaque, int n, int level); 199 200 /* vmport.c */ 201 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 202 203 static inline void vmport_init(ISABus *bus) 204 { 205 isa_create_simple(bus, "vmport"); 206 } 207 208 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 209 void vmmouse_get_data(uint32_t *data); 210 void vmmouse_set_data(const uint32_t *data); 211 212 /* pckbd.c */ 213 214 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 215 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 216 MemoryRegion *region, ram_addr_t size, 217 hwaddr mask); 218 void i8042_isa_mouse_fake_event(void *opaque); 219 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 220 221 /* pc.c */ 222 extern int fd_bootchk; 223 224 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 225 void pc_register_ferr_irq(qemu_irq irq); 226 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 227 228 void pc_cpus_init(PCMachineState *pcms); 229 void pc_hot_add_cpu(const int64_t id, Error **errp); 230 void pc_acpi_init(const char *default_dsdt); 231 232 PcGuestInfo *pc_guest_info_init(PCMachineState *pcms); 233 234 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 235 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 236 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 237 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 238 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 239 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 240 241 242 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 243 MemoryRegion *pci_address_space); 244 245 FWCfgState *xen_load_linux(PCMachineState *pcms, 246 PcGuestInfo *guest_info); 247 FWCfgState *pc_memory_init(PCMachineState *pcms, 248 MemoryRegion *system_memory, 249 MemoryRegion *rom_memory, 250 MemoryRegion **ram_memory, 251 PcGuestInfo *guest_info); 252 qemu_irq pc_allocate_cpu_irq(void); 253 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 254 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 255 ISADevice **rtc_state, 256 bool create_fdctrl, 257 bool no_vmport, 258 uint32 hpet_irqs); 259 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 260 void pc_cmos_init(PCMachineState *pcms, 261 BusState *ide0, BusState *ide1, 262 ISADevice *s); 263 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 264 void pc_pci_device_init(PCIBus *pci_bus); 265 266 typedef void (*cpu_set_smm_t)(int smm, void *arg); 267 268 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 269 270 /* acpi_piix.c */ 271 272 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 273 qemu_irq sci_irq, qemu_irq smi_irq, 274 int smm_enabled, DeviceState **piix4_pm); 275 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 276 277 /* hpet.c */ 278 extern int no_hpet; 279 280 /* piix_pci.c */ 281 struct PCII440FXState; 282 typedef struct PCII440FXState PCII440FXState; 283 284 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 285 #define TYPE_I440FX_PCI_DEVICE "i440FX" 286 287 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 288 289 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 290 PCII440FXState **pi440fx_state, int *piix_devfn, 291 ISABus **isa_bus, qemu_irq *pic, 292 MemoryRegion *address_space_mem, 293 MemoryRegion *address_space_io, 294 ram_addr_t ram_size, 295 ram_addr_t below_4g_mem_size, 296 ram_addr_t above_4g_mem_size, 297 MemoryRegion *pci_memory, 298 MemoryRegion *ram_memory); 299 300 PCIBus *find_i440fx(void); 301 /* piix4.c */ 302 extern PCIDevice *piix4_dev; 303 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 304 305 /* vga.c */ 306 enum vga_retrace_method { 307 VGA_RETRACE_DUMB, 308 VGA_RETRACE_PRECISE 309 }; 310 311 extern enum vga_retrace_method vga_retrace_method; 312 313 int isa_vga_mm_init(hwaddr vram_base, 314 hwaddr ctrl_base, int it_shift, 315 MemoryRegion *address_space); 316 317 /* ne2000.c */ 318 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 319 { 320 DeviceState *dev; 321 ISADevice *isadev; 322 323 qemu_check_nic_model(nd, "ne2k_isa"); 324 325 isadev = isa_try_create(bus, "ne2k_isa"); 326 if (!isadev) { 327 return false; 328 } 329 dev = DEVICE(isadev); 330 qdev_prop_set_uint32(dev, "iobase", base); 331 qdev_prop_set_uint32(dev, "irq", irq); 332 qdev_set_nic_properties(dev, nd); 333 qdev_init_nofail(dev); 334 return true; 335 } 336 337 /* pc_sysfw.c */ 338 void pc_system_firmware_init(MemoryRegion *rom_memory, 339 bool isapc_ram_fw); 340 341 /* pvpanic.c */ 342 uint16_t pvpanic_port(void); 343 344 /* e820 types */ 345 #define E820_RAM 1 346 #define E820_RESERVED 2 347 #define E820_ACPI 3 348 #define E820_NVS 4 349 #define E820_UNUSABLE 5 350 351 int e820_add_entry(uint64_t, uint64_t, uint32_t); 352 int e820_get_num_entries(void); 353 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 354 355 #define PC_COMPAT_2_5 \ 356 HW_COMPAT_2_5 357 358 #define PC_COMPAT_2_4 \ 359 PC_COMPAT_2_5 \ 360 HW_COMPAT_2_4 \ 361 {\ 362 .driver = "Haswell-" TYPE_X86_CPU,\ 363 .property = "abm",\ 364 .value = "off",\ 365 },\ 366 {\ 367 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 368 .property = "abm",\ 369 .value = "off",\ 370 },\ 371 {\ 372 .driver = "Broadwell-" TYPE_X86_CPU,\ 373 .property = "abm",\ 374 .value = "off",\ 375 },\ 376 {\ 377 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 378 .property = "abm",\ 379 .value = "off",\ 380 },\ 381 {\ 382 .driver = "host" "-" TYPE_X86_CPU,\ 383 .property = "host-cache-info",\ 384 .value = "on",\ 385 },\ 386 {\ 387 .driver = TYPE_X86_CPU,\ 388 .property = "check",\ 389 .value = "off",\ 390 },\ 391 {\ 392 .driver = "qemu64" "-" TYPE_X86_CPU,\ 393 .property = "sse4a",\ 394 .value = "on",\ 395 },\ 396 {\ 397 .driver = "qemu64" "-" TYPE_X86_CPU,\ 398 .property = "abm",\ 399 .value = "on",\ 400 },\ 401 {\ 402 .driver = "qemu64" "-" TYPE_X86_CPU,\ 403 .property = "popcnt",\ 404 .value = "on",\ 405 },\ 406 {\ 407 .driver = "qemu32" "-" TYPE_X86_CPU,\ 408 .property = "popcnt",\ 409 .value = "on",\ 410 },{\ 411 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 412 .property = "rdtscp",\ 413 .value = "on",\ 414 },{\ 415 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 416 .property = "rdtscp",\ 417 .value = "on",\ 418 },{\ 419 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 420 .property = "rdtscp",\ 421 .value = "on",\ 422 },{\ 423 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 424 .property = "rdtscp",\ 425 .value = "on",\ 426 }, 427 428 429 #define PC_COMPAT_2_3 \ 430 PC_COMPAT_2_4 \ 431 HW_COMPAT_2_3 \ 432 {\ 433 .driver = TYPE_X86_CPU,\ 434 .property = "arat",\ 435 .value = "off",\ 436 },{\ 437 .driver = "qemu64" "-" TYPE_X86_CPU,\ 438 .property = "level",\ 439 .value = stringify(4),\ 440 },{\ 441 .driver = "kvm64" "-" TYPE_X86_CPU,\ 442 .property = "level",\ 443 .value = stringify(5),\ 444 },{\ 445 .driver = "pentium3" "-" TYPE_X86_CPU,\ 446 .property = "level",\ 447 .value = stringify(2),\ 448 },{\ 449 .driver = "n270" "-" TYPE_X86_CPU,\ 450 .property = "level",\ 451 .value = stringify(5),\ 452 },{\ 453 .driver = "Conroe" "-" TYPE_X86_CPU,\ 454 .property = "level",\ 455 .value = stringify(4),\ 456 },{\ 457 .driver = "Penryn" "-" TYPE_X86_CPU,\ 458 .property = "level",\ 459 .value = stringify(4),\ 460 },{\ 461 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 462 .property = "level",\ 463 .value = stringify(4),\ 464 },{\ 465 .driver = "n270" "-" TYPE_X86_CPU,\ 466 .property = "xlevel",\ 467 .value = stringify(0x8000000a),\ 468 },{\ 469 .driver = "Penryn" "-" TYPE_X86_CPU,\ 470 .property = "xlevel",\ 471 .value = stringify(0x8000000a),\ 472 },{\ 473 .driver = "Conroe" "-" TYPE_X86_CPU,\ 474 .property = "xlevel",\ 475 .value = stringify(0x8000000a),\ 476 },{\ 477 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 478 .property = "xlevel",\ 479 .value = stringify(0x8000000a),\ 480 },{\ 481 .driver = "Westmere" "-" TYPE_X86_CPU,\ 482 .property = "xlevel",\ 483 .value = stringify(0x8000000a),\ 484 },{\ 485 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 486 .property = "xlevel",\ 487 .value = stringify(0x8000000a),\ 488 },{\ 489 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 490 .property = "xlevel",\ 491 .value = stringify(0x8000000a),\ 492 },{\ 493 .driver = "Haswell" "-" TYPE_X86_CPU,\ 494 .property = "xlevel",\ 495 .value = stringify(0x8000000a),\ 496 },{\ 497 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 498 .property = "xlevel",\ 499 .value = stringify(0x8000000a),\ 500 },{\ 501 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 502 .property = "xlevel",\ 503 .value = stringify(0x8000000a),\ 504 },{\ 505 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 506 .property = "xlevel",\ 507 .value = stringify(0x8000000a),\ 508 }, 509 510 #define PC_COMPAT_2_2 \ 511 PC_COMPAT_2_3 \ 512 HW_COMPAT_2_2 \ 513 {\ 514 .driver = "kvm64" "-" TYPE_X86_CPU,\ 515 .property = "vme",\ 516 .value = "off",\ 517 },\ 518 {\ 519 .driver = "kvm32" "-" TYPE_X86_CPU,\ 520 .property = "vme",\ 521 .value = "off",\ 522 },\ 523 {\ 524 .driver = "Conroe" "-" TYPE_X86_CPU,\ 525 .property = "vme",\ 526 .value = "off",\ 527 },\ 528 {\ 529 .driver = "Penryn" "-" TYPE_X86_CPU,\ 530 .property = "vme",\ 531 .value = "off",\ 532 },\ 533 {\ 534 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 535 .property = "vme",\ 536 .value = "off",\ 537 },\ 538 {\ 539 .driver = "Westmere" "-" TYPE_X86_CPU,\ 540 .property = "vme",\ 541 .value = "off",\ 542 },\ 543 {\ 544 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 545 .property = "vme",\ 546 .value = "off",\ 547 },\ 548 {\ 549 .driver = "Haswell" "-" TYPE_X86_CPU,\ 550 .property = "vme",\ 551 .value = "off",\ 552 },\ 553 {\ 554 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 555 .property = "vme",\ 556 .value = "off",\ 557 },\ 558 {\ 559 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 560 .property = "vme",\ 561 .value = "off",\ 562 },\ 563 {\ 564 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 565 .property = "vme",\ 566 .value = "off",\ 567 },\ 568 {\ 569 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 570 .property = "vme",\ 571 .value = "off",\ 572 },\ 573 {\ 574 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 575 .property = "vme",\ 576 .value = "off",\ 577 },\ 578 {\ 579 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 580 .property = "vme",\ 581 .value = "off",\ 582 },\ 583 {\ 584 .driver = "Haswell" "-" TYPE_X86_CPU,\ 585 .property = "f16c",\ 586 .value = "off",\ 587 },\ 588 {\ 589 .driver = "Haswell" "-" TYPE_X86_CPU,\ 590 .property = "rdrand",\ 591 .value = "off",\ 592 },\ 593 {\ 594 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 595 .property = "f16c",\ 596 .value = "off",\ 597 },\ 598 {\ 599 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 600 .property = "rdrand",\ 601 .value = "off",\ 602 }, 603 604 #define PC_COMPAT_2_1 \ 605 PC_COMPAT_2_2 \ 606 HW_COMPAT_2_1 \ 607 {\ 608 .driver = "coreduo" "-" TYPE_X86_CPU,\ 609 .property = "vmx",\ 610 .value = "on",\ 611 },\ 612 {\ 613 .driver = "core2duo" "-" TYPE_X86_CPU,\ 614 .property = "vmx",\ 615 .value = "on",\ 616 }, 617 618 #define PC_COMPAT_2_0 \ 619 PC_COMPAT_2_1 \ 620 {\ 621 .driver = "virtio-scsi-pci",\ 622 .property = "any_layout",\ 623 .value = "off",\ 624 },{\ 625 .driver = "PIIX4_PM",\ 626 .property = "memory-hotplug-support",\ 627 .value = "off",\ 628 },\ 629 {\ 630 .driver = "apic",\ 631 .property = "version",\ 632 .value = stringify(0x11),\ 633 },\ 634 {\ 635 .driver = "nec-usb-xhci",\ 636 .property = "superspeed-ports-first",\ 637 .value = "off",\ 638 },\ 639 {\ 640 .driver = "nec-usb-xhci",\ 641 .property = "force-pcie-endcap",\ 642 .value = "on",\ 643 },\ 644 {\ 645 .driver = "pci-serial",\ 646 .property = "prog_if",\ 647 .value = stringify(0),\ 648 },\ 649 {\ 650 .driver = "pci-serial-2x",\ 651 .property = "prog_if",\ 652 .value = stringify(0),\ 653 },\ 654 {\ 655 .driver = "pci-serial-4x",\ 656 .property = "prog_if",\ 657 .value = stringify(0),\ 658 },\ 659 {\ 660 .driver = "virtio-net-pci",\ 661 .property = "guest_announce",\ 662 .value = "off",\ 663 },\ 664 {\ 665 .driver = "ICH9-LPC",\ 666 .property = "memory-hotplug-support",\ 667 .value = "off",\ 668 },{\ 669 .driver = "xio3130-downstream",\ 670 .property = COMPAT_PROP_PCP,\ 671 .value = "off",\ 672 },{\ 673 .driver = "ioh3420",\ 674 .property = COMPAT_PROP_PCP,\ 675 .value = "off",\ 676 }, 677 678 #define PC_COMPAT_1_7 \ 679 PC_COMPAT_2_0 \ 680 {\ 681 .driver = TYPE_USB_DEVICE,\ 682 .property = "msos-desc",\ 683 .value = "no",\ 684 },\ 685 {\ 686 .driver = "PIIX4_PM",\ 687 .property = "acpi-pci-hotplug-with-bridge-support",\ 688 .value = "off",\ 689 },\ 690 {\ 691 .driver = "hpet",\ 692 .property = HPET_INTCAP,\ 693 .value = stringify(4),\ 694 }, 695 696 #define PC_COMPAT_1_6 \ 697 PC_COMPAT_1_7 \ 698 {\ 699 .driver = "e1000",\ 700 .property = "mitigation",\ 701 .value = "off",\ 702 },{\ 703 .driver = "qemu64-" TYPE_X86_CPU,\ 704 .property = "model",\ 705 .value = stringify(2),\ 706 },{\ 707 .driver = "qemu32-" TYPE_X86_CPU,\ 708 .property = "model",\ 709 .value = stringify(3),\ 710 },{\ 711 .driver = "i440FX-pcihost",\ 712 .property = "short_root_bus",\ 713 .value = stringify(1),\ 714 },{\ 715 .driver = "q35-pcihost",\ 716 .property = "short_root_bus",\ 717 .value = stringify(1),\ 718 }, 719 720 #define PC_COMPAT_1_5 \ 721 PC_COMPAT_1_6 \ 722 {\ 723 .driver = "Conroe-" TYPE_X86_CPU,\ 724 .property = "model",\ 725 .value = stringify(2),\ 726 },{\ 727 .driver = "Conroe-" TYPE_X86_CPU,\ 728 .property = "level",\ 729 .value = stringify(2),\ 730 },{\ 731 .driver = "Penryn-" TYPE_X86_CPU,\ 732 .property = "model",\ 733 .value = stringify(2),\ 734 },{\ 735 .driver = "Penryn-" TYPE_X86_CPU,\ 736 .property = "level",\ 737 .value = stringify(2),\ 738 },{\ 739 .driver = "Nehalem-" TYPE_X86_CPU,\ 740 .property = "model",\ 741 .value = stringify(2),\ 742 },{\ 743 .driver = "Nehalem-" TYPE_X86_CPU,\ 744 .property = "level",\ 745 .value = stringify(2),\ 746 },{\ 747 .driver = "virtio-net-pci",\ 748 .property = "any_layout",\ 749 .value = "off",\ 750 },{\ 751 .driver = TYPE_X86_CPU,\ 752 .property = "pmu",\ 753 .value = "on",\ 754 },{\ 755 .driver = "i440FX-pcihost",\ 756 .property = "short_root_bus",\ 757 .value = stringify(0),\ 758 },{\ 759 .driver = "q35-pcihost",\ 760 .property = "short_root_bus",\ 761 .value = stringify(0),\ 762 }, 763 764 #define PC_COMPAT_1_4 \ 765 PC_COMPAT_1_5 \ 766 {\ 767 .driver = "scsi-hd",\ 768 .property = "discard_granularity",\ 769 .value = stringify(0),\ 770 },{\ 771 .driver = "scsi-cd",\ 772 .property = "discard_granularity",\ 773 .value = stringify(0),\ 774 },{\ 775 .driver = "scsi-disk",\ 776 .property = "discard_granularity",\ 777 .value = stringify(0),\ 778 },{\ 779 .driver = "ide-hd",\ 780 .property = "discard_granularity",\ 781 .value = stringify(0),\ 782 },{\ 783 .driver = "ide-cd",\ 784 .property = "discard_granularity",\ 785 .value = stringify(0),\ 786 },{\ 787 .driver = "ide-drive",\ 788 .property = "discard_granularity",\ 789 .value = stringify(0),\ 790 },{\ 791 .driver = "virtio-blk-pci",\ 792 .property = "discard_granularity",\ 793 .value = stringify(0),\ 794 },{\ 795 .driver = "virtio-serial-pci",\ 796 .property = "vectors",\ 797 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 798 .value = stringify(0xFFFFFFFF),\ 799 },{ \ 800 .driver = "virtio-net-pci", \ 801 .property = "ctrl_guest_offloads", \ 802 .value = "off", \ 803 },{\ 804 .driver = "e1000",\ 805 .property = "romfile",\ 806 .value = "pxe-e1000.rom",\ 807 },{\ 808 .driver = "ne2k_pci",\ 809 .property = "romfile",\ 810 .value = "pxe-ne2k_pci.rom",\ 811 },{\ 812 .driver = "pcnet",\ 813 .property = "romfile",\ 814 .value = "pxe-pcnet.rom",\ 815 },{\ 816 .driver = "rtl8139",\ 817 .property = "romfile",\ 818 .value = "pxe-rtl8139.rom",\ 819 },{\ 820 .driver = "virtio-net-pci",\ 821 .property = "romfile",\ 822 .value = "pxe-virtio.rom",\ 823 },{\ 824 .driver = "486-" TYPE_X86_CPU,\ 825 .property = "model",\ 826 .value = stringify(0),\ 827 },\ 828 {\ 829 .driver = "n270" "-" TYPE_X86_CPU,\ 830 .property = "movbe",\ 831 .value = "off",\ 832 },\ 833 {\ 834 .driver = "Westmere" "-" TYPE_X86_CPU,\ 835 .property = "pclmulqdq",\ 836 .value = "off",\ 837 }, 838 839 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 840 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 841 { \ 842 MachineClass *mc = MACHINE_CLASS(oc); \ 843 optsfn(mc); \ 844 mc->name = namestr; \ 845 mc->init = initfn; \ 846 } \ 847 static const TypeInfo pc_machine_type_##suffix = { \ 848 .name = namestr TYPE_MACHINE_SUFFIX, \ 849 .parent = TYPE_PC_MACHINE, \ 850 .class_init = pc_machine_##suffix##_class_init, \ 851 }; \ 852 static void pc_machine_init_##suffix(void) \ 853 { \ 854 type_register(&pc_machine_type_##suffix); \ 855 } \ 856 machine_init(pc_machine_init_##suffix) 857 858 #define SET_MACHINE_COMPAT(m, COMPAT) do { \ 859 static GlobalProperty props[] = { \ 860 COMPAT \ 861 { /* end of list */ } \ 862 }; \ 863 (m)->compat_props = props; \ 864 } while (0) 865 866 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 867 #endif 868