1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus_enabled; 53 bool sata_enabled; 54 bool pit_enabled; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 /* Global System Interrupts */ 158 159 #define GSI_NUM_PINS IOAPIC_NUM_PINS 160 161 typedef struct GSIState { 162 qemu_irq i8259_irq[ISA_NUM_IRQS]; 163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 164 } GSIState; 165 166 void gsi_handler(void *opaque, int n, int level); 167 168 /* vmport.c */ 169 #define TYPE_VMPORT "vmport" 170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 171 172 static inline void vmport_init(ISABus *bus) 173 { 174 isa_create_simple(bus, TYPE_VMPORT); 175 } 176 177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 178 void vmmouse_get_data(uint32_t *data); 179 void vmmouse_set_data(const uint32_t *data); 180 181 /* pc.c */ 182 extern int fd_bootchk; 183 184 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 185 void pc_register_ferr_irq(qemu_irq irq); 186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 187 188 void pc_cpus_init(PCMachineState *pcms); 189 void pc_hot_add_cpu(const int64_t id, Error **errp); 190 void pc_acpi_init(const char *default_dsdt); 191 192 void pc_guest_info_init(PCMachineState *pcms); 193 194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 201 202 203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 204 MemoryRegion *pci_address_space); 205 206 void xen_load_linux(PCMachineState *pcms); 207 void pc_memory_init(PCMachineState *pcms, 208 MemoryRegion *system_memory, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory); 211 uint64_t pc_pci_hole64_start(void); 212 qemu_irq pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 bool create_fdctrl, 217 bool no_vmport, 218 bool has_pit, 219 uint32_t hpet_irqs); 220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 221 void pc_cmos_init(PCMachineState *pcms, 222 BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 230 231 ISADevice *pc_find_fdc0(void); 232 int cmos_get_fd_drive_type(FloppyDriveType fd0); 233 234 #define FW_CFG_IO_BASE 0x510 235 236 #define PORT92_A20_LINE "a20" 237 238 /* acpi_piix.c */ 239 240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 241 qemu_irq sci_irq, qemu_irq smi_irq, 242 int smm_enabled, DeviceState **piix4_pm); 243 244 /* hpet.c */ 245 extern int no_hpet; 246 247 /* piix_pci.c */ 248 struct PCII440FXState; 249 typedef struct PCII440FXState PCII440FXState; 250 251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 252 #define TYPE_I440FX_PCI_DEVICE "i440FX" 253 254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 255 256 /* 257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 259 */ 260 #define RCR_IOPORT 0xcf9 261 262 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 263 PCII440FXState **pi440fx_state, int *piix_devfn, 264 ISABus **isa_bus, qemu_irq *pic, 265 MemoryRegion *address_space_mem, 266 MemoryRegion *address_space_io, 267 ram_addr_t ram_size, 268 ram_addr_t below_4g_mem_size, 269 ram_addr_t above_4g_mem_size, 270 MemoryRegion *pci_memory, 271 MemoryRegion *ram_memory); 272 273 PCIBus *find_i440fx(void); 274 /* piix4.c */ 275 extern PCIDevice *piix4_dev; 276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 277 278 /* pc_sysfw.c */ 279 void pc_system_firmware_init(MemoryRegion *rom_memory, 280 bool isapc_ram_fw); 281 282 /* acpi-build.c */ 283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 284 const CPUArchIdList *apic_ids, GArray *entry); 285 286 /* e820 types */ 287 #define E820_RAM 1 288 #define E820_RESERVED 2 289 #define E820_ACPI 3 290 #define E820_NVS 4 291 #define E820_UNUSABLE 5 292 293 int e820_add_entry(uint64_t, uint64_t, uint32_t); 294 int e820_get_num_entries(void); 295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 296 297 #define PC_COMPAT_3_1 \ 298 HW_COMPAT_3_1 \ 299 300 #define PC_COMPAT_3_0 \ 301 HW_COMPAT_3_0 \ 302 {\ 303 .driver = TYPE_X86_CPU,\ 304 .property = "x-hv-synic-kvm-only",\ 305 .value = "on",\ 306 },{\ 307 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 308 .property = "pku",\ 309 .value = "off",\ 310 },{\ 311 .driver = "Skylake-Server-IBRS" "-" TYPE_X86_CPU,\ 312 .property = "pku",\ 313 .value = "off",\ 314 }, 315 316 #define PC_COMPAT_2_12 \ 317 HW_COMPAT_2_12 \ 318 {\ 319 .driver = TYPE_X86_CPU,\ 320 .property = "legacy-cache",\ 321 .value = "on",\ 322 },{\ 323 .driver = TYPE_X86_CPU,\ 324 .property = "topoext",\ 325 .value = "off",\ 326 },{\ 327 .driver = "EPYC-" TYPE_X86_CPU,\ 328 .property = "xlevel",\ 329 .value = stringify(0x8000000a),\ 330 },{\ 331 .driver = "EPYC-IBPB-" TYPE_X86_CPU,\ 332 .property = "xlevel",\ 333 .value = stringify(0x8000000a),\ 334 }, 335 336 #define PC_COMPAT_2_11 \ 337 HW_COMPAT_2_11 \ 338 {\ 339 .driver = TYPE_X86_CPU,\ 340 .property = "x-migrate-smi-count",\ 341 .value = "off",\ 342 },{\ 343 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 344 .property = "clflushopt",\ 345 .value = "off",\ 346 }, 347 348 #define PC_COMPAT_2_10 \ 349 HW_COMPAT_2_10 \ 350 {\ 351 .driver = TYPE_X86_CPU,\ 352 .property = "x-hv-max-vps",\ 353 .value = "0x40",\ 354 },{\ 355 .driver = "i440FX-pcihost",\ 356 .property = "x-pci-hole64-fix",\ 357 .value = "off",\ 358 },{\ 359 .driver = "q35-pcihost",\ 360 .property = "x-pci-hole64-fix",\ 361 .value = "off",\ 362 }, 363 364 #define PC_COMPAT_2_9 \ 365 HW_COMPAT_2_9 \ 366 {\ 367 .driver = "mch",\ 368 .property = "extended-tseg-mbytes",\ 369 .value = stringify(0),\ 370 },\ 371 372 #define PC_COMPAT_2_8 \ 373 HW_COMPAT_2_8 \ 374 {\ 375 .driver = TYPE_X86_CPU,\ 376 .property = "tcg-cpuid",\ 377 .value = "off",\ 378 },\ 379 {\ 380 .driver = "kvmclock",\ 381 .property = "x-mach-use-reliable-get-clock",\ 382 .value = "off",\ 383 },\ 384 {\ 385 .driver = "ICH9-LPC",\ 386 .property = "x-smi-broadcast",\ 387 .value = "off",\ 388 },\ 389 {\ 390 .driver = TYPE_X86_CPU,\ 391 .property = "vmware-cpuid-freq",\ 392 .value = "off",\ 393 },\ 394 {\ 395 .driver = "Haswell-" TYPE_X86_CPU,\ 396 .property = "stepping",\ 397 .value = "1",\ 398 }, 399 400 #define PC_COMPAT_2_7 \ 401 HW_COMPAT_2_7 \ 402 {\ 403 .driver = TYPE_X86_CPU,\ 404 .property = "l3-cache",\ 405 .value = "off",\ 406 },\ 407 {\ 408 .driver = TYPE_X86_CPU,\ 409 .property = "full-cpuid-auto-level",\ 410 .value = "off",\ 411 },\ 412 {\ 413 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 414 .property = "family",\ 415 .value = "15",\ 416 },\ 417 {\ 418 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 419 .property = "model",\ 420 .value = "6",\ 421 },\ 422 {\ 423 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 424 .property = "stepping",\ 425 .value = "1",\ 426 },\ 427 {\ 428 .driver = "isa-pcspk",\ 429 .property = "migrate",\ 430 .value = "off",\ 431 }, 432 433 #define PC_COMPAT_2_6 \ 434 HW_COMPAT_2_6 \ 435 {\ 436 .driver = TYPE_X86_CPU,\ 437 .property = "cpuid-0xb",\ 438 .value = "off",\ 439 },{\ 440 .driver = "vmxnet3",\ 441 .property = "romfile",\ 442 .value = "",\ 443 },\ 444 {\ 445 .driver = TYPE_X86_CPU,\ 446 .property = "fill-mtrr-mask",\ 447 .value = "off",\ 448 },\ 449 {\ 450 .driver = "apic-common",\ 451 .property = "legacy-instance-id",\ 452 .value = "on",\ 453 }, 454 455 #define PC_COMPAT_2_5 \ 456 HW_COMPAT_2_5 457 458 /* Helper for setting model-id for CPU models that changed model-id 459 * depending on QEMU versions up to QEMU 2.4. 460 */ 461 #define PC_CPU_MODEL_IDS(v) \ 462 {\ 463 .driver = "qemu32-" TYPE_X86_CPU,\ 464 .property = "model-id",\ 465 .value = "QEMU Virtual CPU version " v,\ 466 },\ 467 {\ 468 .driver = "qemu64-" TYPE_X86_CPU,\ 469 .property = "model-id",\ 470 .value = "QEMU Virtual CPU version " v,\ 471 },\ 472 {\ 473 .driver = "athlon-" TYPE_X86_CPU,\ 474 .property = "model-id",\ 475 .value = "QEMU Virtual CPU version " v,\ 476 }, 477 478 #define PC_COMPAT_2_4 \ 479 HW_COMPAT_2_4 \ 480 PC_CPU_MODEL_IDS("2.4.0") \ 481 {\ 482 .driver = "Haswell-" TYPE_X86_CPU,\ 483 .property = "abm",\ 484 .value = "off",\ 485 },\ 486 {\ 487 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 488 .property = "abm",\ 489 .value = "off",\ 490 },\ 491 {\ 492 .driver = "Broadwell-" TYPE_X86_CPU,\ 493 .property = "abm",\ 494 .value = "off",\ 495 },\ 496 {\ 497 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 498 .property = "abm",\ 499 .value = "off",\ 500 },\ 501 {\ 502 .driver = "host" "-" TYPE_X86_CPU,\ 503 .property = "host-cache-info",\ 504 .value = "on",\ 505 },\ 506 {\ 507 .driver = TYPE_X86_CPU,\ 508 .property = "check",\ 509 .value = "off",\ 510 },\ 511 {\ 512 .driver = "qemu64" "-" TYPE_X86_CPU,\ 513 .property = "sse4a",\ 514 .value = "on",\ 515 },\ 516 {\ 517 .driver = "qemu64" "-" TYPE_X86_CPU,\ 518 .property = "abm",\ 519 .value = "on",\ 520 },\ 521 {\ 522 .driver = "qemu64" "-" TYPE_X86_CPU,\ 523 .property = "popcnt",\ 524 .value = "on",\ 525 },\ 526 {\ 527 .driver = "qemu32" "-" TYPE_X86_CPU,\ 528 .property = "popcnt",\ 529 .value = "on",\ 530 },{\ 531 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 532 .property = "rdtscp",\ 533 .value = "on",\ 534 },{\ 535 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 536 .property = "rdtscp",\ 537 .value = "on",\ 538 },{\ 539 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 540 .property = "rdtscp",\ 541 .value = "on",\ 542 },{\ 543 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 544 .property = "rdtscp",\ 545 .value = "on",\ 546 }, 547 548 549 #define PC_COMPAT_2_3 \ 550 HW_COMPAT_2_3 \ 551 PC_CPU_MODEL_IDS("2.3.0") \ 552 {\ 553 .driver = TYPE_X86_CPU,\ 554 .property = "arat",\ 555 .value = "off",\ 556 },{\ 557 .driver = "qemu64" "-" TYPE_X86_CPU,\ 558 .property = "min-level",\ 559 .value = stringify(4),\ 560 },{\ 561 .driver = "kvm64" "-" TYPE_X86_CPU,\ 562 .property = "min-level",\ 563 .value = stringify(5),\ 564 },{\ 565 .driver = "pentium3" "-" TYPE_X86_CPU,\ 566 .property = "min-level",\ 567 .value = stringify(2),\ 568 },{\ 569 .driver = "n270" "-" TYPE_X86_CPU,\ 570 .property = "min-level",\ 571 .value = stringify(5),\ 572 },{\ 573 .driver = "Conroe" "-" TYPE_X86_CPU,\ 574 .property = "min-level",\ 575 .value = stringify(4),\ 576 },{\ 577 .driver = "Penryn" "-" TYPE_X86_CPU,\ 578 .property = "min-level",\ 579 .value = stringify(4),\ 580 },{\ 581 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 582 .property = "min-level",\ 583 .value = stringify(4),\ 584 },{\ 585 .driver = "n270" "-" TYPE_X86_CPU,\ 586 .property = "min-xlevel",\ 587 .value = stringify(0x8000000a),\ 588 },{\ 589 .driver = "Penryn" "-" TYPE_X86_CPU,\ 590 .property = "min-xlevel",\ 591 .value = stringify(0x8000000a),\ 592 },{\ 593 .driver = "Conroe" "-" TYPE_X86_CPU,\ 594 .property = "min-xlevel",\ 595 .value = stringify(0x8000000a),\ 596 },{\ 597 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 598 .property = "min-xlevel",\ 599 .value = stringify(0x8000000a),\ 600 },{\ 601 .driver = "Westmere" "-" TYPE_X86_CPU,\ 602 .property = "min-xlevel",\ 603 .value = stringify(0x8000000a),\ 604 },{\ 605 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 606 .property = "min-xlevel",\ 607 .value = stringify(0x8000000a),\ 608 },{\ 609 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 610 .property = "min-xlevel",\ 611 .value = stringify(0x8000000a),\ 612 },{\ 613 .driver = "Haswell" "-" TYPE_X86_CPU,\ 614 .property = "min-xlevel",\ 615 .value = stringify(0x8000000a),\ 616 },{\ 617 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 618 .property = "min-xlevel",\ 619 .value = stringify(0x8000000a),\ 620 },{\ 621 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 622 .property = "min-xlevel",\ 623 .value = stringify(0x8000000a),\ 624 },{\ 625 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 626 .property = "min-xlevel",\ 627 .value = stringify(0x8000000a),\ 628 },{\ 629 .driver = TYPE_X86_CPU,\ 630 .property = "kvm-no-smi-migration",\ 631 .value = "on",\ 632 }, 633 634 #define PC_COMPAT_2_2 \ 635 HW_COMPAT_2_2 \ 636 PC_CPU_MODEL_IDS("2.2.0") \ 637 {\ 638 .driver = "kvm64" "-" TYPE_X86_CPU,\ 639 .property = "vme",\ 640 .value = "off",\ 641 },\ 642 {\ 643 .driver = "kvm32" "-" TYPE_X86_CPU,\ 644 .property = "vme",\ 645 .value = "off",\ 646 },\ 647 {\ 648 .driver = "Conroe" "-" TYPE_X86_CPU,\ 649 .property = "vme",\ 650 .value = "off",\ 651 },\ 652 {\ 653 .driver = "Penryn" "-" TYPE_X86_CPU,\ 654 .property = "vme",\ 655 .value = "off",\ 656 },\ 657 {\ 658 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 659 .property = "vme",\ 660 .value = "off",\ 661 },\ 662 {\ 663 .driver = "Westmere" "-" TYPE_X86_CPU,\ 664 .property = "vme",\ 665 .value = "off",\ 666 },\ 667 {\ 668 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 669 .property = "vme",\ 670 .value = "off",\ 671 },\ 672 {\ 673 .driver = "Haswell" "-" TYPE_X86_CPU,\ 674 .property = "vme",\ 675 .value = "off",\ 676 },\ 677 {\ 678 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 679 .property = "vme",\ 680 .value = "off",\ 681 },\ 682 {\ 683 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 684 .property = "vme",\ 685 .value = "off",\ 686 },\ 687 {\ 688 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 689 .property = "vme",\ 690 .value = "off",\ 691 },\ 692 {\ 693 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 694 .property = "vme",\ 695 .value = "off",\ 696 },\ 697 {\ 698 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 699 .property = "vme",\ 700 .value = "off",\ 701 },\ 702 {\ 703 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 704 .property = "vme",\ 705 .value = "off",\ 706 },\ 707 {\ 708 .driver = "Haswell" "-" TYPE_X86_CPU,\ 709 .property = "f16c",\ 710 .value = "off",\ 711 },\ 712 {\ 713 .driver = "Haswell" "-" TYPE_X86_CPU,\ 714 .property = "rdrand",\ 715 .value = "off",\ 716 },\ 717 {\ 718 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 719 .property = "f16c",\ 720 .value = "off",\ 721 },\ 722 {\ 723 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 724 .property = "rdrand",\ 725 .value = "off",\ 726 }, 727 728 #define PC_COMPAT_2_1 \ 729 HW_COMPAT_2_1 \ 730 PC_CPU_MODEL_IDS("2.1.0") \ 731 {\ 732 .driver = "coreduo" "-" TYPE_X86_CPU,\ 733 .property = "vmx",\ 734 .value = "on",\ 735 },\ 736 {\ 737 .driver = "core2duo" "-" TYPE_X86_CPU,\ 738 .property = "vmx",\ 739 .value = "on",\ 740 }, 741 742 #define PC_COMPAT_2_0 \ 743 PC_CPU_MODEL_IDS("2.0.0") \ 744 {\ 745 .driver = "virtio-scsi-pci",\ 746 .property = "any_layout",\ 747 .value = "off",\ 748 },{\ 749 .driver = "PIIX4_PM",\ 750 .property = "memory-hotplug-support",\ 751 .value = "off",\ 752 },\ 753 {\ 754 .driver = "apic",\ 755 .property = "version",\ 756 .value = stringify(0x11),\ 757 },\ 758 {\ 759 .driver = "nec-usb-xhci",\ 760 .property = "superspeed-ports-first",\ 761 .value = "off",\ 762 },\ 763 {\ 764 .driver = "nec-usb-xhci",\ 765 .property = "force-pcie-endcap",\ 766 .value = "on",\ 767 },\ 768 {\ 769 .driver = "pci-serial",\ 770 .property = "prog_if",\ 771 .value = stringify(0),\ 772 },\ 773 {\ 774 .driver = "pci-serial-2x",\ 775 .property = "prog_if",\ 776 .value = stringify(0),\ 777 },\ 778 {\ 779 .driver = "pci-serial-4x",\ 780 .property = "prog_if",\ 781 .value = stringify(0),\ 782 },\ 783 {\ 784 .driver = "virtio-net-pci",\ 785 .property = "guest_announce",\ 786 .value = "off",\ 787 },\ 788 {\ 789 .driver = "ICH9-LPC",\ 790 .property = "memory-hotplug-support",\ 791 .value = "off",\ 792 },{\ 793 .driver = "xio3130-downstream",\ 794 .property = COMPAT_PROP_PCP,\ 795 .value = "off",\ 796 },{\ 797 .driver = "ioh3420",\ 798 .property = COMPAT_PROP_PCP,\ 799 .value = "off",\ 800 }, 801 802 #define PC_COMPAT_1_7 \ 803 PC_CPU_MODEL_IDS("1.7.0") \ 804 {\ 805 .driver = TYPE_USB_DEVICE,\ 806 .property = "msos-desc",\ 807 .value = "no",\ 808 },\ 809 {\ 810 .driver = "PIIX4_PM",\ 811 .property = "acpi-pci-hotplug-with-bridge-support",\ 812 .value = "off",\ 813 },\ 814 {\ 815 .driver = "hpet",\ 816 .property = HPET_INTCAP,\ 817 .value = stringify(4),\ 818 }, 819 820 #define PC_COMPAT_1_6 \ 821 PC_CPU_MODEL_IDS("1.6.0") \ 822 {\ 823 .driver = "e1000",\ 824 .property = "mitigation",\ 825 .value = "off",\ 826 },{\ 827 .driver = "qemu64-" TYPE_X86_CPU,\ 828 .property = "model",\ 829 .value = stringify(2),\ 830 },{\ 831 .driver = "qemu32-" TYPE_X86_CPU,\ 832 .property = "model",\ 833 .value = stringify(3),\ 834 },{\ 835 .driver = "i440FX-pcihost",\ 836 .property = "short_root_bus",\ 837 .value = stringify(1),\ 838 },{\ 839 .driver = "q35-pcihost",\ 840 .property = "short_root_bus",\ 841 .value = stringify(1),\ 842 }, 843 844 #define PC_COMPAT_1_5 \ 845 PC_CPU_MODEL_IDS("1.5.0") \ 846 {\ 847 .driver = "Conroe-" TYPE_X86_CPU,\ 848 .property = "model",\ 849 .value = stringify(2),\ 850 },{\ 851 .driver = "Conroe-" TYPE_X86_CPU,\ 852 .property = "min-level",\ 853 .value = stringify(2),\ 854 },{\ 855 .driver = "Penryn-" TYPE_X86_CPU,\ 856 .property = "model",\ 857 .value = stringify(2),\ 858 },{\ 859 .driver = "Penryn-" TYPE_X86_CPU,\ 860 .property = "min-level",\ 861 .value = stringify(2),\ 862 },{\ 863 .driver = "Nehalem-" TYPE_X86_CPU,\ 864 .property = "model",\ 865 .value = stringify(2),\ 866 },{\ 867 .driver = "Nehalem-" TYPE_X86_CPU,\ 868 .property = "min-level",\ 869 .value = stringify(2),\ 870 },{\ 871 .driver = "virtio-net-pci",\ 872 .property = "any_layout",\ 873 .value = "off",\ 874 },{\ 875 .driver = TYPE_X86_CPU,\ 876 .property = "pmu",\ 877 .value = "on",\ 878 },{\ 879 .driver = "i440FX-pcihost",\ 880 .property = "short_root_bus",\ 881 .value = stringify(0),\ 882 },{\ 883 .driver = "q35-pcihost",\ 884 .property = "short_root_bus",\ 885 .value = stringify(0),\ 886 }, 887 888 #define PC_COMPAT_1_4 \ 889 PC_CPU_MODEL_IDS("1.4.0") \ 890 {\ 891 .driver = "scsi-hd",\ 892 .property = "discard_granularity",\ 893 .value = stringify(0),\ 894 },{\ 895 .driver = "scsi-cd",\ 896 .property = "discard_granularity",\ 897 .value = stringify(0),\ 898 },{\ 899 .driver = "scsi-disk",\ 900 .property = "discard_granularity",\ 901 .value = stringify(0),\ 902 },{\ 903 .driver = "ide-hd",\ 904 .property = "discard_granularity",\ 905 .value = stringify(0),\ 906 },{\ 907 .driver = "ide-cd",\ 908 .property = "discard_granularity",\ 909 .value = stringify(0),\ 910 },{\ 911 .driver = "ide-drive",\ 912 .property = "discard_granularity",\ 913 .value = stringify(0),\ 914 },{\ 915 .driver = "virtio-blk-pci",\ 916 .property = "discard_granularity",\ 917 .value = stringify(0),\ 918 },{\ 919 .driver = "virtio-serial-pci",\ 920 .property = "vectors",\ 921 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 922 .value = stringify(0xFFFFFFFF),\ 923 },{ \ 924 .driver = "virtio-net-pci", \ 925 .property = "ctrl_guest_offloads", \ 926 .value = "off", \ 927 },{\ 928 .driver = "e1000",\ 929 .property = "romfile",\ 930 .value = "pxe-e1000.rom",\ 931 },{\ 932 .driver = "ne2k_pci",\ 933 .property = "romfile",\ 934 .value = "pxe-ne2k_pci.rom",\ 935 },{\ 936 .driver = "pcnet",\ 937 .property = "romfile",\ 938 .value = "pxe-pcnet.rom",\ 939 },{\ 940 .driver = "rtl8139",\ 941 .property = "romfile",\ 942 .value = "pxe-rtl8139.rom",\ 943 },{\ 944 .driver = "virtio-net-pci",\ 945 .property = "romfile",\ 946 .value = "pxe-virtio.rom",\ 947 },{\ 948 .driver = "486-" TYPE_X86_CPU,\ 949 .property = "model",\ 950 .value = stringify(0),\ 951 },\ 952 {\ 953 .driver = "n270" "-" TYPE_X86_CPU,\ 954 .property = "movbe",\ 955 .value = "off",\ 956 },\ 957 {\ 958 .driver = "Westmere" "-" TYPE_X86_CPU,\ 959 .property = "pclmulqdq",\ 960 .value = "off",\ 961 }, 962 963 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 964 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 965 { \ 966 MachineClass *mc = MACHINE_CLASS(oc); \ 967 optsfn(mc); \ 968 mc->init = initfn; \ 969 } \ 970 static const TypeInfo pc_machine_type_##suffix = { \ 971 .name = namestr TYPE_MACHINE_SUFFIX, \ 972 .parent = TYPE_PC_MACHINE, \ 973 .class_init = pc_machine_##suffix##_class_init, \ 974 }; \ 975 static void pc_machine_init_##suffix(void) \ 976 { \ 977 type_register(&pc_machine_type_##suffix); \ 978 } \ 979 type_init(pc_machine_init_##suffix) 980 981 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 982 #endif 983