1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/isa/isa.h" 7 #include "hw/block/fdc.h" 8 #include "net/net.h" 9 #include "hw/i386/ioapic.h" 10 11 #include "qemu/range.h" 12 13 /* PC-style peripherals (also used by other machines). */ 14 15 typedef struct PcPciInfo { 16 Range w32; 17 Range w64; 18 } PcPciInfo; 19 20 struct PcGuestInfo { 21 PcPciInfo pci_info; 22 bool has_pci_info; 23 FWCfgState *fw_cfg; 24 }; 25 26 /* parallel.c */ 27 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 28 { 29 DeviceState *dev; 30 ISADevice *isadev; 31 32 isadev = isa_try_create(bus, "isa-parallel"); 33 if (!isadev) { 34 return false; 35 } 36 dev = DEVICE(isadev); 37 qdev_prop_set_uint32(dev, "index", index); 38 qdev_prop_set_chr(dev, "chardev", chr); 39 if (qdev_init(dev) < 0) { 40 return false; 41 } 42 return true; 43 } 44 45 bool parallel_mm_init(MemoryRegion *address_space, 46 hwaddr base, int it_shift, qemu_irq irq, 47 CharDriverState *chr); 48 49 /* i8259.c */ 50 51 extern DeviceState *isa_pic; 52 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 53 qemu_irq *kvm_i8259_init(ISABus *bus); 54 int pic_read_irq(DeviceState *d); 55 int pic_get_output(DeviceState *d); 56 void pic_info(Monitor *mon, const QDict *qdict); 57 void irq_info(Monitor *mon, const QDict *qdict); 58 59 /* Global System Interrupts */ 60 61 #define GSI_NUM_PINS IOAPIC_NUM_PINS 62 63 typedef struct GSIState { 64 qemu_irq i8259_irq[ISA_NUM_IRQS]; 65 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 66 } GSIState; 67 68 void gsi_handler(void *opaque, int n, int level); 69 70 /* vmport.c */ 71 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 72 73 static inline void vmport_init(ISABus *bus) 74 { 75 isa_create_simple(bus, "vmport"); 76 } 77 78 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 79 void vmmouse_get_data(uint32_t *data); 80 void vmmouse_set_data(const uint32_t *data); 81 82 /* pckbd.c */ 83 84 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 85 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 86 MemoryRegion *region, ram_addr_t size, 87 hwaddr mask); 88 void i8042_isa_mouse_fake_event(void *opaque); 89 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 90 91 /* pc.c */ 92 extern int fd_bootchk; 93 94 void pc_register_ferr_irq(qemu_irq irq); 95 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 96 97 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 98 void pc_hot_add_cpu(const int64_t id, Error **errp); 99 void pc_acpi_init(const char *default_dsdt); 100 101 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 102 ram_addr_t above_4g_mem_size); 103 104 FWCfgState *pc_memory_init(MemoryRegion *system_memory, 105 const char *kernel_filename, 106 const char *kernel_cmdline, 107 const char *initrd_filename, 108 ram_addr_t below_4g_mem_size, 109 ram_addr_t above_4g_mem_size, 110 MemoryRegion *rom_memory, 111 MemoryRegion **ram_memory, 112 PcGuestInfo *guest_info); 113 qemu_irq *pc_allocate_cpu_irq(void); 114 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 115 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 116 ISADevice **rtc_state, 117 ISADevice **floppy, 118 bool no_vmport); 119 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 120 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 121 const char *boot_device, 122 ISADevice *floppy, BusState *ide0, BusState *ide1, 123 ISADevice *s); 124 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 125 void pc_pci_device_init(PCIBus *pci_bus); 126 127 typedef void (*cpu_set_smm_t)(int smm, void *arg); 128 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 129 130 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 131 132 /* acpi_piix.c */ 133 134 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 135 qemu_irq sci_irq, qemu_irq smi_irq, 136 int kvm_enabled, FWCfgState *fw_cfg); 137 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 138 139 /* hpet.c */ 140 extern int no_hpet; 141 142 /* piix_pci.c */ 143 struct PCII440FXState; 144 typedef struct PCII440FXState PCII440FXState; 145 146 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 147 ISABus **isa_bus, qemu_irq *pic, 148 MemoryRegion *address_space_mem, 149 MemoryRegion *address_space_io, 150 ram_addr_t ram_size, 151 hwaddr pci_hole_start, 152 hwaddr pci_hole_size, 153 hwaddr pci_hole64_start, 154 hwaddr pci_hole64_size, 155 MemoryRegion *pci_memory, 156 MemoryRegion *ram_memory); 157 158 /* piix4.c */ 159 extern PCIDevice *piix4_dev; 160 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 161 162 /* vga.c */ 163 enum vga_retrace_method { 164 VGA_RETRACE_DUMB, 165 VGA_RETRACE_PRECISE 166 }; 167 168 extern enum vga_retrace_method vga_retrace_method; 169 170 int isa_vga_mm_init(hwaddr vram_base, 171 hwaddr ctrl_base, int it_shift, 172 MemoryRegion *address_space); 173 174 /* ne2000.c */ 175 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 176 { 177 DeviceState *dev; 178 ISADevice *isadev; 179 180 qemu_check_nic_model(nd, "ne2k_isa"); 181 182 isadev = isa_try_create(bus, "ne2k_isa"); 183 if (!isadev) { 184 return false; 185 } 186 dev = DEVICE(isadev); 187 qdev_prop_set_uint32(dev, "iobase", base); 188 qdev_prop_set_uint32(dev, "irq", irq); 189 qdev_set_nic_properties(dev, nd); 190 qdev_init_nofail(dev); 191 return true; 192 } 193 194 /* pc_sysfw.c */ 195 void pc_system_firmware_init(MemoryRegion *rom_memory); 196 197 /* pvpanic.c */ 198 void pvpanic_init(ISABus *bus); 199 200 /* e820 types */ 201 #define E820_RAM 1 202 #define E820_RESERVED 2 203 #define E820_ACPI 3 204 #define E820_NVS 4 205 #define E820_UNUSABLE 5 206 207 int e820_add_entry(uint64_t, uint64_t, uint32_t); 208 209 #define PC_COMPAT_1_5 \ 210 {\ 211 .driver = "Conroe-" TYPE_X86_CPU,\ 212 .property = "model",\ 213 .value = stringify(2),\ 214 },{\ 215 .driver = "Conroe-" TYPE_X86_CPU,\ 216 .property = "level",\ 217 .value = stringify(2),\ 218 },{\ 219 .driver = "Penryn-" TYPE_X86_CPU,\ 220 .property = "model",\ 221 .value = stringify(2),\ 222 },{\ 223 .driver = "Penryn-" TYPE_X86_CPU,\ 224 .property = "level",\ 225 .value = stringify(2),\ 226 },{\ 227 .driver = "Nehalem-" TYPE_X86_CPU,\ 228 .property = "model",\ 229 .value = stringify(2),\ 230 },{\ 231 .driver = "Nehalem-" TYPE_X86_CPU,\ 232 .property = "level",\ 233 .value = stringify(2),\ 234 } 235 236 #define PC_COMPAT_1_4 \ 237 PC_COMPAT_1_5, \ 238 {\ 239 .driver = "scsi-hd",\ 240 .property = "discard_granularity",\ 241 .value = stringify(0),\ 242 },{\ 243 .driver = "scsi-cd",\ 244 .property = "discard_granularity",\ 245 .value = stringify(0),\ 246 },{\ 247 .driver = "scsi-disk",\ 248 .property = "discard_granularity",\ 249 .value = stringify(0),\ 250 },{\ 251 .driver = "ide-hd",\ 252 .property = "discard_granularity",\ 253 .value = stringify(0),\ 254 },{\ 255 .driver = "ide-cd",\ 256 .property = "discard_granularity",\ 257 .value = stringify(0),\ 258 },{\ 259 .driver = "ide-drive",\ 260 .property = "discard_granularity",\ 261 .value = stringify(0),\ 262 },{\ 263 .driver = "virtio-blk-pci",\ 264 .property = "discard_granularity",\ 265 .value = stringify(0),\ 266 },{\ 267 .driver = "virtio-serial-pci",\ 268 .property = "vectors",\ 269 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 270 .value = stringify(0xFFFFFFFF),\ 271 },{ \ 272 .driver = "virtio-net-pci", \ 273 .property = "ctrl_guest_offloads", \ 274 .value = "off", \ 275 },{\ 276 .driver = "e1000",\ 277 .property = "romfile",\ 278 .value = "pxe-e1000.rom",\ 279 },{\ 280 .driver = "ne2k_pci",\ 281 .property = "romfile",\ 282 .value = "pxe-ne2k_pci.rom",\ 283 },{\ 284 .driver = "pcnet",\ 285 .property = "romfile",\ 286 .value = "pxe-pcnet.rom",\ 287 },{\ 288 .driver = "rtl8139",\ 289 .property = "romfile",\ 290 .value = "pxe-rtl8139.rom",\ 291 },{\ 292 .driver = "virtio-net-pci",\ 293 .property = "romfile",\ 294 .value = "pxe-virtio.rom",\ 295 },{\ 296 .driver = "486-" TYPE_X86_CPU,\ 297 .property = "model",\ 298 .value = stringify(0),\ 299 } 300 301 #endif 302