1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 MemoryHotplugState hotplug_memory; 36 Notifier machine_done; 37 38 /* Pointers to devices and objects: */ 39 HotplugHandler *acpi_dev; 40 ISADevice *rtc; 41 PCIBus *bus; 42 FWCfgState *fw_cfg; 43 qemu_irq *gsi; 44 45 /* Configuration options: */ 46 uint64_t max_ram_below_4g; 47 OnOffAuto vmport; 48 OnOffAuto smm; 49 50 AcpiNVDIMMState acpi_nvdimm_state; 51 52 bool acpi_build_enabled; 53 bool smbus; 54 bool sata; 55 bool pit; 56 57 /* RAM information (sizes, addresses, configuration): */ 58 ram_addr_t below_4g_mem_size, above_4g_mem_size; 59 60 /* CPU and apic information: */ 61 bool apic_xrupt_override; 62 unsigned apic_id_limit; 63 uint16_t boot_cpus; 64 65 /* NUMA information: */ 66 uint64_t numa_nodes; 67 uint64_t *node_mem; 68 69 /* Address space used by IOAPIC device. All IOAPIC interrupts 70 * will be translated to MSI messages in the address space. */ 71 AddressSpace *ioapic_as; 72 }; 73 74 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 75 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 76 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 77 #define PC_MACHINE_VMPORT "vmport" 78 #define PC_MACHINE_SMM "smm" 79 #define PC_MACHINE_NVDIMM "nvdimm" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 118 /* Compat options: */ 119 120 /* ACPI compat: */ 121 bool has_acpi_build; 122 bool rsdp_in_ram; 123 int legacy_acpi_table_size; 124 unsigned acpi_data_size; 125 126 /* SMBIOS compat: */ 127 bool smbios_defaults; 128 bool smbios_legacy_mode; 129 bool smbios_uuid_encoded; 130 131 /* RAM / address space compat: */ 132 bool gigabyte_align; 133 bool has_reserved_memory; 134 bool enforce_aligned_dimm; 135 bool broken_reserved_end; 136 137 /* TSC rate migration: */ 138 bool save_tsc_khz; 139 /* generate legacy CPU hotplug AML */ 140 bool legacy_cpu_hotplug; 141 142 /* use DMA capable linuxboot option rom */ 143 bool linuxboot_dma_enabled; 144 }; 145 146 #define TYPE_PC_MACHINE "generic-pc-machine" 147 #define PC_MACHINE(obj) \ 148 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 149 #define PC_MACHINE_GET_CLASS(obj) \ 150 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 151 #define PC_MACHINE_CLASS(klass) \ 152 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 153 154 /* PC-style peripherals (also used by other machines). */ 155 156 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 157 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 158 #define ACPI_PM_PROP_S4_VAL "s4_val" 159 #define ACPI_PM_PROP_SCI_INT "sci_int" 160 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 161 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 162 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 163 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 164 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 165 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 166 167 /* parallel.c */ 168 169 void parallel_hds_isa_init(ISABus *bus, int n); 170 171 bool parallel_mm_init(MemoryRegion *address_space, 172 hwaddr base, int it_shift, qemu_irq irq, 173 Chardev *chr); 174 175 /* i8259.c */ 176 177 extern DeviceState *isa_pic; 178 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 179 qemu_irq *kvm_i8259_init(ISABus *bus); 180 int pic_read_irq(DeviceState *d); 181 int pic_get_output(DeviceState *d); 182 183 /* ioapic.c */ 184 185 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 186 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 187 188 /* Global System Interrupts */ 189 190 #define GSI_NUM_PINS IOAPIC_NUM_PINS 191 192 typedef struct GSIState { 193 qemu_irq i8259_irq[ISA_NUM_IRQS]; 194 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 195 } GSIState; 196 197 void gsi_handler(void *opaque, int n, int level); 198 199 /* vmport.c */ 200 #define TYPE_VMPORT "vmport" 201 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 202 203 static inline void vmport_init(ISABus *bus) 204 { 205 isa_create_simple(bus, TYPE_VMPORT); 206 } 207 208 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 209 void vmmouse_get_data(uint32_t *data); 210 void vmmouse_set_data(const uint32_t *data); 211 212 /* pckbd.c */ 213 #define I8042_A20_LINE "a20" 214 215 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 216 MemoryRegion *region, ram_addr_t size, 217 hwaddr mask); 218 void i8042_isa_mouse_fake_event(void *opaque); 219 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 220 221 /* pc.c */ 222 extern int fd_bootchk; 223 224 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 225 void pc_register_ferr_irq(qemu_irq irq); 226 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 227 228 void pc_cpus_init(PCMachineState *pcms); 229 void pc_hot_add_cpu(const int64_t id, Error **errp); 230 void pc_acpi_init(const char *default_dsdt); 231 232 void pc_guest_info_init(PCMachineState *pcms); 233 234 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 235 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 236 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 237 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 238 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 239 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 240 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 241 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 242 243 244 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 245 MemoryRegion *pci_address_space); 246 247 void xen_load_linux(PCMachineState *pcms); 248 void pc_memory_init(PCMachineState *pcms, 249 MemoryRegion *system_memory, 250 MemoryRegion *rom_memory, 251 MemoryRegion **ram_memory); 252 qemu_irq pc_allocate_cpu_irq(void); 253 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 254 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 255 ISADevice **rtc_state, 256 bool create_fdctrl, 257 bool no_vmport, 258 bool has_pit, 259 uint32_t hpet_irqs); 260 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 261 void pc_cmos_init(PCMachineState *pcms, 262 BusState *ide0, BusState *ide1, 263 ISADevice *s); 264 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 265 void pc_pci_device_init(PCIBus *pci_bus); 266 267 typedef void (*cpu_set_smm_t)(int smm, void *arg); 268 269 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 270 271 ISADevice *pc_find_fdc0(void); 272 int cmos_get_fd_drive_type(FloppyDriveType fd0); 273 274 #define FW_CFG_IO_BASE 0x510 275 276 #define PORT92_A20_LINE "a20" 277 278 /* acpi_piix.c */ 279 280 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 281 qemu_irq sci_irq, qemu_irq smi_irq, 282 int smm_enabled, DeviceState **piix4_pm); 283 284 /* hpet.c */ 285 extern int no_hpet; 286 287 /* piix_pci.c */ 288 struct PCII440FXState; 289 typedef struct PCII440FXState PCII440FXState; 290 291 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 292 #define TYPE_I440FX_PCI_DEVICE "i440FX" 293 294 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 295 296 /* 297 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 298 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 299 */ 300 #define RCR_IOPORT 0xcf9 301 302 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 303 PCII440FXState **pi440fx_state, int *piix_devfn, 304 ISABus **isa_bus, qemu_irq *pic, 305 MemoryRegion *address_space_mem, 306 MemoryRegion *address_space_io, 307 ram_addr_t ram_size, 308 ram_addr_t below_4g_mem_size, 309 ram_addr_t above_4g_mem_size, 310 MemoryRegion *pci_memory, 311 MemoryRegion *ram_memory); 312 313 PCIBus *find_i440fx(void); 314 /* piix4.c */ 315 extern PCIDevice *piix4_dev; 316 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 317 318 /* vga.c */ 319 enum vga_retrace_method { 320 VGA_RETRACE_DUMB, 321 VGA_RETRACE_PRECISE 322 }; 323 324 extern enum vga_retrace_method vga_retrace_method; 325 326 int isa_vga_mm_init(hwaddr vram_base, 327 hwaddr ctrl_base, int it_shift, 328 MemoryRegion *address_space); 329 330 /* ne2000.c */ 331 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 332 { 333 DeviceState *dev; 334 ISADevice *isadev; 335 336 qemu_check_nic_model(nd, "ne2k_isa"); 337 338 isadev = isa_try_create(bus, "ne2k_isa"); 339 if (!isadev) { 340 return false; 341 } 342 dev = DEVICE(isadev); 343 qdev_prop_set_uint32(dev, "iobase", base); 344 qdev_prop_set_uint32(dev, "irq", irq); 345 qdev_set_nic_properties(dev, nd); 346 qdev_init_nofail(dev); 347 return true; 348 } 349 350 /* pc_sysfw.c */ 351 void pc_system_firmware_init(MemoryRegion *rom_memory, 352 bool isapc_ram_fw); 353 354 /* pvpanic.c */ 355 uint16_t pvpanic_port(void); 356 357 /* acpi-build.c */ 358 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 359 const CPUArchIdList *apic_ids, GArray *entry); 360 361 /* e820 types */ 362 #define E820_RAM 1 363 #define E820_RESERVED 2 364 #define E820_ACPI 3 365 #define E820_NVS 4 366 #define E820_UNUSABLE 5 367 368 int e820_add_entry(uint64_t, uint64_t, uint32_t); 369 int e820_get_num_entries(void); 370 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 371 372 #define PC_COMPAT_2_9 \ 373 HW_COMPAT_2_9 \ 374 {\ 375 .driver = "mch",\ 376 .property = "extended-tseg-mbytes",\ 377 .value = stringify(0),\ 378 },\ 379 380 #define PC_COMPAT_2_8 \ 381 HW_COMPAT_2_8 \ 382 {\ 383 .driver = TYPE_X86_CPU,\ 384 .property = "tcg-cpuid",\ 385 .value = "off",\ 386 },\ 387 {\ 388 .driver = "kvmclock",\ 389 .property = "x-mach-use-reliable-get-clock",\ 390 .value = "off",\ 391 },\ 392 {\ 393 .driver = "ICH9-LPC",\ 394 .property = "x-smi-broadcast",\ 395 .value = "off",\ 396 },\ 397 {\ 398 .driver = TYPE_X86_CPU,\ 399 .property = "vmware-cpuid-freq",\ 400 .value = "off",\ 401 },\ 402 {\ 403 .driver = "Haswell-" TYPE_X86_CPU,\ 404 .property = "stepping",\ 405 .value = "1",\ 406 }, 407 408 #define PC_COMPAT_2_7 \ 409 HW_COMPAT_2_7 \ 410 {\ 411 .driver = TYPE_X86_CPU,\ 412 .property = "l3-cache",\ 413 .value = "off",\ 414 },\ 415 {\ 416 .driver = TYPE_X86_CPU,\ 417 .property = "full-cpuid-auto-level",\ 418 .value = "off",\ 419 },\ 420 {\ 421 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 422 .property = "family",\ 423 .value = "15",\ 424 },\ 425 {\ 426 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 427 .property = "model",\ 428 .value = "6",\ 429 },\ 430 {\ 431 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 432 .property = "stepping",\ 433 .value = "1",\ 434 },\ 435 {\ 436 .driver = "isa-pcspk",\ 437 .property = "migrate",\ 438 .value = "off",\ 439 }, 440 441 #define PC_COMPAT_2_6 \ 442 HW_COMPAT_2_6 \ 443 {\ 444 .driver = TYPE_X86_CPU,\ 445 .property = "cpuid-0xb",\ 446 .value = "off",\ 447 },{\ 448 .driver = "vmxnet3",\ 449 .property = "romfile",\ 450 .value = "",\ 451 },\ 452 {\ 453 .driver = TYPE_X86_CPU,\ 454 .property = "fill-mtrr-mask",\ 455 .value = "off",\ 456 },\ 457 {\ 458 .driver = "apic-common",\ 459 .property = "legacy-instance-id",\ 460 .value = "on",\ 461 }, 462 463 #define PC_COMPAT_2_5 \ 464 HW_COMPAT_2_5 465 466 /* Helper for setting model-id for CPU models that changed model-id 467 * depending on QEMU versions up to QEMU 2.4. 468 */ 469 #define PC_CPU_MODEL_IDS(v) \ 470 {\ 471 .driver = "qemu32-" TYPE_X86_CPU,\ 472 .property = "model-id",\ 473 .value = "QEMU Virtual CPU version " v,\ 474 },\ 475 {\ 476 .driver = "qemu64-" TYPE_X86_CPU,\ 477 .property = "model-id",\ 478 .value = "QEMU Virtual CPU version " v,\ 479 },\ 480 {\ 481 .driver = "athlon-" TYPE_X86_CPU,\ 482 .property = "model-id",\ 483 .value = "QEMU Virtual CPU version " v,\ 484 }, 485 486 #define PC_COMPAT_2_4 \ 487 HW_COMPAT_2_4 \ 488 PC_CPU_MODEL_IDS("2.4.0") \ 489 {\ 490 .driver = "Haswell-" TYPE_X86_CPU,\ 491 .property = "abm",\ 492 .value = "off",\ 493 },\ 494 {\ 495 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 496 .property = "abm",\ 497 .value = "off",\ 498 },\ 499 {\ 500 .driver = "Broadwell-" TYPE_X86_CPU,\ 501 .property = "abm",\ 502 .value = "off",\ 503 },\ 504 {\ 505 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 506 .property = "abm",\ 507 .value = "off",\ 508 },\ 509 {\ 510 .driver = "host" "-" TYPE_X86_CPU,\ 511 .property = "host-cache-info",\ 512 .value = "on",\ 513 },\ 514 {\ 515 .driver = TYPE_X86_CPU,\ 516 .property = "check",\ 517 .value = "off",\ 518 },\ 519 {\ 520 .driver = "qemu64" "-" TYPE_X86_CPU,\ 521 .property = "sse4a",\ 522 .value = "on",\ 523 },\ 524 {\ 525 .driver = "qemu64" "-" TYPE_X86_CPU,\ 526 .property = "abm",\ 527 .value = "on",\ 528 },\ 529 {\ 530 .driver = "qemu64" "-" TYPE_X86_CPU,\ 531 .property = "popcnt",\ 532 .value = "on",\ 533 },\ 534 {\ 535 .driver = "qemu32" "-" TYPE_X86_CPU,\ 536 .property = "popcnt",\ 537 .value = "on",\ 538 },{\ 539 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 540 .property = "rdtscp",\ 541 .value = "on",\ 542 },{\ 543 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 544 .property = "rdtscp",\ 545 .value = "on",\ 546 },{\ 547 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 548 .property = "rdtscp",\ 549 .value = "on",\ 550 },{\ 551 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 552 .property = "rdtscp",\ 553 .value = "on",\ 554 }, 555 556 557 #define PC_COMPAT_2_3 \ 558 HW_COMPAT_2_3 \ 559 PC_CPU_MODEL_IDS("2.3.0") \ 560 {\ 561 .driver = TYPE_X86_CPU,\ 562 .property = "arat",\ 563 .value = "off",\ 564 },{\ 565 .driver = "qemu64" "-" TYPE_X86_CPU,\ 566 .property = "min-level",\ 567 .value = stringify(4),\ 568 },{\ 569 .driver = "kvm64" "-" TYPE_X86_CPU,\ 570 .property = "min-level",\ 571 .value = stringify(5),\ 572 },{\ 573 .driver = "pentium3" "-" TYPE_X86_CPU,\ 574 .property = "min-level",\ 575 .value = stringify(2),\ 576 },{\ 577 .driver = "n270" "-" TYPE_X86_CPU,\ 578 .property = "min-level",\ 579 .value = stringify(5),\ 580 },{\ 581 .driver = "Conroe" "-" TYPE_X86_CPU,\ 582 .property = "min-level",\ 583 .value = stringify(4),\ 584 },{\ 585 .driver = "Penryn" "-" TYPE_X86_CPU,\ 586 .property = "min-level",\ 587 .value = stringify(4),\ 588 },{\ 589 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 590 .property = "min-level",\ 591 .value = stringify(4),\ 592 },{\ 593 .driver = "n270" "-" TYPE_X86_CPU,\ 594 .property = "min-xlevel",\ 595 .value = stringify(0x8000000a),\ 596 },{\ 597 .driver = "Penryn" "-" TYPE_X86_CPU,\ 598 .property = "min-xlevel",\ 599 .value = stringify(0x8000000a),\ 600 },{\ 601 .driver = "Conroe" "-" TYPE_X86_CPU,\ 602 .property = "min-xlevel",\ 603 .value = stringify(0x8000000a),\ 604 },{\ 605 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 606 .property = "min-xlevel",\ 607 .value = stringify(0x8000000a),\ 608 },{\ 609 .driver = "Westmere" "-" TYPE_X86_CPU,\ 610 .property = "min-xlevel",\ 611 .value = stringify(0x8000000a),\ 612 },{\ 613 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 614 .property = "min-xlevel",\ 615 .value = stringify(0x8000000a),\ 616 },{\ 617 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 618 .property = "min-xlevel",\ 619 .value = stringify(0x8000000a),\ 620 },{\ 621 .driver = "Haswell" "-" TYPE_X86_CPU,\ 622 .property = "min-xlevel",\ 623 .value = stringify(0x8000000a),\ 624 },{\ 625 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 626 .property = "min-xlevel",\ 627 .value = stringify(0x8000000a),\ 628 },{\ 629 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 630 .property = "min-xlevel",\ 631 .value = stringify(0x8000000a),\ 632 },{\ 633 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 634 .property = "min-xlevel",\ 635 .value = stringify(0x8000000a),\ 636 },{\ 637 .driver = TYPE_X86_CPU,\ 638 .property = "kvm-no-smi-migration",\ 639 .value = "on",\ 640 }, 641 642 #define PC_COMPAT_2_2 \ 643 HW_COMPAT_2_2 \ 644 PC_CPU_MODEL_IDS("2.3.0") \ 645 {\ 646 .driver = "kvm64" "-" TYPE_X86_CPU,\ 647 .property = "vme",\ 648 .value = "off",\ 649 },\ 650 {\ 651 .driver = "kvm32" "-" TYPE_X86_CPU,\ 652 .property = "vme",\ 653 .value = "off",\ 654 },\ 655 {\ 656 .driver = "Conroe" "-" TYPE_X86_CPU,\ 657 .property = "vme",\ 658 .value = "off",\ 659 },\ 660 {\ 661 .driver = "Penryn" "-" TYPE_X86_CPU,\ 662 .property = "vme",\ 663 .value = "off",\ 664 },\ 665 {\ 666 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 667 .property = "vme",\ 668 .value = "off",\ 669 },\ 670 {\ 671 .driver = "Westmere" "-" TYPE_X86_CPU,\ 672 .property = "vme",\ 673 .value = "off",\ 674 },\ 675 {\ 676 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 677 .property = "vme",\ 678 .value = "off",\ 679 },\ 680 {\ 681 .driver = "Haswell" "-" TYPE_X86_CPU,\ 682 .property = "vme",\ 683 .value = "off",\ 684 },\ 685 {\ 686 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 687 .property = "vme",\ 688 .value = "off",\ 689 },\ 690 {\ 691 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 692 .property = "vme",\ 693 .value = "off",\ 694 },\ 695 {\ 696 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 697 .property = "vme",\ 698 .value = "off",\ 699 },\ 700 {\ 701 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 702 .property = "vme",\ 703 .value = "off",\ 704 },\ 705 {\ 706 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 707 .property = "vme",\ 708 .value = "off",\ 709 },\ 710 {\ 711 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 712 .property = "vme",\ 713 .value = "off",\ 714 },\ 715 {\ 716 .driver = "Haswell" "-" TYPE_X86_CPU,\ 717 .property = "f16c",\ 718 .value = "off",\ 719 },\ 720 {\ 721 .driver = "Haswell" "-" TYPE_X86_CPU,\ 722 .property = "rdrand",\ 723 .value = "off",\ 724 },\ 725 {\ 726 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 727 .property = "f16c",\ 728 .value = "off",\ 729 },\ 730 {\ 731 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 732 .property = "rdrand",\ 733 .value = "off",\ 734 }, 735 736 #define PC_COMPAT_2_1 \ 737 HW_COMPAT_2_1 \ 738 PC_CPU_MODEL_IDS("2.1.0") \ 739 {\ 740 .driver = "coreduo" "-" TYPE_X86_CPU,\ 741 .property = "vmx",\ 742 .value = "on",\ 743 },\ 744 {\ 745 .driver = "core2duo" "-" TYPE_X86_CPU,\ 746 .property = "vmx",\ 747 .value = "on",\ 748 }, 749 750 #define PC_COMPAT_2_0 \ 751 PC_CPU_MODEL_IDS("2.0.0") \ 752 {\ 753 .driver = "virtio-scsi-pci",\ 754 .property = "any_layout",\ 755 .value = "off",\ 756 },{\ 757 .driver = "PIIX4_PM",\ 758 .property = "memory-hotplug-support",\ 759 .value = "off",\ 760 },\ 761 {\ 762 .driver = "apic",\ 763 .property = "version",\ 764 .value = stringify(0x11),\ 765 },\ 766 {\ 767 .driver = "nec-usb-xhci",\ 768 .property = "superspeed-ports-first",\ 769 .value = "off",\ 770 },\ 771 {\ 772 .driver = "nec-usb-xhci",\ 773 .property = "force-pcie-endcap",\ 774 .value = "on",\ 775 },\ 776 {\ 777 .driver = "pci-serial",\ 778 .property = "prog_if",\ 779 .value = stringify(0),\ 780 },\ 781 {\ 782 .driver = "pci-serial-2x",\ 783 .property = "prog_if",\ 784 .value = stringify(0),\ 785 },\ 786 {\ 787 .driver = "pci-serial-4x",\ 788 .property = "prog_if",\ 789 .value = stringify(0),\ 790 },\ 791 {\ 792 .driver = "virtio-net-pci",\ 793 .property = "guest_announce",\ 794 .value = "off",\ 795 },\ 796 {\ 797 .driver = "ICH9-LPC",\ 798 .property = "memory-hotplug-support",\ 799 .value = "off",\ 800 },{\ 801 .driver = "xio3130-downstream",\ 802 .property = COMPAT_PROP_PCP,\ 803 .value = "off",\ 804 },{\ 805 .driver = "ioh3420",\ 806 .property = COMPAT_PROP_PCP,\ 807 .value = "off",\ 808 }, 809 810 #define PC_COMPAT_1_7 \ 811 PC_CPU_MODEL_IDS("1.7.0") \ 812 {\ 813 .driver = TYPE_USB_DEVICE,\ 814 .property = "msos-desc",\ 815 .value = "no",\ 816 },\ 817 {\ 818 .driver = "PIIX4_PM",\ 819 .property = "acpi-pci-hotplug-with-bridge-support",\ 820 .value = "off",\ 821 },\ 822 {\ 823 .driver = "hpet",\ 824 .property = HPET_INTCAP,\ 825 .value = stringify(4),\ 826 }, 827 828 #define PC_COMPAT_1_6 \ 829 PC_CPU_MODEL_IDS("1.6.0") \ 830 {\ 831 .driver = "e1000",\ 832 .property = "mitigation",\ 833 .value = "off",\ 834 },{\ 835 .driver = "qemu64-" TYPE_X86_CPU,\ 836 .property = "model",\ 837 .value = stringify(2),\ 838 },{\ 839 .driver = "qemu32-" TYPE_X86_CPU,\ 840 .property = "model",\ 841 .value = stringify(3),\ 842 },{\ 843 .driver = "i440FX-pcihost",\ 844 .property = "short_root_bus",\ 845 .value = stringify(1),\ 846 },{\ 847 .driver = "q35-pcihost",\ 848 .property = "short_root_bus",\ 849 .value = stringify(1),\ 850 }, 851 852 #define PC_COMPAT_1_5 \ 853 PC_CPU_MODEL_IDS("1.5.0") \ 854 {\ 855 .driver = "Conroe-" TYPE_X86_CPU,\ 856 .property = "model",\ 857 .value = stringify(2),\ 858 },{\ 859 .driver = "Conroe-" TYPE_X86_CPU,\ 860 .property = "min-level",\ 861 .value = stringify(2),\ 862 },{\ 863 .driver = "Penryn-" TYPE_X86_CPU,\ 864 .property = "model",\ 865 .value = stringify(2),\ 866 },{\ 867 .driver = "Penryn-" TYPE_X86_CPU,\ 868 .property = "min-level",\ 869 .value = stringify(2),\ 870 },{\ 871 .driver = "Nehalem-" TYPE_X86_CPU,\ 872 .property = "model",\ 873 .value = stringify(2),\ 874 },{\ 875 .driver = "Nehalem-" TYPE_X86_CPU,\ 876 .property = "min-level",\ 877 .value = stringify(2),\ 878 },{\ 879 .driver = "virtio-net-pci",\ 880 .property = "any_layout",\ 881 .value = "off",\ 882 },{\ 883 .driver = TYPE_X86_CPU,\ 884 .property = "pmu",\ 885 .value = "on",\ 886 },{\ 887 .driver = "i440FX-pcihost",\ 888 .property = "short_root_bus",\ 889 .value = stringify(0),\ 890 },{\ 891 .driver = "q35-pcihost",\ 892 .property = "short_root_bus",\ 893 .value = stringify(0),\ 894 }, 895 896 #define PC_COMPAT_1_4 \ 897 PC_CPU_MODEL_IDS("1.4.0") \ 898 {\ 899 .driver = "scsi-hd",\ 900 .property = "discard_granularity",\ 901 .value = stringify(0),\ 902 },{\ 903 .driver = "scsi-cd",\ 904 .property = "discard_granularity",\ 905 .value = stringify(0),\ 906 },{\ 907 .driver = "scsi-disk",\ 908 .property = "discard_granularity",\ 909 .value = stringify(0),\ 910 },{\ 911 .driver = "ide-hd",\ 912 .property = "discard_granularity",\ 913 .value = stringify(0),\ 914 },{\ 915 .driver = "ide-cd",\ 916 .property = "discard_granularity",\ 917 .value = stringify(0),\ 918 },{\ 919 .driver = "ide-drive",\ 920 .property = "discard_granularity",\ 921 .value = stringify(0),\ 922 },{\ 923 .driver = "virtio-blk-pci",\ 924 .property = "discard_granularity",\ 925 .value = stringify(0),\ 926 },{\ 927 .driver = "virtio-serial-pci",\ 928 .property = "vectors",\ 929 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 930 .value = stringify(0xFFFFFFFF),\ 931 },{ \ 932 .driver = "virtio-net-pci", \ 933 .property = "ctrl_guest_offloads", \ 934 .value = "off", \ 935 },{\ 936 .driver = "e1000",\ 937 .property = "romfile",\ 938 .value = "pxe-e1000.rom",\ 939 },{\ 940 .driver = "ne2k_pci",\ 941 .property = "romfile",\ 942 .value = "pxe-ne2k_pci.rom",\ 943 },{\ 944 .driver = "pcnet",\ 945 .property = "romfile",\ 946 .value = "pxe-pcnet.rom",\ 947 },{\ 948 .driver = "rtl8139",\ 949 .property = "romfile",\ 950 .value = "pxe-rtl8139.rom",\ 951 },{\ 952 .driver = "virtio-net-pci",\ 953 .property = "romfile",\ 954 .value = "pxe-virtio.rom",\ 955 },{\ 956 .driver = "486-" TYPE_X86_CPU,\ 957 .property = "model",\ 958 .value = stringify(0),\ 959 },\ 960 {\ 961 .driver = "n270" "-" TYPE_X86_CPU,\ 962 .property = "movbe",\ 963 .value = "off",\ 964 },\ 965 {\ 966 .driver = "Westmere" "-" TYPE_X86_CPU,\ 967 .property = "pclmulqdq",\ 968 .value = "off",\ 969 }, 970 971 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 972 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 973 { \ 974 MachineClass *mc = MACHINE_CLASS(oc); \ 975 optsfn(mc); \ 976 mc->init = initfn; \ 977 } \ 978 static const TypeInfo pc_machine_type_##suffix = { \ 979 .name = namestr TYPE_MACHINE_SUFFIX, \ 980 .parent = TYPE_PC_MACHINE, \ 981 .class_init = pc_machine_##suffix##_class_init, \ 982 }; \ 983 static void pc_machine_init_##suffix(void) \ 984 { \ 985 type_register(&pc_machine_type_##suffix); \ 986 } \ 987 type_init(pc_machine_init_##suffix) 988 989 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 990 #endif 991