1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/firmware/smbios.h" 16 #include "hw/cxl/cxl.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 23 * @boot_cpus: number of present VCPUs 24 */ 25 typedef struct PCMachineState { 26 /*< private >*/ 27 X86MachineState parent_obj; 28 29 /* <public> */ 30 31 /* State for other subsystems/APIs: */ 32 Notifier machine_done; 33 34 /* Pointers to devices and objects: */ 35 PCIBus *bus; 36 I2CBus *smbus; 37 PFlashCFI01 *flash[2]; 38 ISADevice *pcspk; 39 DeviceState *iommu; 40 41 /* Configuration options: */ 42 uint64_t max_ram_below_4g; 43 OnOffAuto vmport; 44 SmbiosEntryPointType smbios_entry_point_type; 45 const char *south_bridge; 46 47 bool acpi_build_enabled; 48 bool smbus_enabled; 49 bool sata_enabled; 50 bool hpet_enabled; 51 bool i8042_enabled; 52 bool default_bus_bypass_iommu; 53 uint64_t max_fw_size; 54 55 /* ACPI Memory hotplug IO base address */ 56 hwaddr memhp_io_base; 57 58 SGXEPCState sgx_epc; 59 CXLState cxl_devices_state; 60 } PCMachineState; 61 62 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 63 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 64 #define PC_MACHINE_VMPORT "vmport" 65 #define PC_MACHINE_SMBUS "smbus" 66 #define PC_MACHINE_SATA "sata" 67 #define PC_MACHINE_I8042 "i8042" 68 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 69 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 70 71 /** 72 * PCMachineClass: 73 * 74 * Compat fields: 75 * 76 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 77 * backend's alignment value if provided 78 * @acpi_data_size: Size of the chunk of memory at the top of RAM 79 * for the BIOS ACPI tables and other BIOS 80 * datastructures. 81 * @gigabyte_align: Make sure that guest addresses aligned at 82 * 1Gbyte boundaries get mapped to host 83 * addresses aligned at 1Gbyte boundaries. This 84 * way we can use 1GByte pages in the host. 85 * 86 */ 87 struct PCMachineClass { 88 /*< private >*/ 89 X86MachineClass parent_class; 90 91 /*< public >*/ 92 93 /* Device configuration: */ 94 bool pci_enabled; 95 bool kvmclock_enabled; 96 const char *default_south_bridge; 97 98 /* Compat options: */ 99 100 /* Default CPU model version. See x86_cpu_set_default_version(). */ 101 int default_cpu_version; 102 103 /* ACPI compat: */ 104 bool has_acpi_build; 105 bool rsdp_in_ram; 106 int legacy_acpi_table_size; 107 unsigned acpi_data_size; 108 int pci_root_uid; 109 110 /* SMBIOS compat: */ 111 bool smbios_defaults; 112 bool smbios_legacy_mode; 113 bool smbios_uuid_encoded; 114 SmbiosEntryPointType default_smbios_ep_type; 115 116 /* RAM / address space compat: */ 117 bool gigabyte_align; 118 bool has_reserved_memory; 119 bool enforce_aligned_dimm; 120 bool broken_reserved_end; 121 bool enforce_amd_1tb_hole; 122 123 /* generate legacy CPU hotplug AML */ 124 bool legacy_cpu_hotplug; 125 126 /* use PVH to load kernels that support this feature */ 127 bool pvh_enabled; 128 129 /* create kvmclock device even when KVM PV features are not exposed */ 130 bool kvmclock_create_always; 131 132 /* resizable acpi blob compat */ 133 bool resizable_acpi_blob; 134 135 /* 136 * whether the machine type implements broken 32-bit address space bound 137 * check for memory. 138 */ 139 bool broken_32bit_mem_addr_check; 140 }; 141 142 #define TYPE_PC_MACHINE "generic-pc-machine" 143 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 144 145 /* ioapic.c */ 146 147 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 148 149 /* pc.c */ 150 extern int fd_bootchk; 151 152 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 153 154 void pc_guest_info_init(PCMachineState *pcms); 155 156 #define PCI_HOST_PROP_RAM_MEM "ram-mem" 157 #define PCI_HOST_PROP_PCI_MEM "pci-mem" 158 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" 159 #define PCI_HOST_PROP_IO_MEM "io-mem" 160 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 161 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 162 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 163 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 164 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 165 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 166 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 167 168 169 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 170 MemoryRegion *pci_address_space); 171 172 void xen_load_linux(PCMachineState *pcms); 173 void pc_memory_init(PCMachineState *pcms, 174 MemoryRegion *system_memory, 175 MemoryRegion *rom_memory, 176 uint64_t pci_hole64_size); 177 uint64_t pc_pci_hole64_start(void); 178 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 179 void pc_basic_device_init(struct PCMachineState *pcms, 180 ISABus *isa_bus, qemu_irq *gsi, 181 ISADevice *rtc_state, 182 bool create_fdctrl, 183 uint32_t hpet_irqs); 184 void pc_cmos_init(PCMachineState *pcms, 185 BusState *ide0, BusState *ide1, 186 ISADevice *s); 187 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 188 189 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 190 191 /* port92.c */ 192 #define PORT92_A20_LINE "a20" 193 194 #define TYPE_PORT92 "port92" 195 196 /* pc_sysfw.c */ 197 void pc_system_flash_create(PCMachineState *pcms); 198 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 199 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 200 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 201 int *data_len); 202 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 203 204 /* hw/i386/acpi-common.c */ 205 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids, 206 GArray *entry, bool force_enabled); 207 208 /* sgx.c */ 209 void pc_machine_init_sgx_epc(PCMachineState *pcms); 210 211 extern GlobalProperty pc_compat_8_2[]; 212 extern const size_t pc_compat_8_2_len; 213 214 extern GlobalProperty pc_compat_8_1[]; 215 extern const size_t pc_compat_8_1_len; 216 217 extern GlobalProperty pc_compat_8_0[]; 218 extern const size_t pc_compat_8_0_len; 219 220 extern GlobalProperty pc_compat_7_2[]; 221 extern const size_t pc_compat_7_2_len; 222 223 extern GlobalProperty pc_compat_7_1[]; 224 extern const size_t pc_compat_7_1_len; 225 226 extern GlobalProperty pc_compat_7_0[]; 227 extern const size_t pc_compat_7_0_len; 228 229 extern GlobalProperty pc_compat_6_2[]; 230 extern const size_t pc_compat_6_2_len; 231 232 extern GlobalProperty pc_compat_6_1[]; 233 extern const size_t pc_compat_6_1_len; 234 235 extern GlobalProperty pc_compat_6_0[]; 236 extern const size_t pc_compat_6_0_len; 237 238 extern GlobalProperty pc_compat_5_2[]; 239 extern const size_t pc_compat_5_2_len; 240 241 extern GlobalProperty pc_compat_5_1[]; 242 extern const size_t pc_compat_5_1_len; 243 244 extern GlobalProperty pc_compat_5_0[]; 245 extern const size_t pc_compat_5_0_len; 246 247 extern GlobalProperty pc_compat_4_2[]; 248 extern const size_t pc_compat_4_2_len; 249 250 extern GlobalProperty pc_compat_4_1[]; 251 extern const size_t pc_compat_4_1_len; 252 253 extern GlobalProperty pc_compat_4_0[]; 254 extern const size_t pc_compat_4_0_len; 255 256 extern GlobalProperty pc_compat_3_1[]; 257 extern const size_t pc_compat_3_1_len; 258 259 extern GlobalProperty pc_compat_3_0[]; 260 extern const size_t pc_compat_3_0_len; 261 262 extern GlobalProperty pc_compat_2_12[]; 263 extern const size_t pc_compat_2_12_len; 264 265 extern GlobalProperty pc_compat_2_11[]; 266 extern const size_t pc_compat_2_11_len; 267 268 extern GlobalProperty pc_compat_2_10[]; 269 extern const size_t pc_compat_2_10_len; 270 271 extern GlobalProperty pc_compat_2_9[]; 272 extern const size_t pc_compat_2_9_len; 273 274 extern GlobalProperty pc_compat_2_8[]; 275 extern const size_t pc_compat_2_8_len; 276 277 extern GlobalProperty pc_compat_2_7[]; 278 extern const size_t pc_compat_2_7_len; 279 280 extern GlobalProperty pc_compat_2_6[]; 281 extern const size_t pc_compat_2_6_len; 282 283 extern GlobalProperty pc_compat_2_5[]; 284 extern const size_t pc_compat_2_5_len; 285 286 extern GlobalProperty pc_compat_2_4[]; 287 extern const size_t pc_compat_2_4_len; 288 289 extern GlobalProperty pc_compat_2_3[]; 290 extern const size_t pc_compat_2_3_len; 291 292 extern GlobalProperty pc_compat_2_2[]; 293 extern const size_t pc_compat_2_2_len; 294 295 extern GlobalProperty pc_compat_2_1[]; 296 extern const size_t pc_compat_2_1_len; 297 298 extern GlobalProperty pc_compat_2_0[]; 299 extern const size_t pc_compat_2_0_len; 300 301 extern GlobalProperty pc_compat_1_7[]; 302 extern const size_t pc_compat_1_7_len; 303 304 extern GlobalProperty pc_compat_1_6[]; 305 extern const size_t pc_compat_1_6_len; 306 307 extern GlobalProperty pc_compat_1_5[]; 308 extern const size_t pc_compat_1_5_len; 309 310 extern GlobalProperty pc_compat_1_4[]; 311 extern const size_t pc_compat_1_4_len; 312 313 int pc_machine_kvm_type(MachineState *machine, const char *vm_type); 314 315 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 316 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 317 { \ 318 MachineClass *mc = MACHINE_CLASS(oc); \ 319 optsfn(mc); \ 320 mc->init = initfn; \ 321 mc->kvm_type = pc_machine_kvm_type; \ 322 } \ 323 static const TypeInfo pc_machine_type_##suffix = { \ 324 .name = namestr TYPE_MACHINE_SUFFIX, \ 325 .parent = TYPE_PC_MACHINE, \ 326 .class_init = pc_machine_##suffix##_class_init, \ 327 }; \ 328 static void pc_machine_init_##suffix(void) \ 329 { \ 330 type_register(&pc_machine_type_##suffix); \ 331 } \ 332 type_init(pc_machine_init_##suffix) 333 334 #endif 335