xref: /openbmc/qemu/include/hw/i386/pc.h (revision 7d08f0da901db4e9a36e17164bc77941cbcd87b7)
1 #ifndef HW_PC_H
2 #define HW_PC_H
3 
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/isa/isa.h"
7 #include "hw/block/fdc.h"
8 #include "net/net.h"
9 #include "hw/i386/ioapic.h"
10 
11 #include "qemu/range.h"
12 #include "qemu/bitmap.h"
13 #include "sysemu/sysemu.h"
14 #include "hw/pci/pci.h"
15 
16 #define HPET_INTCAP "hpet-intcap"
17 
18 /* PC-style peripherals (also used by other machines).  */
19 
20 typedef struct PcPciInfo {
21     Range w32;
22     Range w64;
23 } PcPciInfo;
24 
25 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
26 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
27 #define ACPI_PM_PROP_S4_VAL "s4_val"
28 #define ACPI_PM_PROP_SCI_INT "sci_int"
29 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
30 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
31 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
32 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
33 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
34 
35 struct PcGuestInfo {
36     bool has_pci_info;
37     bool isapc_ram_fw;
38     hwaddr ram_size, ram_size_below_4g;
39     unsigned apic_id_limit;
40     bool apic_xrupt_override;
41     uint64_t numa_nodes;
42     uint64_t *node_mem;
43     uint64_t *node_cpu;
44     FWCfgState *fw_cfg;
45     bool has_acpi_build;
46 };
47 
48 /* parallel.c */
49 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
50 {
51     DeviceState *dev;
52     ISADevice *isadev;
53 
54     isadev = isa_try_create(bus, "isa-parallel");
55     if (!isadev) {
56         return false;
57     }
58     dev = DEVICE(isadev);
59     qdev_prop_set_uint32(dev, "index", index);
60     qdev_prop_set_chr(dev, "chardev", chr);
61     if (qdev_init(dev) < 0) {
62         return false;
63     }
64     return true;
65 }
66 
67 bool parallel_mm_init(MemoryRegion *address_space,
68                       hwaddr base, int it_shift, qemu_irq irq,
69                       CharDriverState *chr);
70 
71 /* i8259.c */
72 
73 extern DeviceState *isa_pic;
74 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
75 qemu_irq *kvm_i8259_init(ISABus *bus);
76 int pic_read_irq(DeviceState *d);
77 int pic_get_output(DeviceState *d);
78 void pic_info(Monitor *mon, const QDict *qdict);
79 void irq_info(Monitor *mon, const QDict *qdict);
80 
81 /* Global System Interrupts */
82 
83 #define GSI_NUM_PINS IOAPIC_NUM_PINS
84 
85 typedef struct GSIState {
86     qemu_irq i8259_irq[ISA_NUM_IRQS];
87     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
88 } GSIState;
89 
90 void gsi_handler(void *opaque, int n, int level);
91 
92 /* vmport.c */
93 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
94 
95 static inline void vmport_init(ISABus *bus)
96 {
97     isa_create_simple(bus, "vmport");
98 }
99 
100 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
101 void vmmouse_get_data(uint32_t *data);
102 void vmmouse_set_data(const uint32_t *data);
103 
104 /* pckbd.c */
105 
106 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
107 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
108                    MemoryRegion *region, ram_addr_t size,
109                    hwaddr mask);
110 void i8042_isa_mouse_fake_event(void *opaque);
111 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
112 
113 /* pc.c */
114 extern int fd_bootchk;
115 
116 void pc_register_ferr_irq(qemu_irq irq);
117 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
118 
119 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
120 void pc_hot_add_cpu(const int64_t id, Error **errp);
121 void pc_acpi_init(const char *default_dsdt);
122 
123 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
124                                 ram_addr_t above_4g_mem_size);
125 
126 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
127 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
128 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
129 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
130 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
131 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
132 
133 
134 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
135                             MemoryRegion *pci_address_space);
136 
137 FWCfgState *pc_memory_init(MemoryRegion *system_memory,
138                            const char *kernel_filename,
139                            const char *kernel_cmdline,
140                            const char *initrd_filename,
141                            ram_addr_t below_4g_mem_size,
142                            ram_addr_t above_4g_mem_size,
143                            MemoryRegion *rom_memory,
144                            MemoryRegion **ram_memory,
145                            PcGuestInfo *guest_info);
146 qemu_irq *pc_allocate_cpu_irq(void);
147 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
148 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
149                           ISADevice **rtc_state,
150                           ISADevice **floppy,
151                           bool no_vmport,
152                           uint32 hpet_irqs);
153 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
154 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
155                   const char *boot_device,
156                   ISADevice *floppy, BusState *ide0, BusState *ide1,
157                   ISADevice *s);
158 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
159 void pc_pci_device_init(PCIBus *pci_bus);
160 
161 typedef void (*cpu_set_smm_t)(int smm, void *arg);
162 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
163 
164 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
165 
166 /* acpi_piix.c */
167 
168 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
169                       qemu_irq sci_irq, qemu_irq smi_irq,
170                       int kvm_enabled, FWCfgState *fw_cfg);
171 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
172 
173 /* hpet.c */
174 extern int no_hpet;
175 
176 /* piix_pci.c */
177 struct PCII440FXState;
178 typedef struct PCII440FXState PCII440FXState;
179 
180 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
181                     ISABus **isa_bus, qemu_irq *pic,
182                     MemoryRegion *address_space_mem,
183                     MemoryRegion *address_space_io,
184                     ram_addr_t ram_size,
185                     ram_addr_t below_4g_mem_size,
186                     ram_addr_t above_4g_mem_size,
187                     MemoryRegion *pci_memory,
188                     MemoryRegion *ram_memory);
189 
190 PCIBus *find_i440fx(void);
191 /* piix4.c */
192 extern PCIDevice *piix4_dev;
193 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
194 
195 /* vga.c */
196 enum vga_retrace_method {
197     VGA_RETRACE_DUMB,
198     VGA_RETRACE_PRECISE
199 };
200 
201 extern enum vga_retrace_method vga_retrace_method;
202 
203 int isa_vga_mm_init(hwaddr vram_base,
204                     hwaddr ctrl_base, int it_shift,
205                     MemoryRegion *address_space);
206 
207 /* ne2000.c */
208 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
209 {
210     DeviceState *dev;
211     ISADevice *isadev;
212 
213     qemu_check_nic_model(nd, "ne2k_isa");
214 
215     isadev = isa_try_create(bus, "ne2k_isa");
216     if (!isadev) {
217         return false;
218     }
219     dev = DEVICE(isadev);
220     qdev_prop_set_uint32(dev, "iobase", base);
221     qdev_prop_set_uint32(dev, "irq",    irq);
222     qdev_set_nic_properties(dev, nd);
223     qdev_init_nofail(dev);
224     return true;
225 }
226 
227 /* pc_sysfw.c */
228 void pc_system_firmware_init(MemoryRegion *rom_memory,
229                              bool isapc_ram_fw);
230 
231 /* pvpanic.c */
232 uint16_t pvpanic_port(void);
233 
234 /* e820 types */
235 #define E820_RAM        1
236 #define E820_RESERVED   2
237 #define E820_ACPI       3
238 #define E820_NVS        4
239 #define E820_UNUSABLE   5
240 
241 int e820_add_entry(uint64_t, uint64_t, uint32_t);
242 int e820_get_num_entries(void);
243 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
244 
245 #define PC_Q35_COMPAT_1_7 \
246         PC_COMPAT_1_7, \
247         {\
248             .driver   = "hpet",\
249             .property = HPET_INTCAP,\
250             .value    = stringify(4),\
251         }
252 
253 #define PC_Q35_COMPAT_1_6 \
254         PC_COMPAT_1_6, \
255         PC_Q35_COMPAT_1_7
256 
257 #define PC_Q35_COMPAT_1_5 \
258         PC_COMPAT_1_5, \
259         PC_Q35_COMPAT_1_6
260 
261 #define PC_Q35_COMPAT_1_4 \
262         PC_COMPAT_1_4, \
263         PC_Q35_COMPAT_1_5
264 
265 #define PC_COMPAT_1_7 \
266         {\
267             .driver   = TYPE_USB_DEVICE,\
268             .property = "msos-desc",\
269             .value    = "no",\
270         },\
271         {\
272             .driver   = "PIIX4_PM",\
273             .property = "acpi-pci-hotplug-with-bridge-support",\
274             .value    = "off",\
275         }
276 
277 #define PC_COMPAT_1_6 \
278         PC_COMPAT_1_7, \
279         {\
280             .driver   = "e1000",\
281             .property = "mitigation",\
282             .value    = "off",\
283         },{\
284             .driver   = "qemu64-" TYPE_X86_CPU,\
285             .property = "model",\
286             .value    = stringify(2),\
287         },{\
288             .driver   = "qemu32-" TYPE_X86_CPU,\
289             .property = "model",\
290             .value    = stringify(3),\
291         },{\
292             .driver   = "i440FX-pcihost",\
293             .property = "short_root_bus",\
294             .value    = stringify(1),\
295         },{\
296             .driver   = "q35-pcihost",\
297             .property = "short_root_bus",\
298             .value    = stringify(1),\
299         }
300 
301 #define PC_COMPAT_1_5 \
302         PC_COMPAT_1_6, \
303         {\
304             .driver   = "Conroe-" TYPE_X86_CPU,\
305             .property = "model",\
306             .value    = stringify(2),\
307         },{\
308             .driver   = "Conroe-" TYPE_X86_CPU,\
309             .property = "level",\
310             .value    = stringify(2),\
311         },{\
312             .driver   = "Penryn-" TYPE_X86_CPU,\
313             .property = "model",\
314             .value    = stringify(2),\
315         },{\
316             .driver   = "Penryn-" TYPE_X86_CPU,\
317             .property = "level",\
318             .value    = stringify(2),\
319         },{\
320             .driver   = "Nehalem-" TYPE_X86_CPU,\
321             .property = "model",\
322             .value    = stringify(2),\
323         },{\
324             .driver   = "Nehalem-" TYPE_X86_CPU,\
325             .property = "level",\
326             .value    = stringify(2),\
327         },{\
328             .driver   = "virtio-net-pci",\
329             .property = "any_layout",\
330             .value    = "off",\
331         },{\
332             .driver = TYPE_X86_CPU,\
333             .property = "pmu",\
334             .value = "on",\
335         },{\
336             .driver   = "i440FX-pcihost",\
337             .property = "short_root_bus",\
338             .value    = stringify(0),\
339         },{\
340             .driver   = "q35-pcihost",\
341             .property = "short_root_bus",\
342             .value    = stringify(0),\
343         }
344 
345 #define PC_COMPAT_1_4 \
346         PC_COMPAT_1_5, \
347         {\
348             .driver   = "scsi-hd",\
349             .property = "discard_granularity",\
350             .value    = stringify(0),\
351 	},{\
352             .driver   = "scsi-cd",\
353             .property = "discard_granularity",\
354             .value    = stringify(0),\
355 	},{\
356             .driver   = "scsi-disk",\
357             .property = "discard_granularity",\
358             .value    = stringify(0),\
359 	},{\
360             .driver   = "ide-hd",\
361             .property = "discard_granularity",\
362             .value    = stringify(0),\
363 	},{\
364             .driver   = "ide-cd",\
365             .property = "discard_granularity",\
366             .value    = stringify(0),\
367 	},{\
368             .driver   = "ide-drive",\
369             .property = "discard_granularity",\
370             .value    = stringify(0),\
371         },{\
372             .driver   = "virtio-blk-pci",\
373             .property = "discard_granularity",\
374             .value    = stringify(0),\
375 	},{\
376             .driver   = "virtio-serial-pci",\
377             .property = "vectors",\
378             /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
379             .value    = stringify(0xFFFFFFFF),\
380         },{ \
381             .driver   = "virtio-net-pci", \
382             .property = "ctrl_guest_offloads", \
383             .value    = "off", \
384         },{\
385             .driver   = "e1000",\
386             .property = "romfile",\
387             .value    = "pxe-e1000.rom",\
388         },{\
389             .driver   = "ne2k_pci",\
390             .property = "romfile",\
391             .value    = "pxe-ne2k_pci.rom",\
392         },{\
393             .driver   = "pcnet",\
394             .property = "romfile",\
395             .value    = "pxe-pcnet.rom",\
396         },{\
397             .driver   = "rtl8139",\
398             .property = "romfile",\
399             .value    = "pxe-rtl8139.rom",\
400         },{\
401             .driver   = "virtio-net-pci",\
402             .property = "romfile",\
403             .value    = "pxe-virtio.rom",\
404         },{\
405             .driver   = "486-" TYPE_X86_CPU,\
406             .property = "model",\
407             .value    = stringify(0),\
408         }
409 
410 #define PC_COMMON_MACHINE_OPTIONS \
411     .default_boot_order = "cad"
412 
413 #define PC_DEFAULT_MACHINE_OPTIONS \
414     PC_COMMON_MACHINE_OPTIONS, \
415     .hot_add_cpu = pc_hot_add_cpu, \
416     .max_cpus = 255
417 
418 #endif
419