1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "qemu/typedefs.h" 6 #include "exec/memory.h" 7 #include "hw/boards.h" 8 #include "hw/isa/isa.h" 9 #include "hw/block/fdc.h" 10 #include "net/net.h" 11 #include "hw/i386/ioapic.h" 12 13 #include "qemu/range.h" 14 #include "qemu/bitmap.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/pci/pci.h" 17 #include "hw/boards.h" 18 #include "hw/compat.h" 19 #include "hw/mem/pc-dimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 27 * backend's alignment value if provided 28 */ 29 struct PCMachineState { 30 /*< private >*/ 31 MachineState parent_obj; 32 33 /* <public> */ 34 MemoryHotplugState hotplug_memory; 35 36 HotplugHandler *acpi_dev; 37 ISADevice *rtc; 38 39 uint64_t max_ram_below_4g; 40 OnOffAuto vmport; 41 OnOffAuto smm; 42 bool enforce_aligned_dimm; 43 ram_addr_t below_4g_mem_size, above_4g_mem_size; 44 }; 45 46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 49 #define PC_MACHINE_VMPORT "vmport" 50 #define PC_MACHINE_SMM "smm" 51 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm" 52 53 /** 54 * PCMachineClass: 55 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 56 */ 57 struct PCMachineClass { 58 /*< private >*/ 59 MachineClass parent_class; 60 61 /*< public >*/ 62 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 63 DeviceState *dev); 64 }; 65 66 #define TYPE_PC_MACHINE "generic-pc-machine" 67 #define PC_MACHINE(obj) \ 68 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 69 #define PC_MACHINE_GET_CLASS(obj) \ 70 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 71 #define PC_MACHINE_CLASS(klass) \ 72 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 73 74 /* PC-style peripherals (also used by other machines). */ 75 76 typedef struct PcPciInfo { 77 Range w32; 78 Range w64; 79 } PcPciInfo; 80 81 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 82 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 83 #define ACPI_PM_PROP_S4_VAL "s4_val" 84 #define ACPI_PM_PROP_SCI_INT "sci_int" 85 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 86 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 87 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 88 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 89 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 90 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 91 92 struct PcGuestInfo { 93 bool isapc_ram_fw; 94 hwaddr ram_size, ram_size_below_4g; 95 unsigned apic_id_limit; 96 bool apic_xrupt_override; 97 uint64_t numa_nodes; 98 uint64_t *node_mem; 99 uint64_t *node_cpu; 100 FWCfgState *fw_cfg; 101 int legacy_acpi_table_size; 102 bool has_acpi_build; 103 bool has_reserved_memory; 104 bool rsdp_in_ram; 105 }; 106 107 /* parallel.c */ 108 109 void parallel_hds_isa_init(ISABus *bus, int n); 110 111 bool parallel_mm_init(MemoryRegion *address_space, 112 hwaddr base, int it_shift, qemu_irq irq, 113 CharDriverState *chr); 114 115 /* i8259.c */ 116 117 extern DeviceState *isa_pic; 118 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 119 qemu_irq *kvm_i8259_init(ISABus *bus); 120 int pic_read_irq(DeviceState *d); 121 int pic_get_output(DeviceState *d); 122 void hmp_info_pic(Monitor *mon, const QDict *qdict); 123 void hmp_info_irq(Monitor *mon, const QDict *qdict); 124 125 /* Global System Interrupts */ 126 127 #define GSI_NUM_PINS IOAPIC_NUM_PINS 128 129 typedef struct GSIState { 130 qemu_irq i8259_irq[ISA_NUM_IRQS]; 131 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 132 } GSIState; 133 134 void gsi_handler(void *opaque, int n, int level); 135 136 /* vmport.c */ 137 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 138 139 static inline void vmport_init(ISABus *bus) 140 { 141 isa_create_simple(bus, "vmport"); 142 } 143 144 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 145 void vmmouse_get_data(uint32_t *data); 146 void vmmouse_set_data(const uint32_t *data); 147 148 /* pckbd.c */ 149 150 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 151 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 152 MemoryRegion *region, ram_addr_t size, 153 hwaddr mask); 154 void i8042_isa_mouse_fake_event(void *opaque); 155 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 156 157 /* pc.c */ 158 extern int fd_bootchk; 159 160 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 161 void pc_register_ferr_irq(qemu_irq irq); 162 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 163 164 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 165 void pc_hot_add_cpu(const int64_t id, Error **errp); 166 void pc_acpi_init(const char *default_dsdt); 167 168 PcGuestInfo *pc_guest_info_init(PCMachineState *pcms); 169 170 void pc_set_legacy_acpi_data_size(void); 171 172 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 173 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 174 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 175 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 176 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 177 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 178 179 180 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 181 MemoryRegion *pci_address_space); 182 183 FWCfgState *xen_load_linux(PCMachineState *pcms, 184 PcGuestInfo *guest_info); 185 FWCfgState *pc_memory_init(PCMachineState *pcms, 186 MemoryRegion *system_memory, 187 MemoryRegion *rom_memory, 188 MemoryRegion **ram_memory, 189 PcGuestInfo *guest_info); 190 qemu_irq pc_allocate_cpu_irq(void); 191 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 192 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 193 ISADevice **rtc_state, 194 bool create_fdctrl, 195 bool no_vmport, 196 uint32 hpet_irqs); 197 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 198 void pc_cmos_init(PCMachineState *pcms, 199 BusState *ide0, BusState *ide1, 200 ISADevice *s); 201 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 202 void pc_pci_device_init(PCIBus *pci_bus); 203 204 typedef void (*cpu_set_smm_t)(int smm, void *arg); 205 206 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 207 208 /* acpi_piix.c */ 209 210 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 211 qemu_irq sci_irq, qemu_irq smi_irq, 212 int smm_enabled, DeviceState **piix4_pm); 213 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 214 215 /* hpet.c */ 216 extern int no_hpet; 217 218 /* piix_pci.c */ 219 struct PCII440FXState; 220 typedef struct PCII440FXState PCII440FXState; 221 222 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 223 #define TYPE_I440FX_PCI_DEVICE "i440FX" 224 225 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 226 227 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 228 PCII440FXState **pi440fx_state, int *piix_devfn, 229 ISABus **isa_bus, qemu_irq *pic, 230 MemoryRegion *address_space_mem, 231 MemoryRegion *address_space_io, 232 ram_addr_t ram_size, 233 ram_addr_t below_4g_mem_size, 234 ram_addr_t above_4g_mem_size, 235 MemoryRegion *pci_memory, 236 MemoryRegion *ram_memory); 237 238 PCIBus *find_i440fx(void); 239 /* piix4.c */ 240 extern PCIDevice *piix4_dev; 241 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 242 243 /* vga.c */ 244 enum vga_retrace_method { 245 VGA_RETRACE_DUMB, 246 VGA_RETRACE_PRECISE 247 }; 248 249 extern enum vga_retrace_method vga_retrace_method; 250 251 int isa_vga_mm_init(hwaddr vram_base, 252 hwaddr ctrl_base, int it_shift, 253 MemoryRegion *address_space); 254 255 /* ne2000.c */ 256 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 257 { 258 DeviceState *dev; 259 ISADevice *isadev; 260 261 qemu_check_nic_model(nd, "ne2k_isa"); 262 263 isadev = isa_try_create(bus, "ne2k_isa"); 264 if (!isadev) { 265 return false; 266 } 267 dev = DEVICE(isadev); 268 qdev_prop_set_uint32(dev, "iobase", base); 269 qdev_prop_set_uint32(dev, "irq", irq); 270 qdev_set_nic_properties(dev, nd); 271 qdev_init_nofail(dev); 272 return true; 273 } 274 275 /* pc_sysfw.c */ 276 void pc_system_firmware_init(MemoryRegion *rom_memory, 277 bool isapc_ram_fw); 278 279 /* pvpanic.c */ 280 uint16_t pvpanic_port(void); 281 282 /* e820 types */ 283 #define E820_RAM 1 284 #define E820_RESERVED 2 285 #define E820_ACPI 3 286 #define E820_NVS 4 287 #define E820_UNUSABLE 5 288 289 int e820_add_entry(uint64_t, uint64_t, uint32_t); 290 int e820_get_num_entries(void); 291 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 292 293 #define PC_COMPAT_2_3 \ 294 HW_COMPAT_2_3 \ 295 {\ 296 .driver = TYPE_X86_CPU,\ 297 .property = "arat",\ 298 .value = "off",\ 299 },{\ 300 .driver = "qemu64" "-" TYPE_X86_CPU,\ 301 .property = "level",\ 302 .value = stringify(4),\ 303 },{\ 304 .driver = "kvm64" "-" TYPE_X86_CPU,\ 305 .property = "level",\ 306 .value = stringify(5),\ 307 },{\ 308 .driver = "pentium3" "-" TYPE_X86_CPU,\ 309 .property = "level",\ 310 .value = stringify(2),\ 311 },{\ 312 .driver = "n270" "-" TYPE_X86_CPU,\ 313 .property = "level",\ 314 .value = stringify(5),\ 315 },{\ 316 .driver = "Conroe" "-" TYPE_X86_CPU,\ 317 .property = "level",\ 318 .value = stringify(4),\ 319 },{\ 320 .driver = "Penryn" "-" TYPE_X86_CPU,\ 321 .property = "level",\ 322 .value = stringify(4),\ 323 },{\ 324 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 325 .property = "level",\ 326 .value = stringify(4),\ 327 },{\ 328 .driver = "n270" "-" TYPE_X86_CPU,\ 329 .property = "xlevel",\ 330 .value = stringify(0x8000000a),\ 331 },{\ 332 .driver = "Penryn" "-" TYPE_X86_CPU,\ 333 .property = "xlevel",\ 334 .value = stringify(0x8000000a),\ 335 },{\ 336 .driver = "Conroe" "-" TYPE_X86_CPU,\ 337 .property = "xlevel",\ 338 .value = stringify(0x8000000a),\ 339 },{\ 340 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 341 .property = "xlevel",\ 342 .value = stringify(0x8000000a),\ 343 },{\ 344 .driver = "Westmere" "-" TYPE_X86_CPU,\ 345 .property = "xlevel",\ 346 .value = stringify(0x8000000a),\ 347 },{\ 348 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 349 .property = "xlevel",\ 350 .value = stringify(0x8000000a),\ 351 },{\ 352 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 353 .property = "xlevel",\ 354 .value = stringify(0x8000000a),\ 355 },{\ 356 .driver = "Haswell" "-" TYPE_X86_CPU,\ 357 .property = "xlevel",\ 358 .value = stringify(0x8000000a),\ 359 },{\ 360 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 361 .property = "xlevel",\ 362 .value = stringify(0x8000000a),\ 363 },{\ 364 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 365 .property = "xlevel",\ 366 .value = stringify(0x8000000a),\ 367 },{\ 368 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 369 .property = "xlevel",\ 370 .value = stringify(0x8000000a),\ 371 }, 372 373 #define PC_COMPAT_2_2 \ 374 PC_COMPAT_2_3 \ 375 HW_COMPAT_2_2 \ 376 {\ 377 .driver = "kvm64" "-" TYPE_X86_CPU,\ 378 .property = "vme",\ 379 .value = "off",\ 380 },\ 381 {\ 382 .driver = "kvm32" "-" TYPE_X86_CPU,\ 383 .property = "vme",\ 384 .value = "off",\ 385 },\ 386 {\ 387 .driver = "Conroe" "-" TYPE_X86_CPU,\ 388 .property = "vme",\ 389 .value = "off",\ 390 },\ 391 {\ 392 .driver = "Penryn" "-" TYPE_X86_CPU,\ 393 .property = "vme",\ 394 .value = "off",\ 395 },\ 396 {\ 397 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 398 .property = "vme",\ 399 .value = "off",\ 400 },\ 401 {\ 402 .driver = "Westmere" "-" TYPE_X86_CPU,\ 403 .property = "vme",\ 404 .value = "off",\ 405 },\ 406 {\ 407 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 408 .property = "vme",\ 409 .value = "off",\ 410 },\ 411 {\ 412 .driver = "Haswell" "-" TYPE_X86_CPU,\ 413 .property = "vme",\ 414 .value = "off",\ 415 },\ 416 {\ 417 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 418 .property = "vme",\ 419 .value = "off",\ 420 },\ 421 {\ 422 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 423 .property = "vme",\ 424 .value = "off",\ 425 },\ 426 {\ 427 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 428 .property = "vme",\ 429 .value = "off",\ 430 },\ 431 {\ 432 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 433 .property = "vme",\ 434 .value = "off",\ 435 },\ 436 {\ 437 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 438 .property = "vme",\ 439 .value = "off",\ 440 },\ 441 {\ 442 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 443 .property = "vme",\ 444 .value = "off",\ 445 },\ 446 {\ 447 .driver = "Haswell" "-" TYPE_X86_CPU,\ 448 .property = "f16c",\ 449 .value = "off",\ 450 },\ 451 {\ 452 .driver = "Haswell" "-" TYPE_X86_CPU,\ 453 .property = "rdrand",\ 454 .value = "off",\ 455 },\ 456 {\ 457 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 458 .property = "f16c",\ 459 .value = "off",\ 460 },\ 461 {\ 462 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 463 .property = "rdrand",\ 464 .value = "off",\ 465 }, 466 467 #define PC_COMPAT_2_1 \ 468 PC_COMPAT_2_2 \ 469 HW_COMPAT_2_1 \ 470 {\ 471 .driver = "coreduo" "-" TYPE_X86_CPU,\ 472 .property = "vmx",\ 473 .value = "on",\ 474 },\ 475 {\ 476 .driver = "core2duo" "-" TYPE_X86_CPU,\ 477 .property = "vmx",\ 478 .value = "on",\ 479 }, 480 481 #define PC_COMPAT_2_0 \ 482 PC_COMPAT_2_1 \ 483 {\ 484 .driver = "virtio-scsi-pci",\ 485 .property = "any_layout",\ 486 .value = "off",\ 487 },{\ 488 .driver = "PIIX4_PM",\ 489 .property = "memory-hotplug-support",\ 490 .value = "off",\ 491 },\ 492 {\ 493 .driver = "apic",\ 494 .property = "version",\ 495 .value = stringify(0x11),\ 496 },\ 497 {\ 498 .driver = "nec-usb-xhci",\ 499 .property = "superspeed-ports-first",\ 500 .value = "off",\ 501 },\ 502 {\ 503 .driver = "nec-usb-xhci",\ 504 .property = "force-pcie-endcap",\ 505 .value = "on",\ 506 },\ 507 {\ 508 .driver = "pci-serial",\ 509 .property = "prog_if",\ 510 .value = stringify(0),\ 511 },\ 512 {\ 513 .driver = "pci-serial-2x",\ 514 .property = "prog_if",\ 515 .value = stringify(0),\ 516 },\ 517 {\ 518 .driver = "pci-serial-4x",\ 519 .property = "prog_if",\ 520 .value = stringify(0),\ 521 },\ 522 {\ 523 .driver = "virtio-net-pci",\ 524 .property = "guest_announce",\ 525 .value = "off",\ 526 },\ 527 {\ 528 .driver = "ICH9-LPC",\ 529 .property = "memory-hotplug-support",\ 530 .value = "off",\ 531 },{\ 532 .driver = "xio3130-downstream",\ 533 .property = COMPAT_PROP_PCP,\ 534 .value = "off",\ 535 },{\ 536 .driver = "ioh3420",\ 537 .property = COMPAT_PROP_PCP,\ 538 .value = "off",\ 539 }, 540 541 #define PC_COMPAT_1_7 \ 542 PC_COMPAT_2_0 \ 543 {\ 544 .driver = TYPE_USB_DEVICE,\ 545 .property = "msos-desc",\ 546 .value = "no",\ 547 },\ 548 {\ 549 .driver = "PIIX4_PM",\ 550 .property = "acpi-pci-hotplug-with-bridge-support",\ 551 .value = "off",\ 552 },\ 553 {\ 554 .driver = "hpet",\ 555 .property = HPET_INTCAP,\ 556 .value = stringify(4),\ 557 }, 558 559 #define PC_COMPAT_1_6 \ 560 PC_COMPAT_1_7 \ 561 {\ 562 .driver = "e1000",\ 563 .property = "mitigation",\ 564 .value = "off",\ 565 },{\ 566 .driver = "qemu64-" TYPE_X86_CPU,\ 567 .property = "model",\ 568 .value = stringify(2),\ 569 },{\ 570 .driver = "qemu32-" TYPE_X86_CPU,\ 571 .property = "model",\ 572 .value = stringify(3),\ 573 },{\ 574 .driver = "i440FX-pcihost",\ 575 .property = "short_root_bus",\ 576 .value = stringify(1),\ 577 },{\ 578 .driver = "q35-pcihost",\ 579 .property = "short_root_bus",\ 580 .value = stringify(1),\ 581 }, 582 583 #define PC_COMPAT_1_5 \ 584 PC_COMPAT_1_6 \ 585 {\ 586 .driver = "Conroe-" TYPE_X86_CPU,\ 587 .property = "model",\ 588 .value = stringify(2),\ 589 },{\ 590 .driver = "Conroe-" TYPE_X86_CPU,\ 591 .property = "level",\ 592 .value = stringify(2),\ 593 },{\ 594 .driver = "Penryn-" TYPE_X86_CPU,\ 595 .property = "model",\ 596 .value = stringify(2),\ 597 },{\ 598 .driver = "Penryn-" TYPE_X86_CPU,\ 599 .property = "level",\ 600 .value = stringify(2),\ 601 },{\ 602 .driver = "Nehalem-" TYPE_X86_CPU,\ 603 .property = "model",\ 604 .value = stringify(2),\ 605 },{\ 606 .driver = "Nehalem-" TYPE_X86_CPU,\ 607 .property = "level",\ 608 .value = stringify(2),\ 609 },{\ 610 .driver = "virtio-net-pci",\ 611 .property = "any_layout",\ 612 .value = "off",\ 613 },{\ 614 .driver = TYPE_X86_CPU,\ 615 .property = "pmu",\ 616 .value = "on",\ 617 },{\ 618 .driver = "i440FX-pcihost",\ 619 .property = "short_root_bus",\ 620 .value = stringify(0),\ 621 },{\ 622 .driver = "q35-pcihost",\ 623 .property = "short_root_bus",\ 624 .value = stringify(0),\ 625 }, 626 627 #define PC_COMPAT_1_4 \ 628 PC_COMPAT_1_5 \ 629 {\ 630 .driver = "scsi-hd",\ 631 .property = "discard_granularity",\ 632 .value = stringify(0),\ 633 },{\ 634 .driver = "scsi-cd",\ 635 .property = "discard_granularity",\ 636 .value = stringify(0),\ 637 },{\ 638 .driver = "scsi-disk",\ 639 .property = "discard_granularity",\ 640 .value = stringify(0),\ 641 },{\ 642 .driver = "ide-hd",\ 643 .property = "discard_granularity",\ 644 .value = stringify(0),\ 645 },{\ 646 .driver = "ide-cd",\ 647 .property = "discard_granularity",\ 648 .value = stringify(0),\ 649 },{\ 650 .driver = "ide-drive",\ 651 .property = "discard_granularity",\ 652 .value = stringify(0),\ 653 },{\ 654 .driver = "virtio-blk-pci",\ 655 .property = "discard_granularity",\ 656 .value = stringify(0),\ 657 },{\ 658 .driver = "virtio-serial-pci",\ 659 .property = "vectors",\ 660 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 661 .value = stringify(0xFFFFFFFF),\ 662 },{ \ 663 .driver = "virtio-net-pci", \ 664 .property = "ctrl_guest_offloads", \ 665 .value = "off", \ 666 },{\ 667 .driver = "e1000",\ 668 .property = "romfile",\ 669 .value = "pxe-e1000.rom",\ 670 },{\ 671 .driver = "ne2k_pci",\ 672 .property = "romfile",\ 673 .value = "pxe-ne2k_pci.rom",\ 674 },{\ 675 .driver = "pcnet",\ 676 .property = "romfile",\ 677 .value = "pxe-pcnet.rom",\ 678 },{\ 679 .driver = "rtl8139",\ 680 .property = "romfile",\ 681 .value = "pxe-rtl8139.rom",\ 682 },{\ 683 .driver = "virtio-net-pci",\ 684 .property = "romfile",\ 685 .value = "pxe-virtio.rom",\ 686 },{\ 687 .driver = "486-" TYPE_X86_CPU,\ 688 .property = "model",\ 689 .value = stringify(0),\ 690 },\ 691 {\ 692 .driver = "n270" "-" TYPE_X86_CPU,\ 693 .property = "movbe",\ 694 .value = "off",\ 695 },\ 696 {\ 697 .driver = "Westmere" "-" TYPE_X86_CPU,\ 698 .property = "pclmulqdq",\ 699 .value = "off",\ 700 }, 701 702 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 703 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 704 { \ 705 MachineClass *mc = MACHINE_CLASS(oc); \ 706 optsfn(mc); \ 707 mc->name = namestr; \ 708 mc->init = initfn; \ 709 } \ 710 static const TypeInfo pc_machine_type_##suffix = { \ 711 .name = namestr TYPE_MACHINE_SUFFIX, \ 712 .parent = TYPE_PC_MACHINE, \ 713 .class_init = pc_machine_##suffix##_class_init, \ 714 }; \ 715 static void pc_machine_init_##suffix(void) \ 716 { \ 717 type_register(&pc_machine_type_##suffix); \ 718 } \ 719 machine_init(pc_machine_init_##suffix) 720 721 #define SET_MACHINE_COMPAT(m, COMPAT) do { \ 722 static GlobalProperty props[] = { \ 723 COMPAT \ 724 { /* end of list */ } \ 725 }; \ 726 (m)->compat_props = props; \ 727 } while (0) 728 729 #endif 730