1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/cxl/cxl.h" 16 17 #define MAX_IDE_BUS 2 18 19 /** 20 * PCMachineState: 21 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 22 * @boot_cpus: number of present VCPUs 23 */ 24 typedef struct PCMachineState { 25 /*< private >*/ 26 X86MachineState parent_obj; 27 28 /* <public> */ 29 30 /* State for other subsystems/APIs: */ 31 Notifier machine_done; 32 33 /* Pointers to devices and objects: */ 34 PCIBus *pcibus; 35 I2CBus *smbus; 36 PFlashCFI01 *flash[2]; 37 ISADevice *pcspk; 38 DeviceState *iommu; 39 BusState *idebus[MAX_IDE_BUS]; 40 41 /* Configuration options: */ 42 uint64_t max_ram_below_4g; 43 OnOffAuto vmport; 44 SmbiosEntryPointType smbios_entry_point_type; 45 const char *south_bridge; 46 47 bool acpi_build_enabled; 48 bool smbus_enabled; 49 bool sata_enabled; 50 bool hpet_enabled; 51 bool i8042_enabled; 52 bool default_bus_bypass_iommu; 53 bool fd_bootchk; 54 uint64_t max_fw_size; 55 56 /* ACPI Memory hotplug IO base address */ 57 hwaddr memhp_io_base; 58 59 SGXEPCState sgx_epc; 60 CXLState cxl_devices_state; 61 } PCMachineState; 62 63 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 64 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 65 #define PC_MACHINE_VMPORT "vmport" 66 #define PC_MACHINE_SMBUS "smbus" 67 #define PC_MACHINE_SATA "sata" 68 #define PC_MACHINE_I8042 "i8042" 69 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 70 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 71 72 /** 73 * PCMachineClass: 74 * 75 * Compat fields: 76 * 77 * @gigabyte_align: Make sure that guest addresses aligned at 78 * 1Gbyte boundaries get mapped to host 79 * addresses aligned at 1Gbyte boundaries. This 80 * way we can use 1GByte pages in the host. 81 * 82 */ 83 struct PCMachineClass { 84 /*< private >*/ 85 X86MachineClass parent_class; 86 87 /*< public >*/ 88 89 /* Device configuration: */ 90 bool pci_enabled; 91 const char *default_south_bridge; 92 93 /* Compat options: */ 94 95 /* Default CPU model version. See x86_cpu_set_default_version(). */ 96 int default_cpu_version; 97 98 /* ACPI compat: */ 99 bool has_acpi_build; 100 int pci_root_uid; 101 102 /* SMBIOS compat: */ 103 bool smbios_defaults; 104 bool smbios_legacy_mode; 105 SmbiosEntryPointType default_smbios_ep_type; 106 107 /* RAM / address space compat: */ 108 bool gigabyte_align; 109 bool has_reserved_memory; 110 bool broken_reserved_end; 111 bool enforce_amd_1tb_hole; 112 bool isa_bios_alias; 113 114 /* generate legacy CPU hotplug AML */ 115 bool legacy_cpu_hotplug; 116 117 /* use PVH to load kernels that support this feature */ 118 bool pvh_enabled; 119 120 /* create kvmclock device even when KVM PV features are not exposed */ 121 bool kvmclock_create_always; 122 123 /* 124 * whether the machine type implements broken 32-bit address space bound 125 * check for memory. 126 */ 127 bool broken_32bit_mem_addr_check; 128 }; 129 130 #define TYPE_PC_MACHINE "generic-pc-machine" 131 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 132 133 /* ioapic.c */ 134 135 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 136 137 /* pc.c */ 138 139 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 140 141 #define PCI_HOST_PROP_RAM_MEM "ram-mem" 142 #define PCI_HOST_PROP_PCI_MEM "pci-mem" 143 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" 144 #define PCI_HOST_PROP_IO_MEM "io-mem" 145 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 146 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 147 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 148 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 149 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 150 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 151 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 152 #define PCI_HOST_PROP_SMM_RANGES "smm-ranges" 153 154 typedef enum { 155 SEV_DESC_TYPE_UNDEF, 156 /* The section contains the region that must be validated by the VMM. */ 157 SEV_DESC_TYPE_SNP_SEC_MEM, 158 /* The section contains the SNP secrets page */ 159 SEV_DESC_TYPE_SNP_SECRETS, 160 /* The section contains address that can be used as a CPUID page */ 161 SEV_DESC_TYPE_CPUID, 162 /* The section contains the region for kernel hashes for measured direct boot */ 163 SEV_DESC_TYPE_SNP_KERNEL_HASHES = 0x10, 164 165 } ovmf_sev_metadata_desc_type; 166 167 typedef struct __attribute__((__packed__)) OvmfSevMetadataDesc { 168 uint32_t base; 169 uint32_t len; 170 ovmf_sev_metadata_desc_type type; 171 } OvmfSevMetadataDesc; 172 173 typedef struct __attribute__((__packed__)) OvmfSevMetadata { 174 uint8_t signature[4]; 175 uint32_t len; 176 uint32_t version; 177 uint32_t num_desc; 178 OvmfSevMetadataDesc descs[]; 179 } OvmfSevMetadata; 180 181 OvmfSevMetadata *pc_system_get_ovmf_sev_metadata_ptr(void); 182 183 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 184 MemoryRegion *pci_address_space); 185 186 void xen_load_linux(PCMachineState *pcms); 187 void pc_memory_init(PCMachineState *pcms, 188 MemoryRegion *system_memory, 189 MemoryRegion *rom_memory, 190 uint64_t pci_hole64_size); 191 uint64_t pc_pci_hole64_start(void); 192 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 193 void pc_basic_device_init(struct PCMachineState *pcms, 194 ISABus *isa_bus, qemu_irq *gsi, 195 ISADevice *rtc_state, 196 bool create_fdctrl, 197 uint32_t hpet_irqs); 198 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 199 200 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 201 202 /* port92.c */ 203 #define PORT92_A20_LINE "a20" 204 205 #define TYPE_PORT92 "port92" 206 207 /* pc_sysfw.c */ 208 void pc_system_flash_create(PCMachineState *pcms); 209 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 210 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 211 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 212 int *data_len); 213 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 214 215 /* sgx.c */ 216 void pc_machine_init_sgx_epc(PCMachineState *pcms); 217 218 extern GlobalProperty pc_compat_9_0[]; 219 extern const size_t pc_compat_9_0_len; 220 221 extern GlobalProperty pc_compat_8_2[]; 222 extern const size_t pc_compat_8_2_len; 223 224 extern GlobalProperty pc_compat_8_1[]; 225 extern const size_t pc_compat_8_1_len; 226 227 extern GlobalProperty pc_compat_8_0[]; 228 extern const size_t pc_compat_8_0_len; 229 230 extern GlobalProperty pc_compat_7_2[]; 231 extern const size_t pc_compat_7_2_len; 232 233 extern GlobalProperty pc_compat_7_1[]; 234 extern const size_t pc_compat_7_1_len; 235 236 extern GlobalProperty pc_compat_7_0[]; 237 extern const size_t pc_compat_7_0_len; 238 239 extern GlobalProperty pc_compat_6_2[]; 240 extern const size_t pc_compat_6_2_len; 241 242 extern GlobalProperty pc_compat_6_1[]; 243 extern const size_t pc_compat_6_1_len; 244 245 extern GlobalProperty pc_compat_6_0[]; 246 extern const size_t pc_compat_6_0_len; 247 248 extern GlobalProperty pc_compat_5_2[]; 249 extern const size_t pc_compat_5_2_len; 250 251 extern GlobalProperty pc_compat_5_1[]; 252 extern const size_t pc_compat_5_1_len; 253 254 extern GlobalProperty pc_compat_5_0[]; 255 extern const size_t pc_compat_5_0_len; 256 257 extern GlobalProperty pc_compat_4_2[]; 258 extern const size_t pc_compat_4_2_len; 259 260 extern GlobalProperty pc_compat_4_1[]; 261 extern const size_t pc_compat_4_1_len; 262 263 extern GlobalProperty pc_compat_4_0[]; 264 extern const size_t pc_compat_4_0_len; 265 266 extern GlobalProperty pc_compat_3_1[]; 267 extern const size_t pc_compat_3_1_len; 268 269 extern GlobalProperty pc_compat_3_0[]; 270 extern const size_t pc_compat_3_0_len; 271 272 extern GlobalProperty pc_compat_2_12[]; 273 extern const size_t pc_compat_2_12_len; 274 275 extern GlobalProperty pc_compat_2_11[]; 276 extern const size_t pc_compat_2_11_len; 277 278 extern GlobalProperty pc_compat_2_10[]; 279 extern const size_t pc_compat_2_10_len; 280 281 extern GlobalProperty pc_compat_2_9[]; 282 extern const size_t pc_compat_2_9_len; 283 284 extern GlobalProperty pc_compat_2_8[]; 285 extern const size_t pc_compat_2_8_len; 286 287 extern GlobalProperty pc_compat_2_7[]; 288 extern const size_t pc_compat_2_7_len; 289 290 extern GlobalProperty pc_compat_2_6[]; 291 extern const size_t pc_compat_2_6_len; 292 293 extern GlobalProperty pc_compat_2_5[]; 294 extern const size_t pc_compat_2_5_len; 295 296 extern GlobalProperty pc_compat_2_4[]; 297 extern const size_t pc_compat_2_4_len; 298 299 extern GlobalProperty pc_compat_2_3[]; 300 extern const size_t pc_compat_2_3_len; 301 302 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 303 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 304 { \ 305 MachineClass *mc = MACHINE_CLASS(oc); \ 306 optsfn(mc); \ 307 mc->init = initfn; \ 308 } \ 309 static const TypeInfo pc_machine_type_##suffix = { \ 310 .name = namestr TYPE_MACHINE_SUFFIX, \ 311 .parent = TYPE_PC_MACHINE, \ 312 .class_init = pc_machine_##suffix##_class_init, \ 313 }; \ 314 static void pc_machine_init_##suffix(void) \ 315 { \ 316 type_register(&pc_machine_type_##suffix); \ 317 } \ 318 type_init(pc_machine_init_##suffix) 319 320 #endif 321