xref: /openbmc/qemu/include/hw/i386/pc.h (revision 6d5e9372)
1 #ifndef HW_PC_H
2 #define HW_PC_H
3 
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11 
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/boards.h"
17 
18 #define HPET_INTCAP "hpet-intcap"
19 
20 /**
21  * PCMachineState:
22  * @hotplug_memory_base: address in guest RAM address space where hotplug memory
23  * address space begins.
24  * @hotplug_memory: hotplug memory addess space container
25  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
26  */
27 struct PCMachineState {
28     /*< private >*/
29     MachineState parent_obj;
30 
31     /* <public> */
32     ram_addr_t hotplug_memory_base;
33     MemoryRegion hotplug_memory;
34 
35     HotplugHandler *acpi_dev;
36 
37     uint64_t max_ram_below_4g;
38 };
39 
40 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
41 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
42 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
43 
44 /**
45  * PCMachineClass:
46  * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
47  */
48 struct PCMachineClass {
49     /*< private >*/
50     MachineClass parent_class;
51 
52     /*< public >*/
53     HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
54                                            DeviceState *dev);
55 };
56 
57 typedef struct PCMachineState PCMachineState;
58 typedef struct PCMachineClass PCMachineClass;
59 
60 #define TYPE_PC_MACHINE "generic-pc-machine"
61 #define PC_MACHINE(obj) \
62     OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
63 #define PC_MACHINE_GET_CLASS(obj) \
64     OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
65 #define PC_MACHINE_CLASS(klass) \
66     OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
67 
68 void qemu_register_pc_machine(QEMUMachine *m);
69 
70 /* PC-style peripherals (also used by other machines).  */
71 
72 typedef struct PcPciInfo {
73     Range w32;
74     Range w64;
75 } PcPciInfo;
76 
77 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
78 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
79 #define ACPI_PM_PROP_S4_VAL "s4_val"
80 #define ACPI_PM_PROP_SCI_INT "sci_int"
81 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
82 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
83 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
84 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
85 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
86 
87 struct PcGuestInfo {
88     bool has_pci_info;
89     bool isapc_ram_fw;
90     hwaddr ram_size, ram_size_below_4g;
91     unsigned apic_id_limit;
92     bool apic_xrupt_override;
93     uint64_t numa_nodes;
94     uint64_t *node_mem;
95     uint64_t *node_cpu;
96     FWCfgState *fw_cfg;
97     int legacy_acpi_table_size;
98     bool has_acpi_build;
99     bool has_reserved_memory;
100 };
101 
102 /* parallel.c */
103 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
104 {
105     DeviceState *dev;
106     ISADevice *isadev;
107 
108     isadev = isa_try_create(bus, "isa-parallel");
109     if (!isadev) {
110         return false;
111     }
112     dev = DEVICE(isadev);
113     qdev_prop_set_uint32(dev, "index", index);
114     qdev_prop_set_chr(dev, "chardev", chr);
115     if (qdev_init(dev) < 0) {
116         return false;
117     }
118     return true;
119 }
120 
121 bool parallel_mm_init(MemoryRegion *address_space,
122                       hwaddr base, int it_shift, qemu_irq irq,
123                       CharDriverState *chr);
124 
125 /* i8259.c */
126 
127 extern DeviceState *isa_pic;
128 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
129 qemu_irq *kvm_i8259_init(ISABus *bus);
130 int pic_read_irq(DeviceState *d);
131 int pic_get_output(DeviceState *d);
132 void pic_info(Monitor *mon, const QDict *qdict);
133 void irq_info(Monitor *mon, const QDict *qdict);
134 
135 /* Global System Interrupts */
136 
137 #define GSI_NUM_PINS IOAPIC_NUM_PINS
138 
139 typedef struct GSIState {
140     qemu_irq i8259_irq[ISA_NUM_IRQS];
141     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
142 } GSIState;
143 
144 void gsi_handler(void *opaque, int n, int level);
145 
146 /* vmport.c */
147 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
148 
149 static inline void vmport_init(ISABus *bus)
150 {
151     isa_create_simple(bus, "vmport");
152 }
153 
154 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
155 void vmmouse_get_data(uint32_t *data);
156 void vmmouse_set_data(const uint32_t *data);
157 
158 /* pckbd.c */
159 
160 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
161 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
162                    MemoryRegion *region, ram_addr_t size,
163                    hwaddr mask);
164 void i8042_isa_mouse_fake_event(void *opaque);
165 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
166 
167 /* pc.c */
168 extern int fd_bootchk;
169 
170 void pc_register_ferr_irq(qemu_irq irq);
171 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
172 
173 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
174 void pc_hot_add_cpu(const int64_t id, Error **errp);
175 void pc_acpi_init(const char *default_dsdt);
176 
177 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
178                                 ram_addr_t above_4g_mem_size);
179 
180 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
181 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
182 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
183 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
184 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
185 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
186 
187 
188 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
189                             MemoryRegion *pci_address_space);
190 
191 FWCfgState *xen_load_linux(const char *kernel_filename,
192                            const char *kernel_cmdline,
193                            const char *initrd_filename,
194                            ram_addr_t below_4g_mem_size,
195                            PcGuestInfo *guest_info);
196 FWCfgState *pc_memory_init(MachineState *machine,
197                            MemoryRegion *system_memory,
198                            ram_addr_t below_4g_mem_size,
199                            ram_addr_t above_4g_mem_size,
200                            MemoryRegion *rom_memory,
201                            MemoryRegion **ram_memory,
202                            PcGuestInfo *guest_info);
203 qemu_irq *pc_allocate_cpu_irq(void);
204 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
205 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
206                           ISADevice **rtc_state,
207                           ISADevice **floppy,
208                           bool no_vmport,
209                           uint32 hpet_irqs);
210 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
211 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
212                   const char *boot_device,
213                   ISADevice *floppy, BusState *ide0, BusState *ide1,
214                   ISADevice *s);
215 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
216 void pc_pci_device_init(PCIBus *pci_bus);
217 
218 typedef void (*cpu_set_smm_t)(int smm, void *arg);
219 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
220 
221 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
222 
223 /* acpi_piix.c */
224 
225 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
226                       qemu_irq sci_irq, qemu_irq smi_irq,
227                       int kvm_enabled, FWCfgState *fw_cfg,
228                       DeviceState **piix4_pm);
229 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
230 
231 /* hpet.c */
232 extern int no_hpet;
233 
234 /* piix_pci.c */
235 struct PCII440FXState;
236 typedef struct PCII440FXState PCII440FXState;
237 
238 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
239                     ISABus **isa_bus, qemu_irq *pic,
240                     MemoryRegion *address_space_mem,
241                     MemoryRegion *address_space_io,
242                     ram_addr_t ram_size,
243                     ram_addr_t below_4g_mem_size,
244                     ram_addr_t above_4g_mem_size,
245                     MemoryRegion *pci_memory,
246                     MemoryRegion *ram_memory);
247 
248 PCIBus *find_i440fx(void);
249 /* piix4.c */
250 extern PCIDevice *piix4_dev;
251 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
252 
253 /* vga.c */
254 enum vga_retrace_method {
255     VGA_RETRACE_DUMB,
256     VGA_RETRACE_PRECISE
257 };
258 
259 extern enum vga_retrace_method vga_retrace_method;
260 
261 int isa_vga_mm_init(hwaddr vram_base,
262                     hwaddr ctrl_base, int it_shift,
263                     MemoryRegion *address_space);
264 
265 /* ne2000.c */
266 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
267 {
268     DeviceState *dev;
269     ISADevice *isadev;
270 
271     qemu_check_nic_model(nd, "ne2k_isa");
272 
273     isadev = isa_try_create(bus, "ne2k_isa");
274     if (!isadev) {
275         return false;
276     }
277     dev = DEVICE(isadev);
278     qdev_prop_set_uint32(dev, "iobase", base);
279     qdev_prop_set_uint32(dev, "irq",    irq);
280     qdev_set_nic_properties(dev, nd);
281     qdev_init_nofail(dev);
282     return true;
283 }
284 
285 /* pc_sysfw.c */
286 void pc_system_firmware_init(MemoryRegion *rom_memory,
287                              bool isapc_ram_fw);
288 
289 /* pvpanic.c */
290 uint16_t pvpanic_port(void);
291 
292 /* e820 types */
293 #define E820_RAM        1
294 #define E820_RESERVED   2
295 #define E820_ACPI       3
296 #define E820_NVS        4
297 #define E820_UNUSABLE   5
298 
299 int e820_add_entry(uint64_t, uint64_t, uint32_t);
300 int e820_get_num_entries(void);
301 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
302 
303 #define PC_COMPAT_2_0 \
304         {\
305             .driver   = "virtio-scsi-pci",\
306             .property = "any_layout",\
307             .value    = "off",\
308         },{\
309             .driver   = "PIIX4_PM",\
310             .property = "memory-hotplug-support",\
311             .value    = "off",\
312         },\
313         {\
314             .driver   = "apic",\
315             .property = "version",\
316             .value    = stringify(0x11),\
317         },\
318         {\
319             .driver   = "nec-usb-xhci",\
320             .property = "superspeed-ports-first",\
321             .value    = "off",\
322         },\
323         {\
324             .driver   = "pci-serial",\
325             .property = "prog_if",\
326             .value    = stringify(0),\
327         },\
328         {\
329             .driver   = "pci-serial-2x",\
330             .property = "prog_if",\
331             .value    = stringify(0),\
332         },\
333         {\
334             .driver   = "pci-serial-4x",\
335             .property = "prog_if",\
336             .value    = stringify(0),\
337         },\
338         {\
339             .driver   = "virtio-net-pci",\
340             .property = "guest_announce",\
341             .value    = "off",\
342         },\
343         {\
344             .driver   = "ICH9-LPC",\
345             .property = "memory-hotplug-support",\
346             .value    = "off",\
347         },{\
348             .driver   = "xio3130-downstream",\
349             .property = COMPAT_PROP_PCP,\
350             .value    = "off",\
351         },{\
352             .driver   = "ioh3420",\
353             .property = COMPAT_PROP_PCP,\
354             .value    = "off",\
355         }
356 
357 #define PC_COMPAT_1_7 \
358         PC_COMPAT_2_0, \
359         {\
360             .driver   = TYPE_USB_DEVICE,\
361             .property = "msos-desc",\
362             .value    = "no",\
363         },\
364         {\
365             .driver   = "PIIX4_PM",\
366             .property = "acpi-pci-hotplug-with-bridge-support",\
367             .value    = "off",\
368         },\
369         {\
370             .driver   = "hpet",\
371             .property = HPET_INTCAP,\
372             .value    = stringify(4),\
373         }
374 
375 #define PC_COMPAT_1_6 \
376         PC_COMPAT_1_7, \
377         {\
378             .driver   = "e1000",\
379             .property = "mitigation",\
380             .value    = "off",\
381         },{\
382             .driver   = "qemu64-" TYPE_X86_CPU,\
383             .property = "model",\
384             .value    = stringify(2),\
385         },{\
386             .driver   = "qemu32-" TYPE_X86_CPU,\
387             .property = "model",\
388             .value    = stringify(3),\
389         },{\
390             .driver   = "i440FX-pcihost",\
391             .property = "short_root_bus",\
392             .value    = stringify(1),\
393         },{\
394             .driver   = "q35-pcihost",\
395             .property = "short_root_bus",\
396             .value    = stringify(1),\
397         }
398 
399 #define PC_COMPAT_1_5 \
400         PC_COMPAT_1_6, \
401         {\
402             .driver   = "Conroe-" TYPE_X86_CPU,\
403             .property = "model",\
404             .value    = stringify(2),\
405         },{\
406             .driver   = "Conroe-" TYPE_X86_CPU,\
407             .property = "level",\
408             .value    = stringify(2),\
409         },{\
410             .driver   = "Penryn-" TYPE_X86_CPU,\
411             .property = "model",\
412             .value    = stringify(2),\
413         },{\
414             .driver   = "Penryn-" TYPE_X86_CPU,\
415             .property = "level",\
416             .value    = stringify(2),\
417         },{\
418             .driver   = "Nehalem-" TYPE_X86_CPU,\
419             .property = "model",\
420             .value    = stringify(2),\
421         },{\
422             .driver   = "Nehalem-" TYPE_X86_CPU,\
423             .property = "level",\
424             .value    = stringify(2),\
425         },{\
426             .driver   = "virtio-net-pci",\
427             .property = "any_layout",\
428             .value    = "off",\
429         },{\
430             .driver = TYPE_X86_CPU,\
431             .property = "pmu",\
432             .value = "on",\
433         },{\
434             .driver   = "i440FX-pcihost",\
435             .property = "short_root_bus",\
436             .value    = stringify(0),\
437         },{\
438             .driver   = "q35-pcihost",\
439             .property = "short_root_bus",\
440             .value    = stringify(0),\
441         }
442 
443 #define PC_COMPAT_1_4 \
444         PC_COMPAT_1_5, \
445         {\
446             .driver   = "scsi-hd",\
447             .property = "discard_granularity",\
448             .value    = stringify(0),\
449 	},{\
450             .driver   = "scsi-cd",\
451             .property = "discard_granularity",\
452             .value    = stringify(0),\
453 	},{\
454             .driver   = "scsi-disk",\
455             .property = "discard_granularity",\
456             .value    = stringify(0),\
457 	},{\
458             .driver   = "ide-hd",\
459             .property = "discard_granularity",\
460             .value    = stringify(0),\
461 	},{\
462             .driver   = "ide-cd",\
463             .property = "discard_granularity",\
464             .value    = stringify(0),\
465 	},{\
466             .driver   = "ide-drive",\
467             .property = "discard_granularity",\
468             .value    = stringify(0),\
469         },{\
470             .driver   = "virtio-blk-pci",\
471             .property = "discard_granularity",\
472             .value    = stringify(0),\
473 	},{\
474             .driver   = "virtio-serial-pci",\
475             .property = "vectors",\
476             /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
477             .value    = stringify(0xFFFFFFFF),\
478         },{ \
479             .driver   = "virtio-net-pci", \
480             .property = "ctrl_guest_offloads", \
481             .value    = "off", \
482         },{\
483             .driver   = "e1000",\
484             .property = "romfile",\
485             .value    = "pxe-e1000.rom",\
486         },{\
487             .driver   = "ne2k_pci",\
488             .property = "romfile",\
489             .value    = "pxe-ne2k_pci.rom",\
490         },{\
491             .driver   = "pcnet",\
492             .property = "romfile",\
493             .value    = "pxe-pcnet.rom",\
494         },{\
495             .driver   = "rtl8139",\
496             .property = "romfile",\
497             .value    = "pxe-rtl8139.rom",\
498         },{\
499             .driver   = "virtio-net-pci",\
500             .property = "romfile",\
501             .value    = "pxe-virtio.rom",\
502         },{\
503             .driver   = "486-" TYPE_X86_CPU,\
504             .property = "model",\
505             .value    = stringify(0),\
506         }
507 
508 #define PC_COMMON_MACHINE_OPTIONS \
509     .default_boot_order = "cad"
510 
511 #define PC_DEFAULT_MACHINE_OPTIONS \
512     PC_COMMON_MACHINE_OPTIONS, \
513     .hot_add_cpu = pc_hot_add_cpu, \
514     .max_cpus = 255
515 
516 #endif
517