1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/acpi/acpi_dev_interface.h" 13 #include "hw/hotplug.h" 14 #include "qom/object.h" 15 16 #define HPET_INTCAP "hpet-intcap" 17 18 /** 19 * PCMachineState: 20 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 21 * @boot_cpus: number of present VCPUs 22 */ 23 typedef struct PCMachineState { 24 /*< private >*/ 25 X86MachineState parent_obj; 26 27 /* <public> */ 28 29 /* State for other subsystems/APIs: */ 30 Notifier machine_done; 31 32 /* Pointers to devices and objects: */ 33 PCIBus *bus; 34 I2CBus *smbus; 35 PFlashCFI01 *flash[2]; 36 ISADevice *pcspk; 37 38 /* Configuration options: */ 39 uint64_t max_ram_below_4g; 40 OnOffAuto vmport; 41 42 bool acpi_build_enabled; 43 bool smbus_enabled; 44 bool sata_enabled; 45 bool pit_enabled; 46 bool hpet_enabled; 47 bool default_bus_bypass_iommu; 48 uint64_t max_fw_size; 49 50 /* ACPI Memory hotplug IO base address */ 51 hwaddr memhp_io_base; 52 } PCMachineState; 53 54 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 55 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 56 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 57 #define PC_MACHINE_VMPORT "vmport" 58 #define PC_MACHINE_SMBUS "smbus" 59 #define PC_MACHINE_SATA "sata" 60 #define PC_MACHINE_PIT "pit" 61 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 62 /** 63 * PCMachineClass: 64 * 65 * Compat fields: 66 * 67 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 68 * backend's alignment value if provided 69 * @acpi_data_size: Size of the chunk of memory at the top of RAM 70 * for the BIOS ACPI tables and other BIOS 71 * datastructures. 72 * @gigabyte_align: Make sure that guest addresses aligned at 73 * 1Gbyte boundaries get mapped to host 74 * addresses aligned at 1Gbyte boundaries. This 75 * way we can use 1GByte pages in the host. 76 * 77 */ 78 struct PCMachineClass { 79 /*< private >*/ 80 X86MachineClass parent_class; 81 82 /*< public >*/ 83 84 /* Device configuration: */ 85 bool pci_enabled; 86 bool kvmclock_enabled; 87 const char *default_nic_model; 88 89 /* Compat options: */ 90 91 /* Default CPU model version. See x86_cpu_set_default_version(). */ 92 int default_cpu_version; 93 94 /* ACPI compat: */ 95 bool has_acpi_build; 96 bool rsdp_in_ram; 97 int legacy_acpi_table_size; 98 unsigned acpi_data_size; 99 bool do_not_add_smb_acpi; 100 int pci_root_uid; 101 102 /* SMBIOS compat: */ 103 bool smbios_defaults; 104 bool smbios_legacy_mode; 105 bool smbios_uuid_encoded; 106 107 /* RAM / address space compat: */ 108 bool gigabyte_align; 109 bool has_reserved_memory; 110 bool enforce_aligned_dimm; 111 bool broken_reserved_end; 112 113 /* generate legacy CPU hotplug AML */ 114 bool legacy_cpu_hotplug; 115 116 /* use DMA capable linuxboot option rom */ 117 bool linuxboot_dma_enabled; 118 119 /* use PVH to load kernels that support this feature */ 120 bool pvh_enabled; 121 122 /* create kvmclock device even when KVM PV features are not exposed */ 123 bool kvmclock_create_always; 124 }; 125 126 #define TYPE_PC_MACHINE "generic-pc-machine" 127 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 128 129 /* ioapic.c */ 130 131 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 132 133 /* pc.c */ 134 extern int fd_bootchk; 135 136 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 137 138 void pc_guest_info_init(PCMachineState *pcms); 139 140 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 141 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 142 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 143 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 144 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 145 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 146 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 147 148 149 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 150 MemoryRegion *pci_address_space); 151 152 void xen_load_linux(PCMachineState *pcms); 153 void pc_memory_init(PCMachineState *pcms, 154 MemoryRegion *system_memory, 155 MemoryRegion *rom_memory, 156 MemoryRegion **ram_memory); 157 uint64_t pc_pci_hole64_start(void); 158 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 159 void pc_basic_device_init(struct PCMachineState *pcms, 160 ISABus *isa_bus, qemu_irq *gsi, 161 ISADevice **rtc_state, 162 bool create_fdctrl, 163 uint32_t hpet_irqs); 164 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 165 void pc_cmos_init(PCMachineState *pcms, 166 BusState *ide0, BusState *ide1, 167 ISADevice *s); 168 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 169 void pc_pci_device_init(PCIBus *pci_bus); 170 171 typedef void (*cpu_set_smm_t)(int smm, void *arg); 172 173 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 174 175 ISADevice *pc_find_fdc0(void); 176 177 /* port92.c */ 178 #define PORT92_A20_LINE "a20" 179 180 #define TYPE_PORT92 "port92" 181 182 /* pc_sysfw.c */ 183 void pc_system_flash_create(PCMachineState *pcms); 184 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 185 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 186 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 187 int *data_len); 188 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 189 190 191 /* acpi-build.c */ 192 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 193 const CPUArchIdList *apic_ids, GArray *entry); 194 195 extern GlobalProperty pc_compat_6_1[]; 196 extern const size_t pc_compat_6_1_len; 197 198 extern GlobalProperty pc_compat_6_0[]; 199 extern const size_t pc_compat_6_0_len; 200 201 extern GlobalProperty pc_compat_5_2[]; 202 extern const size_t pc_compat_5_2_len; 203 204 extern GlobalProperty pc_compat_5_1[]; 205 extern const size_t pc_compat_5_1_len; 206 207 extern GlobalProperty pc_compat_5_0[]; 208 extern const size_t pc_compat_5_0_len; 209 210 extern GlobalProperty pc_compat_4_2[]; 211 extern const size_t pc_compat_4_2_len; 212 213 extern GlobalProperty pc_compat_4_1[]; 214 extern const size_t pc_compat_4_1_len; 215 216 extern GlobalProperty pc_compat_4_0[]; 217 extern const size_t pc_compat_4_0_len; 218 219 extern GlobalProperty pc_compat_3_1[]; 220 extern const size_t pc_compat_3_1_len; 221 222 extern GlobalProperty pc_compat_3_0[]; 223 extern const size_t pc_compat_3_0_len; 224 225 extern GlobalProperty pc_compat_2_12[]; 226 extern const size_t pc_compat_2_12_len; 227 228 extern GlobalProperty pc_compat_2_11[]; 229 extern const size_t pc_compat_2_11_len; 230 231 extern GlobalProperty pc_compat_2_10[]; 232 extern const size_t pc_compat_2_10_len; 233 234 extern GlobalProperty pc_compat_2_9[]; 235 extern const size_t pc_compat_2_9_len; 236 237 extern GlobalProperty pc_compat_2_8[]; 238 extern const size_t pc_compat_2_8_len; 239 240 extern GlobalProperty pc_compat_2_7[]; 241 extern const size_t pc_compat_2_7_len; 242 243 extern GlobalProperty pc_compat_2_6[]; 244 extern const size_t pc_compat_2_6_len; 245 246 extern GlobalProperty pc_compat_2_5[]; 247 extern const size_t pc_compat_2_5_len; 248 249 extern GlobalProperty pc_compat_2_4[]; 250 extern const size_t pc_compat_2_4_len; 251 252 extern GlobalProperty pc_compat_2_3[]; 253 extern const size_t pc_compat_2_3_len; 254 255 extern GlobalProperty pc_compat_2_2[]; 256 extern const size_t pc_compat_2_2_len; 257 258 extern GlobalProperty pc_compat_2_1[]; 259 extern const size_t pc_compat_2_1_len; 260 261 extern GlobalProperty pc_compat_2_0[]; 262 extern const size_t pc_compat_2_0_len; 263 264 extern GlobalProperty pc_compat_1_7[]; 265 extern const size_t pc_compat_1_7_len; 266 267 extern GlobalProperty pc_compat_1_6[]; 268 extern const size_t pc_compat_1_6_len; 269 270 extern GlobalProperty pc_compat_1_5[]; 271 extern const size_t pc_compat_1_5_len; 272 273 extern GlobalProperty pc_compat_1_4[]; 274 extern const size_t pc_compat_1_4_len; 275 276 /* Helper for setting model-id for CPU models that changed model-id 277 * depending on QEMU versions up to QEMU 2.4. 278 */ 279 #define PC_CPU_MODEL_IDS(v) \ 280 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 281 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 282 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, 283 284 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 285 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 286 { \ 287 MachineClass *mc = MACHINE_CLASS(oc); \ 288 optsfn(mc); \ 289 mc->init = initfn; \ 290 } \ 291 static const TypeInfo pc_machine_type_##suffix = { \ 292 .name = namestr TYPE_MACHINE_SUFFIX, \ 293 .parent = TYPE_PC_MACHINE, \ 294 .class_init = pc_machine_##suffix##_class_init, \ 295 }; \ 296 static void pc_machine_init_##suffix(void) \ 297 { \ 298 type_register(&pc_machine_type_##suffix); \ 299 } \ 300 type_init(pc_machine_init_##suffix) 301 302 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 303 #endif 304