1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/firmware/smbios.h" 16 #include "hw/cxl/cxl.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 23 * @boot_cpus: number of present VCPUs 24 */ 25 typedef struct PCMachineState { 26 /*< private >*/ 27 X86MachineState parent_obj; 28 29 /* <public> */ 30 31 /* State for other subsystems/APIs: */ 32 Notifier machine_done; 33 34 /* Pointers to devices and objects: */ 35 PCIBus *bus; 36 I2CBus *smbus; 37 PFlashCFI01 *flash[2]; 38 ISADevice *pcspk; 39 DeviceState *iommu; 40 41 /* Configuration options: */ 42 uint64_t max_ram_below_4g; 43 OnOffAuto vmport; 44 SmbiosEntryPointType smbios_entry_point_type; 45 46 bool acpi_build_enabled; 47 bool smbus_enabled; 48 bool sata_enabled; 49 bool hpet_enabled; 50 bool i8042_enabled; 51 bool default_bus_bypass_iommu; 52 uint64_t max_fw_size; 53 54 /* ACPI Memory hotplug IO base address */ 55 hwaddr memhp_io_base; 56 57 SGXEPCState sgx_epc; 58 CXLState cxl_devices_state; 59 } PCMachineState; 60 61 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 62 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 63 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 64 #define PC_MACHINE_VMPORT "vmport" 65 #define PC_MACHINE_SMBUS "smbus" 66 #define PC_MACHINE_SATA "sata" 67 #define PC_MACHINE_I8042 "i8042" 68 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 69 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 70 71 /** 72 * PCMachineClass: 73 * 74 * Compat fields: 75 * 76 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 77 * backend's alignment value if provided 78 * @acpi_data_size: Size of the chunk of memory at the top of RAM 79 * for the BIOS ACPI tables and other BIOS 80 * datastructures. 81 * @gigabyte_align: Make sure that guest addresses aligned at 82 * 1Gbyte boundaries get mapped to host 83 * addresses aligned at 1Gbyte boundaries. This 84 * way we can use 1GByte pages in the host. 85 * 86 */ 87 struct PCMachineClass { 88 /*< private >*/ 89 X86MachineClass parent_class; 90 91 /*< public >*/ 92 93 /* Device configuration: */ 94 bool pci_enabled; 95 bool kvmclock_enabled; 96 97 /* Compat options: */ 98 99 /* Default CPU model version. See x86_cpu_set_default_version(). */ 100 int default_cpu_version; 101 102 /* ACPI compat: */ 103 bool has_acpi_build; 104 bool rsdp_in_ram; 105 int legacy_acpi_table_size; 106 unsigned acpi_data_size; 107 int pci_root_uid; 108 109 /* SMBIOS compat: */ 110 bool smbios_defaults; 111 bool smbios_legacy_mode; 112 bool smbios_uuid_encoded; 113 SmbiosEntryPointType default_smbios_ep_type; 114 115 /* RAM / address space compat: */ 116 bool gigabyte_align; 117 bool has_reserved_memory; 118 bool enforce_aligned_dimm; 119 bool broken_reserved_end; 120 bool enforce_amd_1tb_hole; 121 122 /* generate legacy CPU hotplug AML */ 123 bool legacy_cpu_hotplug; 124 125 /* use PVH to load kernels that support this feature */ 126 bool pvh_enabled; 127 128 /* create kvmclock device even when KVM PV features are not exposed */ 129 bool kvmclock_create_always; 130 131 /* resizable acpi blob compat */ 132 bool resizable_acpi_blob; 133 }; 134 135 #define TYPE_PC_MACHINE "generic-pc-machine" 136 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 137 138 /* ioapic.c */ 139 140 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 141 142 /* pc.c */ 143 extern int fd_bootchk; 144 145 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 146 147 void pc_guest_info_init(PCMachineState *pcms); 148 149 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 150 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 151 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 152 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 153 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 154 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 155 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 156 157 158 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 159 MemoryRegion *pci_address_space); 160 161 void xen_load_linux(PCMachineState *pcms); 162 void pc_memory_init(PCMachineState *pcms, 163 MemoryRegion *system_memory, 164 MemoryRegion *rom_memory, 165 uint64_t pci_hole64_size); 166 uint64_t pc_pci_hole64_start(void); 167 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 168 void pc_basic_device_init(struct PCMachineState *pcms, 169 ISABus *isa_bus, qemu_irq *gsi, 170 ISADevice *rtc_state, 171 bool create_fdctrl, 172 uint32_t hpet_irqs); 173 void pc_cmos_init(PCMachineState *pcms, 174 BusState *ide0, BusState *ide1, 175 ISADevice *s); 176 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 177 178 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 179 180 /* port92.c */ 181 #define PORT92_A20_LINE "a20" 182 183 #define TYPE_PORT92 "port92" 184 185 /* pc_sysfw.c */ 186 void pc_system_flash_create(PCMachineState *pcms); 187 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 188 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 189 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 190 int *data_len); 191 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 192 193 /* hw/i386/acpi-common.c */ 194 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids, 195 GArray *entry, bool force_enabled); 196 197 /* sgx.c */ 198 void pc_machine_init_sgx_epc(PCMachineState *pcms); 199 200 extern GlobalProperty pc_compat_8_0[]; 201 extern const size_t pc_compat_8_0_len; 202 203 extern GlobalProperty pc_compat_7_2[]; 204 extern const size_t pc_compat_7_2_len; 205 206 extern GlobalProperty pc_compat_7_1[]; 207 extern const size_t pc_compat_7_1_len; 208 209 extern GlobalProperty pc_compat_7_0[]; 210 extern const size_t pc_compat_7_0_len; 211 212 extern GlobalProperty pc_compat_6_2[]; 213 extern const size_t pc_compat_6_2_len; 214 215 extern GlobalProperty pc_compat_6_1[]; 216 extern const size_t pc_compat_6_1_len; 217 218 extern GlobalProperty pc_compat_6_0[]; 219 extern const size_t pc_compat_6_0_len; 220 221 extern GlobalProperty pc_compat_5_2[]; 222 extern const size_t pc_compat_5_2_len; 223 224 extern GlobalProperty pc_compat_5_1[]; 225 extern const size_t pc_compat_5_1_len; 226 227 extern GlobalProperty pc_compat_5_0[]; 228 extern const size_t pc_compat_5_0_len; 229 230 extern GlobalProperty pc_compat_4_2[]; 231 extern const size_t pc_compat_4_2_len; 232 233 extern GlobalProperty pc_compat_4_1[]; 234 extern const size_t pc_compat_4_1_len; 235 236 extern GlobalProperty pc_compat_4_0[]; 237 extern const size_t pc_compat_4_0_len; 238 239 extern GlobalProperty pc_compat_3_1[]; 240 extern const size_t pc_compat_3_1_len; 241 242 extern GlobalProperty pc_compat_3_0[]; 243 extern const size_t pc_compat_3_0_len; 244 245 extern GlobalProperty pc_compat_2_12[]; 246 extern const size_t pc_compat_2_12_len; 247 248 extern GlobalProperty pc_compat_2_11[]; 249 extern const size_t pc_compat_2_11_len; 250 251 extern GlobalProperty pc_compat_2_10[]; 252 extern const size_t pc_compat_2_10_len; 253 254 extern GlobalProperty pc_compat_2_9[]; 255 extern const size_t pc_compat_2_9_len; 256 257 extern GlobalProperty pc_compat_2_8[]; 258 extern const size_t pc_compat_2_8_len; 259 260 extern GlobalProperty pc_compat_2_7[]; 261 extern const size_t pc_compat_2_7_len; 262 263 extern GlobalProperty pc_compat_2_6[]; 264 extern const size_t pc_compat_2_6_len; 265 266 extern GlobalProperty pc_compat_2_5[]; 267 extern const size_t pc_compat_2_5_len; 268 269 extern GlobalProperty pc_compat_2_4[]; 270 extern const size_t pc_compat_2_4_len; 271 272 extern GlobalProperty pc_compat_2_3[]; 273 extern const size_t pc_compat_2_3_len; 274 275 extern GlobalProperty pc_compat_2_2[]; 276 extern const size_t pc_compat_2_2_len; 277 278 extern GlobalProperty pc_compat_2_1[]; 279 extern const size_t pc_compat_2_1_len; 280 281 extern GlobalProperty pc_compat_2_0[]; 282 extern const size_t pc_compat_2_0_len; 283 284 extern GlobalProperty pc_compat_1_7[]; 285 extern const size_t pc_compat_1_7_len; 286 287 extern GlobalProperty pc_compat_1_6[]; 288 extern const size_t pc_compat_1_6_len; 289 290 extern GlobalProperty pc_compat_1_5[]; 291 extern const size_t pc_compat_1_5_len; 292 293 extern GlobalProperty pc_compat_1_4[]; 294 extern const size_t pc_compat_1_4_len; 295 296 int pc_machine_kvm_type(MachineState *machine, const char *vm_type); 297 298 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 299 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 300 { \ 301 MachineClass *mc = MACHINE_CLASS(oc); \ 302 optsfn(mc); \ 303 mc->init = initfn; \ 304 mc->kvm_type = pc_machine_kvm_type; \ 305 } \ 306 static const TypeInfo pc_machine_type_##suffix = { \ 307 .name = namestr TYPE_MACHINE_SUFFIX, \ 308 .parent = TYPE_PC_MACHINE, \ 309 .class_init = pc_machine_##suffix##_class_init, \ 310 }; \ 311 static void pc_machine_init_##suffix(void) \ 312 { \ 313 type_register(&pc_machine_type_##suffix); \ 314 } \ 315 type_init(pc_machine_init_##suffix) 316 317 #endif 318