1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 MemoryHotplugState hotplug_memory; 36 Notifier machine_done; 37 38 /* Pointers to devices and objects: */ 39 HotplugHandler *acpi_dev; 40 ISADevice *rtc; 41 PCIBus *bus; 42 FWCfgState *fw_cfg; 43 qemu_irq *gsi; 44 45 /* Configuration options: */ 46 uint64_t max_ram_below_4g; 47 OnOffAuto vmport; 48 OnOffAuto smm; 49 50 AcpiNVDIMMState acpi_nvdimm_state; 51 52 bool acpi_build_enabled; 53 bool smbus; 54 bool sata; 55 bool pit; 56 57 /* RAM information (sizes, addresses, configuration): */ 58 ram_addr_t below_4g_mem_size, above_4g_mem_size; 59 60 /* CPU and apic information: */ 61 bool apic_xrupt_override; 62 unsigned apic_id_limit; 63 uint16_t boot_cpus; 64 65 /* NUMA information: */ 66 uint64_t numa_nodes; 67 uint64_t *node_mem; 68 69 /* Address space used by IOAPIC device. All IOAPIC interrupts 70 * will be translated to MSI messages in the address space. */ 71 AddressSpace *ioapic_as; 72 }; 73 74 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 75 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 76 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 77 #define PC_MACHINE_VMPORT "vmport" 78 #define PC_MACHINE_SMM "smm" 79 #define PC_MACHINE_NVDIMM "nvdimm" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Methods: 88 * 89 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 90 * 91 * Compat fields: 92 * 93 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 94 * backend's alignment value if provided 95 * @acpi_data_size: Size of the chunk of memory at the top of RAM 96 * for the BIOS ACPI tables and other BIOS 97 * datastructures. 98 * @gigabyte_align: Make sure that guest addresses aligned at 99 * 1Gbyte boundaries get mapped to host 100 * addresses aligned at 1Gbyte boundaries. This 101 * way we can use 1GByte pages in the host. 102 * 103 */ 104 struct PCMachineClass { 105 /*< private >*/ 106 MachineClass parent_class; 107 108 /*< public >*/ 109 110 /* Methods: */ 111 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 112 DeviceState *dev); 113 114 /* Device configuration: */ 115 bool pci_enabled; 116 bool kvmclock_enabled; 117 118 /* Compat options: */ 119 120 /* ACPI compat: */ 121 bool has_acpi_build; 122 bool rsdp_in_ram; 123 int legacy_acpi_table_size; 124 unsigned acpi_data_size; 125 126 /* SMBIOS compat: */ 127 bool smbios_defaults; 128 bool smbios_legacy_mode; 129 bool smbios_uuid_encoded; 130 131 /* RAM / address space compat: */ 132 bool gigabyte_align; 133 bool has_reserved_memory; 134 bool enforce_aligned_dimm; 135 bool broken_reserved_end; 136 137 /* TSC rate migration: */ 138 bool save_tsc_khz; 139 /* generate legacy CPU hotplug AML */ 140 bool legacy_cpu_hotplug; 141 142 /* use DMA capable linuxboot option rom */ 143 bool linuxboot_dma_enabled; 144 }; 145 146 #define TYPE_PC_MACHINE "generic-pc-machine" 147 #define PC_MACHINE(obj) \ 148 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 149 #define PC_MACHINE_GET_CLASS(obj) \ 150 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 151 #define PC_MACHINE_CLASS(klass) \ 152 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 153 154 /* parallel.c */ 155 156 void parallel_hds_isa_init(ISABus *bus, int n); 157 158 bool parallel_mm_init(MemoryRegion *address_space, 159 hwaddr base, int it_shift, qemu_irq irq, 160 Chardev *chr); 161 162 /* i8259.c */ 163 164 extern DeviceState *isa_pic; 165 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 166 qemu_irq *kvm_i8259_init(ISABus *bus); 167 int pic_read_irq(DeviceState *d); 168 int pic_get_output(DeviceState *d); 169 170 /* ioapic.c */ 171 172 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 173 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 174 175 /* Global System Interrupts */ 176 177 #define GSI_NUM_PINS IOAPIC_NUM_PINS 178 179 typedef struct GSIState { 180 qemu_irq i8259_irq[ISA_NUM_IRQS]; 181 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 182 } GSIState; 183 184 void gsi_handler(void *opaque, int n, int level); 185 186 /* vmport.c */ 187 #define TYPE_VMPORT "vmport" 188 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 189 190 static inline void vmport_init(ISABus *bus) 191 { 192 isa_create_simple(bus, TYPE_VMPORT); 193 } 194 195 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 196 void vmmouse_get_data(uint32_t *data); 197 void vmmouse_set_data(const uint32_t *data); 198 199 /* pckbd.c */ 200 #define I8042_A20_LINE "a20" 201 202 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 203 MemoryRegion *region, ram_addr_t size, 204 hwaddr mask); 205 void i8042_isa_mouse_fake_event(void *opaque); 206 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 207 208 /* pc.c */ 209 extern int fd_bootchk; 210 211 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 212 void pc_register_ferr_irq(qemu_irq irq); 213 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 214 215 void pc_cpus_init(PCMachineState *pcms); 216 void pc_hot_add_cpu(const int64_t id, Error **errp); 217 void pc_acpi_init(const char *default_dsdt); 218 219 void pc_guest_info_init(PCMachineState *pcms); 220 221 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 222 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 223 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 224 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 225 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 226 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 227 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 228 229 230 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 231 MemoryRegion *pci_address_space); 232 233 void xen_load_linux(PCMachineState *pcms); 234 void pc_memory_init(PCMachineState *pcms, 235 MemoryRegion *system_memory, 236 MemoryRegion *rom_memory, 237 MemoryRegion **ram_memory); 238 uint64_t pc_pci_hole64_start(void); 239 qemu_irq pc_allocate_cpu_irq(void); 240 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 241 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 242 ISADevice **rtc_state, 243 bool create_fdctrl, 244 bool no_vmport, 245 bool has_pit, 246 uint32_t hpet_irqs); 247 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 248 void pc_cmos_init(PCMachineState *pcms, 249 BusState *ide0, BusState *ide1, 250 ISADevice *s); 251 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 252 void pc_pci_device_init(PCIBus *pci_bus); 253 254 typedef void (*cpu_set_smm_t)(int smm, void *arg); 255 256 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 257 258 ISADevice *pc_find_fdc0(void); 259 int cmos_get_fd_drive_type(FloppyDriveType fd0); 260 261 #define FW_CFG_IO_BASE 0x510 262 263 #define PORT92_A20_LINE "a20" 264 265 /* acpi_piix.c */ 266 267 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 268 qemu_irq sci_irq, qemu_irq smi_irq, 269 int smm_enabled, DeviceState **piix4_pm); 270 271 /* hpet.c */ 272 extern int no_hpet; 273 274 /* piix_pci.c */ 275 struct PCII440FXState; 276 typedef struct PCII440FXState PCII440FXState; 277 278 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 279 #define TYPE_I440FX_PCI_DEVICE "i440FX" 280 281 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 282 283 /* 284 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 285 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 286 */ 287 #define RCR_IOPORT 0xcf9 288 289 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 290 PCII440FXState **pi440fx_state, int *piix_devfn, 291 ISABus **isa_bus, qemu_irq *pic, 292 MemoryRegion *address_space_mem, 293 MemoryRegion *address_space_io, 294 ram_addr_t ram_size, 295 ram_addr_t below_4g_mem_size, 296 ram_addr_t above_4g_mem_size, 297 MemoryRegion *pci_memory, 298 MemoryRegion *ram_memory); 299 300 PCIBus *find_i440fx(void); 301 /* piix4.c */ 302 extern PCIDevice *piix4_dev; 303 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 304 305 /* pc_sysfw.c */ 306 void pc_system_firmware_init(MemoryRegion *rom_memory, 307 bool isapc_ram_fw); 308 309 /* acpi-build.c */ 310 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 311 const CPUArchIdList *apic_ids, GArray *entry); 312 313 /* e820 types */ 314 #define E820_RAM 1 315 #define E820_RESERVED 2 316 #define E820_ACPI 3 317 #define E820_NVS 4 318 #define E820_UNUSABLE 5 319 320 int e820_add_entry(uint64_t, uint64_t, uint32_t); 321 int e820_get_num_entries(void); 322 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 323 324 #define PC_COMPAT_2_10 \ 325 HW_COMPAT_2_10 \ 326 {\ 327 .driver = TYPE_X86_CPU,\ 328 .property = "x-hv-max-vps",\ 329 .value = "0x40",\ 330 },{\ 331 .driver = "i440FX-pcihost",\ 332 .property = "x-pci-hole64-fix",\ 333 .value = "off",\ 334 },{\ 335 .driver = "q35-pcihost",\ 336 .property = "x-pci-hole64-fix",\ 337 .value = "off",\ 338 }, 339 340 #define PC_COMPAT_2_9 \ 341 HW_COMPAT_2_9 \ 342 {\ 343 .driver = "mch",\ 344 .property = "extended-tseg-mbytes",\ 345 .value = stringify(0),\ 346 },\ 347 348 #define PC_COMPAT_2_8 \ 349 HW_COMPAT_2_8 \ 350 {\ 351 .driver = TYPE_X86_CPU,\ 352 .property = "tcg-cpuid",\ 353 .value = "off",\ 354 },\ 355 {\ 356 .driver = "kvmclock",\ 357 .property = "x-mach-use-reliable-get-clock",\ 358 .value = "off",\ 359 },\ 360 {\ 361 .driver = "ICH9-LPC",\ 362 .property = "x-smi-broadcast",\ 363 .value = "off",\ 364 },\ 365 {\ 366 .driver = TYPE_X86_CPU,\ 367 .property = "vmware-cpuid-freq",\ 368 .value = "off",\ 369 },\ 370 {\ 371 .driver = "Haswell-" TYPE_X86_CPU,\ 372 .property = "stepping",\ 373 .value = "1",\ 374 }, 375 376 #define PC_COMPAT_2_7 \ 377 HW_COMPAT_2_7 \ 378 {\ 379 .driver = TYPE_X86_CPU,\ 380 .property = "l3-cache",\ 381 .value = "off",\ 382 },\ 383 {\ 384 .driver = TYPE_X86_CPU,\ 385 .property = "full-cpuid-auto-level",\ 386 .value = "off",\ 387 },\ 388 {\ 389 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 390 .property = "family",\ 391 .value = "15",\ 392 },\ 393 {\ 394 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 395 .property = "model",\ 396 .value = "6",\ 397 },\ 398 {\ 399 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 400 .property = "stepping",\ 401 .value = "1",\ 402 },\ 403 {\ 404 .driver = "isa-pcspk",\ 405 .property = "migrate",\ 406 .value = "off",\ 407 }, 408 409 #define PC_COMPAT_2_6 \ 410 HW_COMPAT_2_6 \ 411 {\ 412 .driver = TYPE_X86_CPU,\ 413 .property = "cpuid-0xb",\ 414 .value = "off",\ 415 },{\ 416 .driver = "vmxnet3",\ 417 .property = "romfile",\ 418 .value = "",\ 419 },\ 420 {\ 421 .driver = TYPE_X86_CPU,\ 422 .property = "fill-mtrr-mask",\ 423 .value = "off",\ 424 },\ 425 {\ 426 .driver = "apic-common",\ 427 .property = "legacy-instance-id",\ 428 .value = "on",\ 429 }, 430 431 #define PC_COMPAT_2_5 \ 432 HW_COMPAT_2_5 433 434 /* Helper for setting model-id for CPU models that changed model-id 435 * depending on QEMU versions up to QEMU 2.4. 436 */ 437 #define PC_CPU_MODEL_IDS(v) \ 438 {\ 439 .driver = "qemu32-" TYPE_X86_CPU,\ 440 .property = "model-id",\ 441 .value = "QEMU Virtual CPU version " v,\ 442 },\ 443 {\ 444 .driver = "qemu64-" TYPE_X86_CPU,\ 445 .property = "model-id",\ 446 .value = "QEMU Virtual CPU version " v,\ 447 },\ 448 {\ 449 .driver = "athlon-" TYPE_X86_CPU,\ 450 .property = "model-id",\ 451 .value = "QEMU Virtual CPU version " v,\ 452 }, 453 454 #define PC_COMPAT_2_4 \ 455 HW_COMPAT_2_4 \ 456 PC_CPU_MODEL_IDS("2.4.0") \ 457 {\ 458 .driver = "Haswell-" TYPE_X86_CPU,\ 459 .property = "abm",\ 460 .value = "off",\ 461 },\ 462 {\ 463 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 464 .property = "abm",\ 465 .value = "off",\ 466 },\ 467 {\ 468 .driver = "Broadwell-" TYPE_X86_CPU,\ 469 .property = "abm",\ 470 .value = "off",\ 471 },\ 472 {\ 473 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 474 .property = "abm",\ 475 .value = "off",\ 476 },\ 477 {\ 478 .driver = "host" "-" TYPE_X86_CPU,\ 479 .property = "host-cache-info",\ 480 .value = "on",\ 481 },\ 482 {\ 483 .driver = TYPE_X86_CPU,\ 484 .property = "check",\ 485 .value = "off",\ 486 },\ 487 {\ 488 .driver = "qemu64" "-" TYPE_X86_CPU,\ 489 .property = "sse4a",\ 490 .value = "on",\ 491 },\ 492 {\ 493 .driver = "qemu64" "-" TYPE_X86_CPU,\ 494 .property = "abm",\ 495 .value = "on",\ 496 },\ 497 {\ 498 .driver = "qemu64" "-" TYPE_X86_CPU,\ 499 .property = "popcnt",\ 500 .value = "on",\ 501 },\ 502 {\ 503 .driver = "qemu32" "-" TYPE_X86_CPU,\ 504 .property = "popcnt",\ 505 .value = "on",\ 506 },{\ 507 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 508 .property = "rdtscp",\ 509 .value = "on",\ 510 },{\ 511 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 512 .property = "rdtscp",\ 513 .value = "on",\ 514 },{\ 515 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 516 .property = "rdtscp",\ 517 .value = "on",\ 518 },{\ 519 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 520 .property = "rdtscp",\ 521 .value = "on",\ 522 }, 523 524 525 #define PC_COMPAT_2_3 \ 526 HW_COMPAT_2_3 \ 527 PC_CPU_MODEL_IDS("2.3.0") \ 528 {\ 529 .driver = TYPE_X86_CPU,\ 530 .property = "arat",\ 531 .value = "off",\ 532 },{\ 533 .driver = "qemu64" "-" TYPE_X86_CPU,\ 534 .property = "min-level",\ 535 .value = stringify(4),\ 536 },{\ 537 .driver = "kvm64" "-" TYPE_X86_CPU,\ 538 .property = "min-level",\ 539 .value = stringify(5),\ 540 },{\ 541 .driver = "pentium3" "-" TYPE_X86_CPU,\ 542 .property = "min-level",\ 543 .value = stringify(2),\ 544 },{\ 545 .driver = "n270" "-" TYPE_X86_CPU,\ 546 .property = "min-level",\ 547 .value = stringify(5),\ 548 },{\ 549 .driver = "Conroe" "-" TYPE_X86_CPU,\ 550 .property = "min-level",\ 551 .value = stringify(4),\ 552 },{\ 553 .driver = "Penryn" "-" TYPE_X86_CPU,\ 554 .property = "min-level",\ 555 .value = stringify(4),\ 556 },{\ 557 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 558 .property = "min-level",\ 559 .value = stringify(4),\ 560 },{\ 561 .driver = "n270" "-" TYPE_X86_CPU,\ 562 .property = "min-xlevel",\ 563 .value = stringify(0x8000000a),\ 564 },{\ 565 .driver = "Penryn" "-" TYPE_X86_CPU,\ 566 .property = "min-xlevel",\ 567 .value = stringify(0x8000000a),\ 568 },{\ 569 .driver = "Conroe" "-" TYPE_X86_CPU,\ 570 .property = "min-xlevel",\ 571 .value = stringify(0x8000000a),\ 572 },{\ 573 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 574 .property = "min-xlevel",\ 575 .value = stringify(0x8000000a),\ 576 },{\ 577 .driver = "Westmere" "-" TYPE_X86_CPU,\ 578 .property = "min-xlevel",\ 579 .value = stringify(0x8000000a),\ 580 },{\ 581 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 582 .property = "min-xlevel",\ 583 .value = stringify(0x8000000a),\ 584 },{\ 585 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 586 .property = "min-xlevel",\ 587 .value = stringify(0x8000000a),\ 588 },{\ 589 .driver = "Haswell" "-" TYPE_X86_CPU,\ 590 .property = "min-xlevel",\ 591 .value = stringify(0x8000000a),\ 592 },{\ 593 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 594 .property = "min-xlevel",\ 595 .value = stringify(0x8000000a),\ 596 },{\ 597 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 598 .property = "min-xlevel",\ 599 .value = stringify(0x8000000a),\ 600 },{\ 601 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 602 .property = "min-xlevel",\ 603 .value = stringify(0x8000000a),\ 604 },{\ 605 .driver = TYPE_X86_CPU,\ 606 .property = "kvm-no-smi-migration",\ 607 .value = "on",\ 608 }, 609 610 #define PC_COMPAT_2_2 \ 611 HW_COMPAT_2_2 \ 612 PC_CPU_MODEL_IDS("2.3.0") \ 613 {\ 614 .driver = "kvm64" "-" TYPE_X86_CPU,\ 615 .property = "vme",\ 616 .value = "off",\ 617 },\ 618 {\ 619 .driver = "kvm32" "-" TYPE_X86_CPU,\ 620 .property = "vme",\ 621 .value = "off",\ 622 },\ 623 {\ 624 .driver = "Conroe" "-" TYPE_X86_CPU,\ 625 .property = "vme",\ 626 .value = "off",\ 627 },\ 628 {\ 629 .driver = "Penryn" "-" TYPE_X86_CPU,\ 630 .property = "vme",\ 631 .value = "off",\ 632 },\ 633 {\ 634 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 635 .property = "vme",\ 636 .value = "off",\ 637 },\ 638 {\ 639 .driver = "Westmere" "-" TYPE_X86_CPU,\ 640 .property = "vme",\ 641 .value = "off",\ 642 },\ 643 {\ 644 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 645 .property = "vme",\ 646 .value = "off",\ 647 },\ 648 {\ 649 .driver = "Haswell" "-" TYPE_X86_CPU,\ 650 .property = "vme",\ 651 .value = "off",\ 652 },\ 653 {\ 654 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 655 .property = "vme",\ 656 .value = "off",\ 657 },\ 658 {\ 659 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 660 .property = "vme",\ 661 .value = "off",\ 662 },\ 663 {\ 664 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 665 .property = "vme",\ 666 .value = "off",\ 667 },\ 668 {\ 669 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 670 .property = "vme",\ 671 .value = "off",\ 672 },\ 673 {\ 674 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 675 .property = "vme",\ 676 .value = "off",\ 677 },\ 678 {\ 679 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 680 .property = "vme",\ 681 .value = "off",\ 682 },\ 683 {\ 684 .driver = "Haswell" "-" TYPE_X86_CPU,\ 685 .property = "f16c",\ 686 .value = "off",\ 687 },\ 688 {\ 689 .driver = "Haswell" "-" TYPE_X86_CPU,\ 690 .property = "rdrand",\ 691 .value = "off",\ 692 },\ 693 {\ 694 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 695 .property = "f16c",\ 696 .value = "off",\ 697 },\ 698 {\ 699 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 700 .property = "rdrand",\ 701 .value = "off",\ 702 }, 703 704 #define PC_COMPAT_2_1 \ 705 HW_COMPAT_2_1 \ 706 PC_CPU_MODEL_IDS("2.1.0") \ 707 {\ 708 .driver = "coreduo" "-" TYPE_X86_CPU,\ 709 .property = "vmx",\ 710 .value = "on",\ 711 },\ 712 {\ 713 .driver = "core2duo" "-" TYPE_X86_CPU,\ 714 .property = "vmx",\ 715 .value = "on",\ 716 }, 717 718 #define PC_COMPAT_2_0 \ 719 PC_CPU_MODEL_IDS("2.0.0") \ 720 {\ 721 .driver = "virtio-scsi-pci",\ 722 .property = "any_layout",\ 723 .value = "off",\ 724 },{\ 725 .driver = "PIIX4_PM",\ 726 .property = "memory-hotplug-support",\ 727 .value = "off",\ 728 },\ 729 {\ 730 .driver = "apic",\ 731 .property = "version",\ 732 .value = stringify(0x11),\ 733 },\ 734 {\ 735 .driver = "nec-usb-xhci",\ 736 .property = "superspeed-ports-first",\ 737 .value = "off",\ 738 },\ 739 {\ 740 .driver = "nec-usb-xhci",\ 741 .property = "force-pcie-endcap",\ 742 .value = "on",\ 743 },\ 744 {\ 745 .driver = "pci-serial",\ 746 .property = "prog_if",\ 747 .value = stringify(0),\ 748 },\ 749 {\ 750 .driver = "pci-serial-2x",\ 751 .property = "prog_if",\ 752 .value = stringify(0),\ 753 },\ 754 {\ 755 .driver = "pci-serial-4x",\ 756 .property = "prog_if",\ 757 .value = stringify(0),\ 758 },\ 759 {\ 760 .driver = "virtio-net-pci",\ 761 .property = "guest_announce",\ 762 .value = "off",\ 763 },\ 764 {\ 765 .driver = "ICH9-LPC",\ 766 .property = "memory-hotplug-support",\ 767 .value = "off",\ 768 },{\ 769 .driver = "xio3130-downstream",\ 770 .property = COMPAT_PROP_PCP,\ 771 .value = "off",\ 772 },{\ 773 .driver = "ioh3420",\ 774 .property = COMPAT_PROP_PCP,\ 775 .value = "off",\ 776 }, 777 778 #define PC_COMPAT_1_7 \ 779 PC_CPU_MODEL_IDS("1.7.0") \ 780 {\ 781 .driver = TYPE_USB_DEVICE,\ 782 .property = "msos-desc",\ 783 .value = "no",\ 784 },\ 785 {\ 786 .driver = "PIIX4_PM",\ 787 .property = "acpi-pci-hotplug-with-bridge-support",\ 788 .value = "off",\ 789 },\ 790 {\ 791 .driver = "hpet",\ 792 .property = HPET_INTCAP,\ 793 .value = stringify(4),\ 794 }, 795 796 #define PC_COMPAT_1_6 \ 797 PC_CPU_MODEL_IDS("1.6.0") \ 798 {\ 799 .driver = "e1000",\ 800 .property = "mitigation",\ 801 .value = "off",\ 802 },{\ 803 .driver = "qemu64-" TYPE_X86_CPU,\ 804 .property = "model",\ 805 .value = stringify(2),\ 806 },{\ 807 .driver = "qemu32-" TYPE_X86_CPU,\ 808 .property = "model",\ 809 .value = stringify(3),\ 810 },{\ 811 .driver = "i440FX-pcihost",\ 812 .property = "short_root_bus",\ 813 .value = stringify(1),\ 814 },{\ 815 .driver = "q35-pcihost",\ 816 .property = "short_root_bus",\ 817 .value = stringify(1),\ 818 }, 819 820 #define PC_COMPAT_1_5 \ 821 PC_CPU_MODEL_IDS("1.5.0") \ 822 {\ 823 .driver = "Conroe-" TYPE_X86_CPU,\ 824 .property = "model",\ 825 .value = stringify(2),\ 826 },{\ 827 .driver = "Conroe-" TYPE_X86_CPU,\ 828 .property = "min-level",\ 829 .value = stringify(2),\ 830 },{\ 831 .driver = "Penryn-" TYPE_X86_CPU,\ 832 .property = "model",\ 833 .value = stringify(2),\ 834 },{\ 835 .driver = "Penryn-" TYPE_X86_CPU,\ 836 .property = "min-level",\ 837 .value = stringify(2),\ 838 },{\ 839 .driver = "Nehalem-" TYPE_X86_CPU,\ 840 .property = "model",\ 841 .value = stringify(2),\ 842 },{\ 843 .driver = "Nehalem-" TYPE_X86_CPU,\ 844 .property = "min-level",\ 845 .value = stringify(2),\ 846 },{\ 847 .driver = "virtio-net-pci",\ 848 .property = "any_layout",\ 849 .value = "off",\ 850 },{\ 851 .driver = TYPE_X86_CPU,\ 852 .property = "pmu",\ 853 .value = "on",\ 854 },{\ 855 .driver = "i440FX-pcihost",\ 856 .property = "short_root_bus",\ 857 .value = stringify(0),\ 858 },{\ 859 .driver = "q35-pcihost",\ 860 .property = "short_root_bus",\ 861 .value = stringify(0),\ 862 }, 863 864 #define PC_COMPAT_1_4 \ 865 PC_CPU_MODEL_IDS("1.4.0") \ 866 {\ 867 .driver = "scsi-hd",\ 868 .property = "discard_granularity",\ 869 .value = stringify(0),\ 870 },{\ 871 .driver = "scsi-cd",\ 872 .property = "discard_granularity",\ 873 .value = stringify(0),\ 874 },{\ 875 .driver = "scsi-disk",\ 876 .property = "discard_granularity",\ 877 .value = stringify(0),\ 878 },{\ 879 .driver = "ide-hd",\ 880 .property = "discard_granularity",\ 881 .value = stringify(0),\ 882 },{\ 883 .driver = "ide-cd",\ 884 .property = "discard_granularity",\ 885 .value = stringify(0),\ 886 },{\ 887 .driver = "ide-drive",\ 888 .property = "discard_granularity",\ 889 .value = stringify(0),\ 890 },{\ 891 .driver = "virtio-blk-pci",\ 892 .property = "discard_granularity",\ 893 .value = stringify(0),\ 894 },{\ 895 .driver = "virtio-serial-pci",\ 896 .property = "vectors",\ 897 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 898 .value = stringify(0xFFFFFFFF),\ 899 },{ \ 900 .driver = "virtio-net-pci", \ 901 .property = "ctrl_guest_offloads", \ 902 .value = "off", \ 903 },{\ 904 .driver = "e1000",\ 905 .property = "romfile",\ 906 .value = "pxe-e1000.rom",\ 907 },{\ 908 .driver = "ne2k_pci",\ 909 .property = "romfile",\ 910 .value = "pxe-ne2k_pci.rom",\ 911 },{\ 912 .driver = "pcnet",\ 913 .property = "romfile",\ 914 .value = "pxe-pcnet.rom",\ 915 },{\ 916 .driver = "rtl8139",\ 917 .property = "romfile",\ 918 .value = "pxe-rtl8139.rom",\ 919 },{\ 920 .driver = "virtio-net-pci",\ 921 .property = "romfile",\ 922 .value = "pxe-virtio.rom",\ 923 },{\ 924 .driver = "486-" TYPE_X86_CPU,\ 925 .property = "model",\ 926 .value = stringify(0),\ 927 },\ 928 {\ 929 .driver = "n270" "-" TYPE_X86_CPU,\ 930 .property = "movbe",\ 931 .value = "off",\ 932 },\ 933 {\ 934 .driver = "Westmere" "-" TYPE_X86_CPU,\ 935 .property = "pclmulqdq",\ 936 .value = "off",\ 937 }, 938 939 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 940 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 941 { \ 942 MachineClass *mc = MACHINE_CLASS(oc); \ 943 optsfn(mc); \ 944 mc->init = initfn; \ 945 } \ 946 static const TypeInfo pc_machine_type_##suffix = { \ 947 .name = namestr TYPE_MACHINE_SUFFIX, \ 948 .parent = TYPE_PC_MACHINE, \ 949 .class_init = pc_machine_##suffix##_class_init, \ 950 }; \ 951 static void pc_machine_init_##suffix(void) \ 952 { \ 953 type_register(&pc_machine_type_##suffix); \ 954 } \ 955 type_init(pc_machine_init_##suffix) 956 957 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 958 #endif 959