1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 #include "hw/compat.h" 18 #include "hw/mem/pc-dimm.h" 19 #include "hw/mem/nvdimm.h" 20 #include "hw/acpi/acpi_dev_interface.h" 21 22 #define HPET_INTCAP "hpet-intcap" 23 24 #ifdef CONFIG_KVM 25 #define kvm_pit_in_kernel() \ 26 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 27 #define kvm_pic_in_kernel() \ 28 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 29 #define kvm_ioapic_in_kernel() \ 30 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 31 #else 32 #define kvm_pit_in_kernel() 0 33 #define kvm_pic_in_kernel() 0 34 #define kvm_ioapic_in_kernel() 0 35 #endif 36 37 /** 38 * PCMachineState: 39 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 40 */ 41 struct PCMachineState { 42 /*< private >*/ 43 MachineState parent_obj; 44 45 /* <public> */ 46 47 /* State for other subsystems/APIs: */ 48 MemoryHotplugState hotplug_memory; 49 Notifier machine_done; 50 51 /* Pointers to devices and objects: */ 52 HotplugHandler *acpi_dev; 53 ISADevice *rtc; 54 PCIBus *bus; 55 FWCfgState *fw_cfg; 56 qemu_irq *gsi; 57 58 /* Configuration options: */ 59 uint64_t max_ram_below_4g; 60 OnOffAuto vmport; 61 OnOffAuto smm; 62 63 AcpiNVDIMMState acpi_nvdimm_state; 64 65 /* RAM information (sizes, addresses, configuration): */ 66 ram_addr_t below_4g_mem_size, above_4g_mem_size; 67 68 /* CPU and apic information: */ 69 bool apic_xrupt_override; 70 unsigned apic_id_limit; 71 CPUArchIdList *possible_cpus; 72 73 /* NUMA information: */ 74 uint64_t numa_nodes; 75 uint64_t *node_mem; 76 77 /* Address space used by IOAPIC device. All IOAPIC interrupts 78 * will be translated to MSI messages in the address space. */ 79 AddressSpace *ioapic_as; 80 }; 81 82 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 83 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 84 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 85 #define PC_MACHINE_VMPORT "vmport" 86 #define PC_MACHINE_SMM "smm" 87 #define PC_MACHINE_NVDIMM "nvdimm" 88 89 /** 90 * PCMachineClass: 91 * 92 * Methods: 93 * 94 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 95 * 96 * Compat fields: 97 * 98 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 99 * backend's alignment value if provided 100 * @acpi_data_size: Size of the chunk of memory at the top of RAM 101 * for the BIOS ACPI tables and other BIOS 102 * datastructures. 103 * @gigabyte_align: Make sure that guest addresses aligned at 104 * 1Gbyte boundaries get mapped to host 105 * addresses aligned at 1Gbyte boundaries. This 106 * way we can use 1GByte pages in the host. 107 * 108 */ 109 struct PCMachineClass { 110 /*< private >*/ 111 MachineClass parent_class; 112 113 /*< public >*/ 114 115 /* Methods: */ 116 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 117 DeviceState *dev); 118 119 /* Device configuration: */ 120 bool pci_enabled; 121 bool kvmclock_enabled; 122 123 /* Compat options: */ 124 125 /* ACPI compat: */ 126 bool has_acpi_build; 127 bool rsdp_in_ram; 128 int legacy_acpi_table_size; 129 unsigned acpi_data_size; 130 131 /* SMBIOS compat: */ 132 bool smbios_defaults; 133 bool smbios_legacy_mode; 134 bool smbios_uuid_encoded; 135 136 /* RAM / address space compat: */ 137 bool gigabyte_align; 138 bool has_reserved_memory; 139 bool enforce_aligned_dimm; 140 bool broken_reserved_end; 141 142 /* TSC rate migration: */ 143 bool save_tsc_khz; 144 /* generate legacy CPU hotplug AML */ 145 bool legacy_cpu_hotplug; 146 }; 147 148 #define TYPE_PC_MACHINE "generic-pc-machine" 149 #define PC_MACHINE(obj) \ 150 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 151 #define PC_MACHINE_GET_CLASS(obj) \ 152 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 153 #define PC_MACHINE_CLASS(klass) \ 154 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 155 156 /* PC-style peripherals (also used by other machines). */ 157 158 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 159 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 160 #define ACPI_PM_PROP_S4_VAL "s4_val" 161 #define ACPI_PM_PROP_SCI_INT "sci_int" 162 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 163 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 164 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 165 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 166 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 167 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 168 169 /* parallel.c */ 170 171 void parallel_hds_isa_init(ISABus *bus, int n); 172 173 bool parallel_mm_init(MemoryRegion *address_space, 174 hwaddr base, int it_shift, qemu_irq irq, 175 CharDriverState *chr); 176 177 /* i8259.c */ 178 179 extern DeviceState *isa_pic; 180 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 181 qemu_irq *kvm_i8259_init(ISABus *bus); 182 int pic_read_irq(DeviceState *d); 183 int pic_get_output(DeviceState *d); 184 void hmp_info_pic(Monitor *mon, const QDict *qdict); 185 void hmp_info_irq(Monitor *mon, const QDict *qdict); 186 187 /* ioapic.c */ 188 189 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 190 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 191 192 /* Global System Interrupts */ 193 194 #define GSI_NUM_PINS IOAPIC_NUM_PINS 195 196 typedef struct GSIState { 197 qemu_irq i8259_irq[ISA_NUM_IRQS]; 198 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 199 } GSIState; 200 201 void gsi_handler(void *opaque, int n, int level); 202 203 /* vmport.c */ 204 #define TYPE_VMPORT "vmport" 205 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 206 207 static inline void vmport_init(ISABus *bus) 208 { 209 isa_create_simple(bus, TYPE_VMPORT); 210 } 211 212 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 213 void vmmouse_get_data(uint32_t *data); 214 void vmmouse_set_data(const uint32_t *data); 215 216 /* pckbd.c */ 217 #define I8042_A20_LINE "a20" 218 219 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 220 MemoryRegion *region, ram_addr_t size, 221 hwaddr mask); 222 void i8042_isa_mouse_fake_event(void *opaque); 223 void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); 224 225 /* pc.c */ 226 extern int fd_bootchk; 227 228 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 229 void pc_register_ferr_irq(qemu_irq irq); 230 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 231 232 void pc_cpus_init(PCMachineState *pcms); 233 void pc_hot_add_cpu(const int64_t id, Error **errp); 234 void pc_acpi_init(const char *default_dsdt); 235 236 void pc_guest_info_init(PCMachineState *pcms); 237 238 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 239 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 240 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 241 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 242 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 243 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 244 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 245 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 246 247 248 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 249 MemoryRegion *pci_address_space); 250 251 void xen_load_linux(PCMachineState *pcms); 252 void pc_memory_init(PCMachineState *pcms, 253 MemoryRegion *system_memory, 254 MemoryRegion *rom_memory, 255 MemoryRegion **ram_memory); 256 qemu_irq pc_allocate_cpu_irq(void); 257 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 258 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 259 ISADevice **rtc_state, 260 bool create_fdctrl, 261 bool no_vmport, 262 uint32_t hpet_irqs); 263 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 264 void pc_cmos_init(PCMachineState *pcms, 265 BusState *ide0, BusState *ide1, 266 ISADevice *s); 267 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 268 void pc_pci_device_init(PCIBus *pci_bus); 269 270 typedef void (*cpu_set_smm_t)(int smm, void *arg); 271 272 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 273 274 ISADevice *pc_find_fdc0(void); 275 int cmos_get_fd_drive_type(FloppyDriveType fd0); 276 277 #define FW_CFG_IO_BASE 0x510 278 279 #define PORT92_A20_LINE "a20" 280 281 /* acpi_piix.c */ 282 283 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 284 qemu_irq sci_irq, qemu_irq smi_irq, 285 int smm_enabled, DeviceState **piix4_pm); 286 287 /* hpet.c */ 288 extern int no_hpet; 289 290 /* piix_pci.c */ 291 struct PCII440FXState; 292 typedef struct PCII440FXState PCII440FXState; 293 294 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 295 #define TYPE_I440FX_PCI_DEVICE "i440FX" 296 297 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 298 299 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 300 PCII440FXState **pi440fx_state, int *piix_devfn, 301 ISABus **isa_bus, qemu_irq *pic, 302 MemoryRegion *address_space_mem, 303 MemoryRegion *address_space_io, 304 ram_addr_t ram_size, 305 ram_addr_t below_4g_mem_size, 306 ram_addr_t above_4g_mem_size, 307 MemoryRegion *pci_memory, 308 MemoryRegion *ram_memory); 309 310 PCIBus *find_i440fx(void); 311 /* piix4.c */ 312 extern PCIDevice *piix4_dev; 313 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 314 315 /* vga.c */ 316 enum vga_retrace_method { 317 VGA_RETRACE_DUMB, 318 VGA_RETRACE_PRECISE 319 }; 320 321 extern enum vga_retrace_method vga_retrace_method; 322 323 int isa_vga_mm_init(hwaddr vram_base, 324 hwaddr ctrl_base, int it_shift, 325 MemoryRegion *address_space); 326 327 /* ne2000.c */ 328 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 329 { 330 DeviceState *dev; 331 ISADevice *isadev; 332 333 qemu_check_nic_model(nd, "ne2k_isa"); 334 335 isadev = isa_try_create(bus, "ne2k_isa"); 336 if (!isadev) { 337 return false; 338 } 339 dev = DEVICE(isadev); 340 qdev_prop_set_uint32(dev, "iobase", base); 341 qdev_prop_set_uint32(dev, "irq", irq); 342 qdev_set_nic_properties(dev, nd); 343 qdev_init_nofail(dev); 344 return true; 345 } 346 347 /* pc_sysfw.c */ 348 void pc_system_firmware_init(MemoryRegion *rom_memory, 349 bool isapc_ram_fw); 350 351 /* pvpanic.c */ 352 uint16_t pvpanic_port(void); 353 354 /* acpi-build.c */ 355 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 356 CPUArchIdList *apic_ids, GArray *entry); 357 358 /* e820 types */ 359 #define E820_RAM 1 360 #define E820_RESERVED 2 361 #define E820_ACPI 3 362 #define E820_NVS 4 363 #define E820_UNUSABLE 5 364 365 int e820_add_entry(uint64_t, uint64_t, uint32_t); 366 int e820_get_num_entries(void); 367 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 368 369 #define PC_COMPAT_2_8 \ 370 {\ 371 .driver = TYPE_X86_CPU,\ 372 .property = "l3-cache",\ 373 .value = "off",\ 374 }, 375 376 377 #define PC_COMPAT_2_7 \ 378 PC_COMPAT_2_8 \ 379 HW_COMPAT_2_7 380 381 #define PC_COMPAT_2_6 \ 382 HW_COMPAT_2_6 \ 383 {\ 384 .driver = "fw_cfg_io",\ 385 .property = "dma_enabled",\ 386 .value = "off",\ 387 },{\ 388 .driver = TYPE_X86_CPU,\ 389 .property = "cpuid-0xb",\ 390 .value = "off",\ 391 },{\ 392 .driver = "vmxnet3",\ 393 .property = "romfile",\ 394 .value = "",\ 395 },\ 396 {\ 397 .driver = TYPE_X86_CPU,\ 398 .property = "fill-mtrr-mask",\ 399 .value = "off",\ 400 },\ 401 {\ 402 .driver = "apic-common",\ 403 .property = "legacy-instance-id",\ 404 .value = "on",\ 405 }, 406 407 #define PC_COMPAT_2_5 \ 408 PC_COMPAT_2_6 \ 409 HW_COMPAT_2_5 410 411 /* Helper for setting model-id for CPU models that changed model-id 412 * depending on QEMU versions up to QEMU 2.4. 413 */ 414 #define PC_CPU_MODEL_IDS(v) \ 415 {\ 416 .driver = "qemu32-" TYPE_X86_CPU,\ 417 .property = "model-id",\ 418 .value = "QEMU Virtual CPU version " v,\ 419 },\ 420 {\ 421 .driver = "qemu64-" TYPE_X86_CPU,\ 422 .property = "model-id",\ 423 .value = "QEMU Virtual CPU version " v,\ 424 },\ 425 {\ 426 .driver = "athlon-" TYPE_X86_CPU,\ 427 .property = "model-id",\ 428 .value = "QEMU Virtual CPU version " v,\ 429 }, 430 431 #define PC_COMPAT_2_4 \ 432 HW_COMPAT_2_4 \ 433 PC_CPU_MODEL_IDS("2.4.0") \ 434 {\ 435 .driver = "Haswell-" TYPE_X86_CPU,\ 436 .property = "abm",\ 437 .value = "off",\ 438 },\ 439 {\ 440 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 441 .property = "abm",\ 442 .value = "off",\ 443 },\ 444 {\ 445 .driver = "Broadwell-" TYPE_X86_CPU,\ 446 .property = "abm",\ 447 .value = "off",\ 448 },\ 449 {\ 450 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 451 .property = "abm",\ 452 .value = "off",\ 453 },\ 454 {\ 455 .driver = "host" "-" TYPE_X86_CPU,\ 456 .property = "host-cache-info",\ 457 .value = "on",\ 458 },\ 459 {\ 460 .driver = TYPE_X86_CPU,\ 461 .property = "check",\ 462 .value = "off",\ 463 },\ 464 {\ 465 .driver = "qemu64" "-" TYPE_X86_CPU,\ 466 .property = "sse4a",\ 467 .value = "on",\ 468 },\ 469 {\ 470 .driver = "qemu64" "-" TYPE_X86_CPU,\ 471 .property = "abm",\ 472 .value = "on",\ 473 },\ 474 {\ 475 .driver = "qemu64" "-" TYPE_X86_CPU,\ 476 .property = "popcnt",\ 477 .value = "on",\ 478 },\ 479 {\ 480 .driver = "qemu32" "-" TYPE_X86_CPU,\ 481 .property = "popcnt",\ 482 .value = "on",\ 483 },{\ 484 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 485 .property = "rdtscp",\ 486 .value = "on",\ 487 },{\ 488 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 489 .property = "rdtscp",\ 490 .value = "on",\ 491 },{\ 492 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 493 .property = "rdtscp",\ 494 .value = "on",\ 495 },{\ 496 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 497 .property = "rdtscp",\ 498 .value = "on",\ 499 }, 500 501 502 #define PC_COMPAT_2_3 \ 503 HW_COMPAT_2_3 \ 504 PC_CPU_MODEL_IDS("2.3.0") \ 505 {\ 506 .driver = TYPE_X86_CPU,\ 507 .property = "arat",\ 508 .value = "off",\ 509 },{\ 510 .driver = "qemu64" "-" TYPE_X86_CPU,\ 511 .property = "level",\ 512 .value = stringify(4),\ 513 },{\ 514 .driver = "kvm64" "-" TYPE_X86_CPU,\ 515 .property = "level",\ 516 .value = stringify(5),\ 517 },{\ 518 .driver = "pentium3" "-" TYPE_X86_CPU,\ 519 .property = "level",\ 520 .value = stringify(2),\ 521 },{\ 522 .driver = "n270" "-" TYPE_X86_CPU,\ 523 .property = "level",\ 524 .value = stringify(5),\ 525 },{\ 526 .driver = "Conroe" "-" TYPE_X86_CPU,\ 527 .property = "level",\ 528 .value = stringify(4),\ 529 },{\ 530 .driver = "Penryn" "-" TYPE_X86_CPU,\ 531 .property = "level",\ 532 .value = stringify(4),\ 533 },{\ 534 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 535 .property = "level",\ 536 .value = stringify(4),\ 537 },{\ 538 .driver = "n270" "-" TYPE_X86_CPU,\ 539 .property = "xlevel",\ 540 .value = stringify(0x8000000a),\ 541 },{\ 542 .driver = "Penryn" "-" TYPE_X86_CPU,\ 543 .property = "xlevel",\ 544 .value = stringify(0x8000000a),\ 545 },{\ 546 .driver = "Conroe" "-" TYPE_X86_CPU,\ 547 .property = "xlevel",\ 548 .value = stringify(0x8000000a),\ 549 },{\ 550 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 551 .property = "xlevel",\ 552 .value = stringify(0x8000000a),\ 553 },{\ 554 .driver = "Westmere" "-" TYPE_X86_CPU,\ 555 .property = "xlevel",\ 556 .value = stringify(0x8000000a),\ 557 },{\ 558 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 559 .property = "xlevel",\ 560 .value = stringify(0x8000000a),\ 561 },{\ 562 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 563 .property = "xlevel",\ 564 .value = stringify(0x8000000a),\ 565 },{\ 566 .driver = "Haswell" "-" TYPE_X86_CPU,\ 567 .property = "xlevel",\ 568 .value = stringify(0x8000000a),\ 569 },{\ 570 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 571 .property = "xlevel",\ 572 .value = stringify(0x8000000a),\ 573 },{\ 574 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 575 .property = "xlevel",\ 576 .value = stringify(0x8000000a),\ 577 },{\ 578 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 579 .property = "xlevel",\ 580 .value = stringify(0x8000000a),\ 581 }, 582 583 #define PC_COMPAT_2_2 \ 584 HW_COMPAT_2_2 \ 585 PC_CPU_MODEL_IDS("2.3.0") \ 586 {\ 587 .driver = "kvm64" "-" TYPE_X86_CPU,\ 588 .property = "vme",\ 589 .value = "off",\ 590 },\ 591 {\ 592 .driver = "kvm32" "-" TYPE_X86_CPU,\ 593 .property = "vme",\ 594 .value = "off",\ 595 },\ 596 {\ 597 .driver = "Conroe" "-" TYPE_X86_CPU,\ 598 .property = "vme",\ 599 .value = "off",\ 600 },\ 601 {\ 602 .driver = "Penryn" "-" TYPE_X86_CPU,\ 603 .property = "vme",\ 604 .value = "off",\ 605 },\ 606 {\ 607 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 608 .property = "vme",\ 609 .value = "off",\ 610 },\ 611 {\ 612 .driver = "Westmere" "-" TYPE_X86_CPU,\ 613 .property = "vme",\ 614 .value = "off",\ 615 },\ 616 {\ 617 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 618 .property = "vme",\ 619 .value = "off",\ 620 },\ 621 {\ 622 .driver = "Haswell" "-" TYPE_X86_CPU,\ 623 .property = "vme",\ 624 .value = "off",\ 625 },\ 626 {\ 627 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 628 .property = "vme",\ 629 .value = "off",\ 630 },\ 631 {\ 632 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 633 .property = "vme",\ 634 .value = "off",\ 635 },\ 636 {\ 637 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 638 .property = "vme",\ 639 .value = "off",\ 640 },\ 641 {\ 642 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 643 .property = "vme",\ 644 .value = "off",\ 645 },\ 646 {\ 647 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 648 .property = "vme",\ 649 .value = "off",\ 650 },\ 651 {\ 652 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 653 .property = "vme",\ 654 .value = "off",\ 655 },\ 656 {\ 657 .driver = "Haswell" "-" TYPE_X86_CPU,\ 658 .property = "f16c",\ 659 .value = "off",\ 660 },\ 661 {\ 662 .driver = "Haswell" "-" TYPE_X86_CPU,\ 663 .property = "rdrand",\ 664 .value = "off",\ 665 },\ 666 {\ 667 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 668 .property = "f16c",\ 669 .value = "off",\ 670 },\ 671 {\ 672 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 673 .property = "rdrand",\ 674 .value = "off",\ 675 }, 676 677 #define PC_COMPAT_2_1 \ 678 HW_COMPAT_2_1 \ 679 PC_CPU_MODEL_IDS("2.1.0") \ 680 {\ 681 .driver = "coreduo" "-" TYPE_X86_CPU,\ 682 .property = "vmx",\ 683 .value = "on",\ 684 },\ 685 {\ 686 .driver = "core2duo" "-" TYPE_X86_CPU,\ 687 .property = "vmx",\ 688 .value = "on",\ 689 }, 690 691 #define PC_COMPAT_2_0 \ 692 PC_CPU_MODEL_IDS("2.0.0") \ 693 {\ 694 .driver = "virtio-scsi-pci",\ 695 .property = "any_layout",\ 696 .value = "off",\ 697 },{\ 698 .driver = "PIIX4_PM",\ 699 .property = "memory-hotplug-support",\ 700 .value = "off",\ 701 },\ 702 {\ 703 .driver = "apic",\ 704 .property = "version",\ 705 .value = stringify(0x11),\ 706 },\ 707 {\ 708 .driver = "nec-usb-xhci",\ 709 .property = "superspeed-ports-first",\ 710 .value = "off",\ 711 },\ 712 {\ 713 .driver = "nec-usb-xhci",\ 714 .property = "force-pcie-endcap",\ 715 .value = "on",\ 716 },\ 717 {\ 718 .driver = "pci-serial",\ 719 .property = "prog_if",\ 720 .value = stringify(0),\ 721 },\ 722 {\ 723 .driver = "pci-serial-2x",\ 724 .property = "prog_if",\ 725 .value = stringify(0),\ 726 },\ 727 {\ 728 .driver = "pci-serial-4x",\ 729 .property = "prog_if",\ 730 .value = stringify(0),\ 731 },\ 732 {\ 733 .driver = "virtio-net-pci",\ 734 .property = "guest_announce",\ 735 .value = "off",\ 736 },\ 737 {\ 738 .driver = "ICH9-LPC",\ 739 .property = "memory-hotplug-support",\ 740 .value = "off",\ 741 },{\ 742 .driver = "xio3130-downstream",\ 743 .property = COMPAT_PROP_PCP,\ 744 .value = "off",\ 745 },{\ 746 .driver = "ioh3420",\ 747 .property = COMPAT_PROP_PCP,\ 748 .value = "off",\ 749 }, 750 751 #define PC_COMPAT_1_7 \ 752 PC_CPU_MODEL_IDS("1.7.0") \ 753 {\ 754 .driver = TYPE_USB_DEVICE,\ 755 .property = "msos-desc",\ 756 .value = "no",\ 757 },\ 758 {\ 759 .driver = "PIIX4_PM",\ 760 .property = "acpi-pci-hotplug-with-bridge-support",\ 761 .value = "off",\ 762 },\ 763 {\ 764 .driver = "hpet",\ 765 .property = HPET_INTCAP,\ 766 .value = stringify(4),\ 767 }, 768 769 #define PC_COMPAT_1_6 \ 770 PC_CPU_MODEL_IDS("1.6.0") \ 771 {\ 772 .driver = "e1000",\ 773 .property = "mitigation",\ 774 .value = "off",\ 775 },{\ 776 .driver = "qemu64-" TYPE_X86_CPU,\ 777 .property = "model",\ 778 .value = stringify(2),\ 779 },{\ 780 .driver = "qemu32-" TYPE_X86_CPU,\ 781 .property = "model",\ 782 .value = stringify(3),\ 783 },{\ 784 .driver = "i440FX-pcihost",\ 785 .property = "short_root_bus",\ 786 .value = stringify(1),\ 787 },{\ 788 .driver = "q35-pcihost",\ 789 .property = "short_root_bus",\ 790 .value = stringify(1),\ 791 }, 792 793 #define PC_COMPAT_1_5 \ 794 PC_CPU_MODEL_IDS("1.5.0") \ 795 {\ 796 .driver = "Conroe-" TYPE_X86_CPU,\ 797 .property = "model",\ 798 .value = stringify(2),\ 799 },{\ 800 .driver = "Conroe-" TYPE_X86_CPU,\ 801 .property = "level",\ 802 .value = stringify(2),\ 803 },{\ 804 .driver = "Penryn-" TYPE_X86_CPU,\ 805 .property = "model",\ 806 .value = stringify(2),\ 807 },{\ 808 .driver = "Penryn-" TYPE_X86_CPU,\ 809 .property = "level",\ 810 .value = stringify(2),\ 811 },{\ 812 .driver = "Nehalem-" TYPE_X86_CPU,\ 813 .property = "model",\ 814 .value = stringify(2),\ 815 },{\ 816 .driver = "Nehalem-" TYPE_X86_CPU,\ 817 .property = "level",\ 818 .value = stringify(2),\ 819 },{\ 820 .driver = "virtio-net-pci",\ 821 .property = "any_layout",\ 822 .value = "off",\ 823 },{\ 824 .driver = TYPE_X86_CPU,\ 825 .property = "pmu",\ 826 .value = "on",\ 827 },{\ 828 .driver = "i440FX-pcihost",\ 829 .property = "short_root_bus",\ 830 .value = stringify(0),\ 831 },{\ 832 .driver = "q35-pcihost",\ 833 .property = "short_root_bus",\ 834 .value = stringify(0),\ 835 }, 836 837 #define PC_COMPAT_1_4 \ 838 PC_CPU_MODEL_IDS("1.4.0") \ 839 {\ 840 .driver = "scsi-hd",\ 841 .property = "discard_granularity",\ 842 .value = stringify(0),\ 843 },{\ 844 .driver = "scsi-cd",\ 845 .property = "discard_granularity",\ 846 .value = stringify(0),\ 847 },{\ 848 .driver = "scsi-disk",\ 849 .property = "discard_granularity",\ 850 .value = stringify(0),\ 851 },{\ 852 .driver = "ide-hd",\ 853 .property = "discard_granularity",\ 854 .value = stringify(0),\ 855 },{\ 856 .driver = "ide-cd",\ 857 .property = "discard_granularity",\ 858 .value = stringify(0),\ 859 },{\ 860 .driver = "ide-drive",\ 861 .property = "discard_granularity",\ 862 .value = stringify(0),\ 863 },{\ 864 .driver = "virtio-blk-pci",\ 865 .property = "discard_granularity",\ 866 .value = stringify(0),\ 867 },{\ 868 .driver = "virtio-serial-pci",\ 869 .property = "vectors",\ 870 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 871 .value = stringify(0xFFFFFFFF),\ 872 },{ \ 873 .driver = "virtio-net-pci", \ 874 .property = "ctrl_guest_offloads", \ 875 .value = "off", \ 876 },{\ 877 .driver = "e1000",\ 878 .property = "romfile",\ 879 .value = "pxe-e1000.rom",\ 880 },{\ 881 .driver = "ne2k_pci",\ 882 .property = "romfile",\ 883 .value = "pxe-ne2k_pci.rom",\ 884 },{\ 885 .driver = "pcnet",\ 886 .property = "romfile",\ 887 .value = "pxe-pcnet.rom",\ 888 },{\ 889 .driver = "rtl8139",\ 890 .property = "romfile",\ 891 .value = "pxe-rtl8139.rom",\ 892 },{\ 893 .driver = "virtio-net-pci",\ 894 .property = "romfile",\ 895 .value = "pxe-virtio.rom",\ 896 },{\ 897 .driver = "486-" TYPE_X86_CPU,\ 898 .property = "model",\ 899 .value = stringify(0),\ 900 },\ 901 {\ 902 .driver = "n270" "-" TYPE_X86_CPU,\ 903 .property = "movbe",\ 904 .value = "off",\ 905 },\ 906 {\ 907 .driver = "Westmere" "-" TYPE_X86_CPU,\ 908 .property = "pclmulqdq",\ 909 .value = "off",\ 910 }, 911 912 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 913 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 914 { \ 915 MachineClass *mc = MACHINE_CLASS(oc); \ 916 optsfn(mc); \ 917 mc->init = initfn; \ 918 } \ 919 static const TypeInfo pc_machine_type_##suffix = { \ 920 .name = namestr TYPE_MACHINE_SUFFIX, \ 921 .parent = TYPE_PC_MACHINE, \ 922 .class_init = pc_machine_##suffix##_class_init, \ 923 }; \ 924 static void pc_machine_init_##suffix(void) \ 925 { \ 926 type_register(&pc_machine_type_##suffix); \ 927 } \ 928 type_init(pc_machine_init_##suffix) 929 930 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 931 #endif 932