1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus; 53 bool sata; 54 bool pit; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 158 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 159 160 /* Global System Interrupts */ 161 162 #define GSI_NUM_PINS IOAPIC_NUM_PINS 163 164 typedef struct GSIState { 165 qemu_irq i8259_irq[ISA_NUM_IRQS]; 166 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 167 } GSIState; 168 169 void gsi_handler(void *opaque, int n, int level); 170 171 /* vmport.c */ 172 #define TYPE_VMPORT "vmport" 173 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 174 175 static inline void vmport_init(ISABus *bus) 176 { 177 isa_create_simple(bus, TYPE_VMPORT); 178 } 179 180 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 181 void vmmouse_get_data(uint32_t *data); 182 void vmmouse_set_data(const uint32_t *data); 183 184 /* pc.c */ 185 extern int fd_bootchk; 186 187 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 188 void pc_register_ferr_irq(qemu_irq irq); 189 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 190 191 void pc_cpus_init(PCMachineState *pcms); 192 void pc_hot_add_cpu(const int64_t id, Error **errp); 193 void pc_acpi_init(const char *default_dsdt); 194 195 void pc_guest_info_init(PCMachineState *pcms); 196 197 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 198 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 199 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 200 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 201 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 202 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 203 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 204 205 206 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 207 MemoryRegion *pci_address_space); 208 209 void xen_load_linux(PCMachineState *pcms); 210 void pc_memory_init(PCMachineState *pcms, 211 MemoryRegion *system_memory, 212 MemoryRegion *rom_memory, 213 MemoryRegion **ram_memory); 214 uint64_t pc_pci_hole64_start(void); 215 qemu_irq pc_allocate_cpu_irq(void); 216 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 217 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 218 ISADevice **rtc_state, 219 bool create_fdctrl, 220 bool no_vmport, 221 bool has_pit, 222 uint32_t hpet_irqs); 223 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 224 void pc_cmos_init(PCMachineState *pcms, 225 BusState *ide0, BusState *ide1, 226 ISADevice *s); 227 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 228 void pc_pci_device_init(PCIBus *pci_bus); 229 230 typedef void (*cpu_set_smm_t)(int smm, void *arg); 231 232 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 233 234 ISADevice *pc_find_fdc0(void); 235 int cmos_get_fd_drive_type(FloppyDriveType fd0); 236 237 #define FW_CFG_IO_BASE 0x510 238 239 #define PORT92_A20_LINE "a20" 240 241 /* acpi_piix.c */ 242 243 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 244 qemu_irq sci_irq, qemu_irq smi_irq, 245 int smm_enabled, DeviceState **piix4_pm); 246 247 /* hpet.c */ 248 extern int no_hpet; 249 250 /* piix_pci.c */ 251 struct PCII440FXState; 252 typedef struct PCII440FXState PCII440FXState; 253 254 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 255 #define TYPE_I440FX_PCI_DEVICE "i440FX" 256 257 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 258 259 /* 260 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 261 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 262 */ 263 #define RCR_IOPORT 0xcf9 264 265 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 266 PCII440FXState **pi440fx_state, int *piix_devfn, 267 ISABus **isa_bus, qemu_irq *pic, 268 MemoryRegion *address_space_mem, 269 MemoryRegion *address_space_io, 270 ram_addr_t ram_size, 271 ram_addr_t below_4g_mem_size, 272 ram_addr_t above_4g_mem_size, 273 MemoryRegion *pci_memory, 274 MemoryRegion *ram_memory); 275 276 PCIBus *find_i440fx(void); 277 /* piix4.c */ 278 extern PCIDevice *piix4_dev; 279 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 280 281 /* pc_sysfw.c */ 282 void pc_system_firmware_init(MemoryRegion *rom_memory, 283 bool isapc_ram_fw); 284 285 /* acpi-build.c */ 286 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 287 const CPUArchIdList *apic_ids, GArray *entry); 288 289 /* e820 types */ 290 #define E820_RAM 1 291 #define E820_RESERVED 2 292 #define E820_ACPI 3 293 #define E820_NVS 4 294 #define E820_UNUSABLE 5 295 296 int e820_add_entry(uint64_t, uint64_t, uint32_t); 297 int e820_get_num_entries(void); 298 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 299 300 #define PC_COMPAT_2_12 \ 301 HW_COMPAT_2_12 \ 302 {\ 303 .driver = TYPE_X86_CPU,\ 304 .property = "legacy-cache",\ 305 .value = "on",\ 306 },{\ 307 .driver = TYPE_X86_CPU,\ 308 .property = "topoext",\ 309 .value = "off",\ 310 },{\ 311 .driver = "EPYC-" TYPE_X86_CPU,\ 312 .property = "xlevel",\ 313 .value = stringify(0x8000000a),\ 314 },{\ 315 .driver = "EPYC-IBPB" TYPE_X86_CPU,\ 316 .property = "xlevel",\ 317 .value = stringify(0x8000000a),\ 318 }, 319 320 #define PC_COMPAT_2_11 \ 321 HW_COMPAT_2_11 \ 322 {\ 323 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 324 .property = "clflushopt",\ 325 .value = "off",\ 326 }, 327 328 #define PC_COMPAT_2_10 \ 329 HW_COMPAT_2_10 \ 330 {\ 331 .driver = TYPE_X86_CPU,\ 332 .property = "x-hv-max-vps",\ 333 .value = "0x40",\ 334 },{\ 335 .driver = "i440FX-pcihost",\ 336 .property = "x-pci-hole64-fix",\ 337 .value = "off",\ 338 },{\ 339 .driver = "q35-pcihost",\ 340 .property = "x-pci-hole64-fix",\ 341 .value = "off",\ 342 }, 343 344 #define PC_COMPAT_2_9 \ 345 HW_COMPAT_2_9 \ 346 {\ 347 .driver = "mch",\ 348 .property = "extended-tseg-mbytes",\ 349 .value = stringify(0),\ 350 },\ 351 352 #define PC_COMPAT_2_8 \ 353 HW_COMPAT_2_8 \ 354 {\ 355 .driver = TYPE_X86_CPU,\ 356 .property = "tcg-cpuid",\ 357 .value = "off",\ 358 },\ 359 {\ 360 .driver = "kvmclock",\ 361 .property = "x-mach-use-reliable-get-clock",\ 362 .value = "off",\ 363 },\ 364 {\ 365 .driver = "ICH9-LPC",\ 366 .property = "x-smi-broadcast",\ 367 .value = "off",\ 368 },\ 369 {\ 370 .driver = TYPE_X86_CPU,\ 371 .property = "vmware-cpuid-freq",\ 372 .value = "off",\ 373 },\ 374 {\ 375 .driver = "Haswell-" TYPE_X86_CPU,\ 376 .property = "stepping",\ 377 .value = "1",\ 378 }, 379 380 #define PC_COMPAT_2_7 \ 381 HW_COMPAT_2_7 \ 382 {\ 383 .driver = TYPE_X86_CPU,\ 384 .property = "l3-cache",\ 385 .value = "off",\ 386 },\ 387 {\ 388 .driver = TYPE_X86_CPU,\ 389 .property = "full-cpuid-auto-level",\ 390 .value = "off",\ 391 },\ 392 {\ 393 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 394 .property = "family",\ 395 .value = "15",\ 396 },\ 397 {\ 398 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 399 .property = "model",\ 400 .value = "6",\ 401 },\ 402 {\ 403 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 404 .property = "stepping",\ 405 .value = "1",\ 406 },\ 407 {\ 408 .driver = "isa-pcspk",\ 409 .property = "migrate",\ 410 .value = "off",\ 411 }, 412 413 #define PC_COMPAT_2_6 \ 414 HW_COMPAT_2_6 \ 415 {\ 416 .driver = TYPE_X86_CPU,\ 417 .property = "cpuid-0xb",\ 418 .value = "off",\ 419 },{\ 420 .driver = "vmxnet3",\ 421 .property = "romfile",\ 422 .value = "",\ 423 },\ 424 {\ 425 .driver = TYPE_X86_CPU,\ 426 .property = "fill-mtrr-mask",\ 427 .value = "off",\ 428 },\ 429 {\ 430 .driver = "apic-common",\ 431 .property = "legacy-instance-id",\ 432 .value = "on",\ 433 }, 434 435 #define PC_COMPAT_2_5 \ 436 HW_COMPAT_2_5 437 438 /* Helper for setting model-id for CPU models that changed model-id 439 * depending on QEMU versions up to QEMU 2.4. 440 */ 441 #define PC_CPU_MODEL_IDS(v) \ 442 {\ 443 .driver = "qemu32-" TYPE_X86_CPU,\ 444 .property = "model-id",\ 445 .value = "QEMU Virtual CPU version " v,\ 446 },\ 447 {\ 448 .driver = "qemu64-" TYPE_X86_CPU,\ 449 .property = "model-id",\ 450 .value = "QEMU Virtual CPU version " v,\ 451 },\ 452 {\ 453 .driver = "athlon-" TYPE_X86_CPU,\ 454 .property = "model-id",\ 455 .value = "QEMU Virtual CPU version " v,\ 456 }, 457 458 #define PC_COMPAT_2_4 \ 459 HW_COMPAT_2_4 \ 460 PC_CPU_MODEL_IDS("2.4.0") \ 461 {\ 462 .driver = "Haswell-" TYPE_X86_CPU,\ 463 .property = "abm",\ 464 .value = "off",\ 465 },\ 466 {\ 467 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 468 .property = "abm",\ 469 .value = "off",\ 470 },\ 471 {\ 472 .driver = "Broadwell-" TYPE_X86_CPU,\ 473 .property = "abm",\ 474 .value = "off",\ 475 },\ 476 {\ 477 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 478 .property = "abm",\ 479 .value = "off",\ 480 },\ 481 {\ 482 .driver = "host" "-" TYPE_X86_CPU,\ 483 .property = "host-cache-info",\ 484 .value = "on",\ 485 },\ 486 {\ 487 .driver = TYPE_X86_CPU,\ 488 .property = "check",\ 489 .value = "off",\ 490 },\ 491 {\ 492 .driver = "qemu64" "-" TYPE_X86_CPU,\ 493 .property = "sse4a",\ 494 .value = "on",\ 495 },\ 496 {\ 497 .driver = "qemu64" "-" TYPE_X86_CPU,\ 498 .property = "abm",\ 499 .value = "on",\ 500 },\ 501 {\ 502 .driver = "qemu64" "-" TYPE_X86_CPU,\ 503 .property = "popcnt",\ 504 .value = "on",\ 505 },\ 506 {\ 507 .driver = "qemu32" "-" TYPE_X86_CPU,\ 508 .property = "popcnt",\ 509 .value = "on",\ 510 },{\ 511 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 512 .property = "rdtscp",\ 513 .value = "on",\ 514 },{\ 515 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 516 .property = "rdtscp",\ 517 .value = "on",\ 518 },{\ 519 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 520 .property = "rdtscp",\ 521 .value = "on",\ 522 },{\ 523 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 524 .property = "rdtscp",\ 525 .value = "on",\ 526 }, 527 528 529 #define PC_COMPAT_2_3 \ 530 HW_COMPAT_2_3 \ 531 PC_CPU_MODEL_IDS("2.3.0") \ 532 {\ 533 .driver = TYPE_X86_CPU,\ 534 .property = "arat",\ 535 .value = "off",\ 536 },{\ 537 .driver = "qemu64" "-" TYPE_X86_CPU,\ 538 .property = "min-level",\ 539 .value = stringify(4),\ 540 },{\ 541 .driver = "kvm64" "-" TYPE_X86_CPU,\ 542 .property = "min-level",\ 543 .value = stringify(5),\ 544 },{\ 545 .driver = "pentium3" "-" TYPE_X86_CPU,\ 546 .property = "min-level",\ 547 .value = stringify(2),\ 548 },{\ 549 .driver = "n270" "-" TYPE_X86_CPU,\ 550 .property = "min-level",\ 551 .value = stringify(5),\ 552 },{\ 553 .driver = "Conroe" "-" TYPE_X86_CPU,\ 554 .property = "min-level",\ 555 .value = stringify(4),\ 556 },{\ 557 .driver = "Penryn" "-" TYPE_X86_CPU,\ 558 .property = "min-level",\ 559 .value = stringify(4),\ 560 },{\ 561 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 562 .property = "min-level",\ 563 .value = stringify(4),\ 564 },{\ 565 .driver = "n270" "-" TYPE_X86_CPU,\ 566 .property = "min-xlevel",\ 567 .value = stringify(0x8000000a),\ 568 },{\ 569 .driver = "Penryn" "-" TYPE_X86_CPU,\ 570 .property = "min-xlevel",\ 571 .value = stringify(0x8000000a),\ 572 },{\ 573 .driver = "Conroe" "-" TYPE_X86_CPU,\ 574 .property = "min-xlevel",\ 575 .value = stringify(0x8000000a),\ 576 },{\ 577 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 578 .property = "min-xlevel",\ 579 .value = stringify(0x8000000a),\ 580 },{\ 581 .driver = "Westmere" "-" TYPE_X86_CPU,\ 582 .property = "min-xlevel",\ 583 .value = stringify(0x8000000a),\ 584 },{\ 585 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 586 .property = "min-xlevel",\ 587 .value = stringify(0x8000000a),\ 588 },{\ 589 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 590 .property = "min-xlevel",\ 591 .value = stringify(0x8000000a),\ 592 },{\ 593 .driver = "Haswell" "-" TYPE_X86_CPU,\ 594 .property = "min-xlevel",\ 595 .value = stringify(0x8000000a),\ 596 },{\ 597 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 598 .property = "min-xlevel",\ 599 .value = stringify(0x8000000a),\ 600 },{\ 601 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 602 .property = "min-xlevel",\ 603 .value = stringify(0x8000000a),\ 604 },{\ 605 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 606 .property = "min-xlevel",\ 607 .value = stringify(0x8000000a),\ 608 },{\ 609 .driver = TYPE_X86_CPU,\ 610 .property = "kvm-no-smi-migration",\ 611 .value = "on",\ 612 }, 613 614 #define PC_COMPAT_2_2 \ 615 HW_COMPAT_2_2 \ 616 PC_CPU_MODEL_IDS("2.2.0") \ 617 {\ 618 .driver = "kvm64" "-" TYPE_X86_CPU,\ 619 .property = "vme",\ 620 .value = "off",\ 621 },\ 622 {\ 623 .driver = "kvm32" "-" TYPE_X86_CPU,\ 624 .property = "vme",\ 625 .value = "off",\ 626 },\ 627 {\ 628 .driver = "Conroe" "-" TYPE_X86_CPU,\ 629 .property = "vme",\ 630 .value = "off",\ 631 },\ 632 {\ 633 .driver = "Penryn" "-" TYPE_X86_CPU,\ 634 .property = "vme",\ 635 .value = "off",\ 636 },\ 637 {\ 638 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 639 .property = "vme",\ 640 .value = "off",\ 641 },\ 642 {\ 643 .driver = "Westmere" "-" TYPE_X86_CPU,\ 644 .property = "vme",\ 645 .value = "off",\ 646 },\ 647 {\ 648 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 649 .property = "vme",\ 650 .value = "off",\ 651 },\ 652 {\ 653 .driver = "Haswell" "-" TYPE_X86_CPU,\ 654 .property = "vme",\ 655 .value = "off",\ 656 },\ 657 {\ 658 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 659 .property = "vme",\ 660 .value = "off",\ 661 },\ 662 {\ 663 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 664 .property = "vme",\ 665 .value = "off",\ 666 },\ 667 {\ 668 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 669 .property = "vme",\ 670 .value = "off",\ 671 },\ 672 {\ 673 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 674 .property = "vme",\ 675 .value = "off",\ 676 },\ 677 {\ 678 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 679 .property = "vme",\ 680 .value = "off",\ 681 },\ 682 {\ 683 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 684 .property = "vme",\ 685 .value = "off",\ 686 },\ 687 {\ 688 .driver = "Haswell" "-" TYPE_X86_CPU,\ 689 .property = "f16c",\ 690 .value = "off",\ 691 },\ 692 {\ 693 .driver = "Haswell" "-" TYPE_X86_CPU,\ 694 .property = "rdrand",\ 695 .value = "off",\ 696 },\ 697 {\ 698 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 699 .property = "f16c",\ 700 .value = "off",\ 701 },\ 702 {\ 703 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 704 .property = "rdrand",\ 705 .value = "off",\ 706 }, 707 708 #define PC_COMPAT_2_1 \ 709 HW_COMPAT_2_1 \ 710 PC_CPU_MODEL_IDS("2.1.0") \ 711 {\ 712 .driver = "coreduo" "-" TYPE_X86_CPU,\ 713 .property = "vmx",\ 714 .value = "on",\ 715 },\ 716 {\ 717 .driver = "core2duo" "-" TYPE_X86_CPU,\ 718 .property = "vmx",\ 719 .value = "on",\ 720 }, 721 722 #define PC_COMPAT_2_0 \ 723 PC_CPU_MODEL_IDS("2.0.0") \ 724 {\ 725 .driver = "virtio-scsi-pci",\ 726 .property = "any_layout",\ 727 .value = "off",\ 728 },{\ 729 .driver = "PIIX4_PM",\ 730 .property = "memory-hotplug-support",\ 731 .value = "off",\ 732 },\ 733 {\ 734 .driver = "apic",\ 735 .property = "version",\ 736 .value = stringify(0x11),\ 737 },\ 738 {\ 739 .driver = "nec-usb-xhci",\ 740 .property = "superspeed-ports-first",\ 741 .value = "off",\ 742 },\ 743 {\ 744 .driver = "nec-usb-xhci",\ 745 .property = "force-pcie-endcap",\ 746 .value = "on",\ 747 },\ 748 {\ 749 .driver = "pci-serial",\ 750 .property = "prog_if",\ 751 .value = stringify(0),\ 752 },\ 753 {\ 754 .driver = "pci-serial-2x",\ 755 .property = "prog_if",\ 756 .value = stringify(0),\ 757 },\ 758 {\ 759 .driver = "pci-serial-4x",\ 760 .property = "prog_if",\ 761 .value = stringify(0),\ 762 },\ 763 {\ 764 .driver = "virtio-net-pci",\ 765 .property = "guest_announce",\ 766 .value = "off",\ 767 },\ 768 {\ 769 .driver = "ICH9-LPC",\ 770 .property = "memory-hotplug-support",\ 771 .value = "off",\ 772 },{\ 773 .driver = "xio3130-downstream",\ 774 .property = COMPAT_PROP_PCP,\ 775 .value = "off",\ 776 },{\ 777 .driver = "ioh3420",\ 778 .property = COMPAT_PROP_PCP,\ 779 .value = "off",\ 780 }, 781 782 #define PC_COMPAT_1_7 \ 783 PC_CPU_MODEL_IDS("1.7.0") \ 784 {\ 785 .driver = TYPE_USB_DEVICE,\ 786 .property = "msos-desc",\ 787 .value = "no",\ 788 },\ 789 {\ 790 .driver = "PIIX4_PM",\ 791 .property = "acpi-pci-hotplug-with-bridge-support",\ 792 .value = "off",\ 793 },\ 794 {\ 795 .driver = "hpet",\ 796 .property = HPET_INTCAP,\ 797 .value = stringify(4),\ 798 }, 799 800 #define PC_COMPAT_1_6 \ 801 PC_CPU_MODEL_IDS("1.6.0") \ 802 {\ 803 .driver = "e1000",\ 804 .property = "mitigation",\ 805 .value = "off",\ 806 },{\ 807 .driver = "qemu64-" TYPE_X86_CPU,\ 808 .property = "model",\ 809 .value = stringify(2),\ 810 },{\ 811 .driver = "qemu32-" TYPE_X86_CPU,\ 812 .property = "model",\ 813 .value = stringify(3),\ 814 },{\ 815 .driver = "i440FX-pcihost",\ 816 .property = "short_root_bus",\ 817 .value = stringify(1),\ 818 },{\ 819 .driver = "q35-pcihost",\ 820 .property = "short_root_bus",\ 821 .value = stringify(1),\ 822 }, 823 824 #define PC_COMPAT_1_5 \ 825 PC_CPU_MODEL_IDS("1.5.0") \ 826 {\ 827 .driver = "Conroe-" TYPE_X86_CPU,\ 828 .property = "model",\ 829 .value = stringify(2),\ 830 },{\ 831 .driver = "Conroe-" TYPE_X86_CPU,\ 832 .property = "min-level",\ 833 .value = stringify(2),\ 834 },{\ 835 .driver = "Penryn-" TYPE_X86_CPU,\ 836 .property = "model",\ 837 .value = stringify(2),\ 838 },{\ 839 .driver = "Penryn-" TYPE_X86_CPU,\ 840 .property = "min-level",\ 841 .value = stringify(2),\ 842 },{\ 843 .driver = "Nehalem-" TYPE_X86_CPU,\ 844 .property = "model",\ 845 .value = stringify(2),\ 846 },{\ 847 .driver = "Nehalem-" TYPE_X86_CPU,\ 848 .property = "min-level",\ 849 .value = stringify(2),\ 850 },{\ 851 .driver = "virtio-net-pci",\ 852 .property = "any_layout",\ 853 .value = "off",\ 854 },{\ 855 .driver = TYPE_X86_CPU,\ 856 .property = "pmu",\ 857 .value = "on",\ 858 },{\ 859 .driver = "i440FX-pcihost",\ 860 .property = "short_root_bus",\ 861 .value = stringify(0),\ 862 },{\ 863 .driver = "q35-pcihost",\ 864 .property = "short_root_bus",\ 865 .value = stringify(0),\ 866 }, 867 868 #define PC_COMPAT_1_4 \ 869 PC_CPU_MODEL_IDS("1.4.0") \ 870 {\ 871 .driver = "scsi-hd",\ 872 .property = "discard_granularity",\ 873 .value = stringify(0),\ 874 },{\ 875 .driver = "scsi-cd",\ 876 .property = "discard_granularity",\ 877 .value = stringify(0),\ 878 },{\ 879 .driver = "scsi-disk",\ 880 .property = "discard_granularity",\ 881 .value = stringify(0),\ 882 },{\ 883 .driver = "ide-hd",\ 884 .property = "discard_granularity",\ 885 .value = stringify(0),\ 886 },{\ 887 .driver = "ide-cd",\ 888 .property = "discard_granularity",\ 889 .value = stringify(0),\ 890 },{\ 891 .driver = "ide-drive",\ 892 .property = "discard_granularity",\ 893 .value = stringify(0),\ 894 },{\ 895 .driver = "virtio-blk-pci",\ 896 .property = "discard_granularity",\ 897 .value = stringify(0),\ 898 },{\ 899 .driver = "virtio-serial-pci",\ 900 .property = "vectors",\ 901 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 902 .value = stringify(0xFFFFFFFF),\ 903 },{ \ 904 .driver = "virtio-net-pci", \ 905 .property = "ctrl_guest_offloads", \ 906 .value = "off", \ 907 },{\ 908 .driver = "e1000",\ 909 .property = "romfile",\ 910 .value = "pxe-e1000.rom",\ 911 },{\ 912 .driver = "ne2k_pci",\ 913 .property = "romfile",\ 914 .value = "pxe-ne2k_pci.rom",\ 915 },{\ 916 .driver = "pcnet",\ 917 .property = "romfile",\ 918 .value = "pxe-pcnet.rom",\ 919 },{\ 920 .driver = "rtl8139",\ 921 .property = "romfile",\ 922 .value = "pxe-rtl8139.rom",\ 923 },{\ 924 .driver = "virtio-net-pci",\ 925 .property = "romfile",\ 926 .value = "pxe-virtio.rom",\ 927 },{\ 928 .driver = "486-" TYPE_X86_CPU,\ 929 .property = "model",\ 930 .value = stringify(0),\ 931 },\ 932 {\ 933 .driver = "n270" "-" TYPE_X86_CPU,\ 934 .property = "movbe",\ 935 .value = "off",\ 936 },\ 937 {\ 938 .driver = "Westmere" "-" TYPE_X86_CPU,\ 939 .property = "pclmulqdq",\ 940 .value = "off",\ 941 }, 942 943 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 944 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 945 { \ 946 MachineClass *mc = MACHINE_CLASS(oc); \ 947 optsfn(mc); \ 948 mc->init = initfn; \ 949 } \ 950 static const TypeInfo pc_machine_type_##suffix = { \ 951 .name = namestr TYPE_MACHINE_SUFFIX, \ 952 .parent = TYPE_PC_MACHINE, \ 953 .class_init = pc_machine_##suffix##_class_init, \ 954 }; \ 955 static void pc_machine_init_##suffix(void) \ 956 { \ 957 type_register(&pc_machine_type_##suffix); \ 958 } \ 959 type_init(pc_machine_init_##suffix) 960 961 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 962 #endif 963