1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus_enabled; 53 bool sata_enabled; 54 bool pit_enabled; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 /* Global System Interrupts */ 158 159 #define GSI_NUM_PINS IOAPIC_NUM_PINS 160 161 typedef struct GSIState { 162 qemu_irq i8259_irq[ISA_NUM_IRQS]; 163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 164 } GSIState; 165 166 void gsi_handler(void *opaque, int n, int level); 167 168 /* vmport.c */ 169 #define TYPE_VMPORT "vmport" 170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 171 172 static inline void vmport_init(ISABus *bus) 173 { 174 isa_create_simple(bus, TYPE_VMPORT); 175 } 176 177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 178 void vmmouse_get_data(uint32_t *data); 179 void vmmouse_set_data(const uint32_t *data); 180 181 /* pc.c */ 182 extern int fd_bootchk; 183 184 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 185 void pc_register_ferr_irq(qemu_irq irq); 186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 187 188 void pc_cpus_init(PCMachineState *pcms); 189 void pc_hot_add_cpu(const int64_t id, Error **errp); 190 void pc_acpi_init(const char *default_dsdt); 191 192 void pc_guest_info_init(PCMachineState *pcms); 193 194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 201 202 203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 204 MemoryRegion *pci_address_space); 205 206 void xen_load_linux(PCMachineState *pcms); 207 void pc_memory_init(PCMachineState *pcms, 208 MemoryRegion *system_memory, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory); 211 uint64_t pc_pci_hole64_start(void); 212 qemu_irq pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 bool create_fdctrl, 217 bool no_vmport, 218 bool has_pit, 219 uint32_t hpet_irqs); 220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 221 void pc_cmos_init(PCMachineState *pcms, 222 BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 230 231 ISADevice *pc_find_fdc0(void); 232 int cmos_get_fd_drive_type(FloppyDriveType fd0); 233 234 #define FW_CFG_IO_BASE 0x510 235 236 #define PORT92_A20_LINE "a20" 237 238 /* acpi_piix.c */ 239 240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 241 qemu_irq sci_irq, qemu_irq smi_irq, 242 int smm_enabled, DeviceState **piix4_pm); 243 244 /* hpet.c */ 245 extern int no_hpet; 246 247 /* piix_pci.c */ 248 struct PCII440FXState; 249 typedef struct PCII440FXState PCII440FXState; 250 251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 252 #define TYPE_I440FX_PCI_DEVICE "i440FX" 253 254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 255 256 /* 257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 259 */ 260 #define RCR_IOPORT 0xcf9 261 262 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 263 PCII440FXState **pi440fx_state, int *piix_devfn, 264 ISABus **isa_bus, qemu_irq *pic, 265 MemoryRegion *address_space_mem, 266 MemoryRegion *address_space_io, 267 ram_addr_t ram_size, 268 ram_addr_t below_4g_mem_size, 269 ram_addr_t above_4g_mem_size, 270 MemoryRegion *pci_memory, 271 MemoryRegion *ram_memory); 272 273 PCIBus *find_i440fx(void); 274 /* piix4.c */ 275 extern PCIDevice *piix4_dev; 276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 277 278 /* pc_sysfw.c */ 279 void pc_system_firmware_init(MemoryRegion *rom_memory, 280 bool isapc_ram_fw); 281 282 /* acpi-build.c */ 283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 284 const CPUArchIdList *apic_ids, GArray *entry); 285 286 /* e820 types */ 287 #define E820_RAM 1 288 #define E820_RESERVED 2 289 #define E820_ACPI 3 290 #define E820_NVS 4 291 #define E820_UNUSABLE 5 292 293 int e820_add_entry(uint64_t, uint64_t, uint32_t); 294 int e820_get_num_entries(void); 295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 296 297 extern GlobalProperty pc_compat_3_1[]; 298 extern const size_t pc_compat_3_1_len; 299 300 extern GlobalProperty pc_compat_3_0[]; 301 extern const size_t pc_compat_3_0_len; 302 303 extern GlobalProperty pc_compat_2_12[]; 304 extern const size_t pc_compat_2_12_len; 305 306 extern GlobalProperty pc_compat_2_11[]; 307 extern const size_t pc_compat_2_11_len; 308 309 extern GlobalProperty pc_compat_2_10[]; 310 extern const size_t pc_compat_2_10_len; 311 312 #define PC_COMPAT_2_9 \ 313 HW_COMPAT_2_9 \ 314 {\ 315 .driver = "mch",\ 316 .property = "extended-tseg-mbytes",\ 317 .value = stringify(0),\ 318 },\ 319 320 #define PC_COMPAT_2_8 \ 321 HW_COMPAT_2_8 \ 322 {\ 323 .driver = TYPE_X86_CPU,\ 324 .property = "tcg-cpuid",\ 325 .value = "off",\ 326 },\ 327 {\ 328 .driver = "kvmclock",\ 329 .property = "x-mach-use-reliable-get-clock",\ 330 .value = "off",\ 331 },\ 332 {\ 333 .driver = "ICH9-LPC",\ 334 .property = "x-smi-broadcast",\ 335 .value = "off",\ 336 },\ 337 {\ 338 .driver = TYPE_X86_CPU,\ 339 .property = "vmware-cpuid-freq",\ 340 .value = "off",\ 341 },\ 342 {\ 343 .driver = "Haswell-" TYPE_X86_CPU,\ 344 .property = "stepping",\ 345 .value = "1",\ 346 }, 347 348 #define PC_COMPAT_2_7 \ 349 HW_COMPAT_2_7 \ 350 {\ 351 .driver = TYPE_X86_CPU,\ 352 .property = "l3-cache",\ 353 .value = "off",\ 354 },\ 355 {\ 356 .driver = TYPE_X86_CPU,\ 357 .property = "full-cpuid-auto-level",\ 358 .value = "off",\ 359 },\ 360 {\ 361 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 362 .property = "family",\ 363 .value = "15",\ 364 },\ 365 {\ 366 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 367 .property = "model",\ 368 .value = "6",\ 369 },\ 370 {\ 371 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 372 .property = "stepping",\ 373 .value = "1",\ 374 },\ 375 {\ 376 .driver = "isa-pcspk",\ 377 .property = "migrate",\ 378 .value = "off",\ 379 }, 380 381 #define PC_COMPAT_2_6 \ 382 HW_COMPAT_2_6 \ 383 {\ 384 .driver = TYPE_X86_CPU,\ 385 .property = "cpuid-0xb",\ 386 .value = "off",\ 387 },{\ 388 .driver = "vmxnet3",\ 389 .property = "romfile",\ 390 .value = "",\ 391 },\ 392 {\ 393 .driver = TYPE_X86_CPU,\ 394 .property = "fill-mtrr-mask",\ 395 .value = "off",\ 396 },\ 397 {\ 398 .driver = "apic-common",\ 399 .property = "legacy-instance-id",\ 400 .value = "on",\ 401 }, 402 403 #define PC_COMPAT_2_5 \ 404 HW_COMPAT_2_5 405 406 /* Helper for setting model-id for CPU models that changed model-id 407 * depending on QEMU versions up to QEMU 2.4. 408 */ 409 #define PC_CPU_MODEL_IDS(v) \ 410 {\ 411 .driver = "qemu32-" TYPE_X86_CPU,\ 412 .property = "model-id",\ 413 .value = "QEMU Virtual CPU version " v,\ 414 },\ 415 {\ 416 .driver = "qemu64-" TYPE_X86_CPU,\ 417 .property = "model-id",\ 418 .value = "QEMU Virtual CPU version " v,\ 419 },\ 420 {\ 421 .driver = "athlon-" TYPE_X86_CPU,\ 422 .property = "model-id",\ 423 .value = "QEMU Virtual CPU version " v,\ 424 }, 425 426 #define PC_COMPAT_2_4 \ 427 HW_COMPAT_2_4 \ 428 PC_CPU_MODEL_IDS("2.4.0") \ 429 {\ 430 .driver = "Haswell-" TYPE_X86_CPU,\ 431 .property = "abm",\ 432 .value = "off",\ 433 },\ 434 {\ 435 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 436 .property = "abm",\ 437 .value = "off",\ 438 },\ 439 {\ 440 .driver = "Broadwell-" TYPE_X86_CPU,\ 441 .property = "abm",\ 442 .value = "off",\ 443 },\ 444 {\ 445 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 446 .property = "abm",\ 447 .value = "off",\ 448 },\ 449 {\ 450 .driver = "host" "-" TYPE_X86_CPU,\ 451 .property = "host-cache-info",\ 452 .value = "on",\ 453 },\ 454 {\ 455 .driver = TYPE_X86_CPU,\ 456 .property = "check",\ 457 .value = "off",\ 458 },\ 459 {\ 460 .driver = "qemu64" "-" TYPE_X86_CPU,\ 461 .property = "sse4a",\ 462 .value = "on",\ 463 },\ 464 {\ 465 .driver = "qemu64" "-" TYPE_X86_CPU,\ 466 .property = "abm",\ 467 .value = "on",\ 468 },\ 469 {\ 470 .driver = "qemu64" "-" TYPE_X86_CPU,\ 471 .property = "popcnt",\ 472 .value = "on",\ 473 },\ 474 {\ 475 .driver = "qemu32" "-" TYPE_X86_CPU,\ 476 .property = "popcnt",\ 477 .value = "on",\ 478 },{\ 479 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 480 .property = "rdtscp",\ 481 .value = "on",\ 482 },{\ 483 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 484 .property = "rdtscp",\ 485 .value = "on",\ 486 },{\ 487 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 488 .property = "rdtscp",\ 489 .value = "on",\ 490 },{\ 491 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 492 .property = "rdtscp",\ 493 .value = "on",\ 494 }, 495 496 497 #define PC_COMPAT_2_3 \ 498 HW_COMPAT_2_3 \ 499 PC_CPU_MODEL_IDS("2.3.0") \ 500 {\ 501 .driver = TYPE_X86_CPU,\ 502 .property = "arat",\ 503 .value = "off",\ 504 },{\ 505 .driver = "qemu64" "-" TYPE_X86_CPU,\ 506 .property = "min-level",\ 507 .value = stringify(4),\ 508 },{\ 509 .driver = "kvm64" "-" TYPE_X86_CPU,\ 510 .property = "min-level",\ 511 .value = stringify(5),\ 512 },{\ 513 .driver = "pentium3" "-" TYPE_X86_CPU,\ 514 .property = "min-level",\ 515 .value = stringify(2),\ 516 },{\ 517 .driver = "n270" "-" TYPE_X86_CPU,\ 518 .property = "min-level",\ 519 .value = stringify(5),\ 520 },{\ 521 .driver = "Conroe" "-" TYPE_X86_CPU,\ 522 .property = "min-level",\ 523 .value = stringify(4),\ 524 },{\ 525 .driver = "Penryn" "-" TYPE_X86_CPU,\ 526 .property = "min-level",\ 527 .value = stringify(4),\ 528 },{\ 529 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 530 .property = "min-level",\ 531 .value = stringify(4),\ 532 },{\ 533 .driver = "n270" "-" TYPE_X86_CPU,\ 534 .property = "min-xlevel",\ 535 .value = stringify(0x8000000a),\ 536 },{\ 537 .driver = "Penryn" "-" TYPE_X86_CPU,\ 538 .property = "min-xlevel",\ 539 .value = stringify(0x8000000a),\ 540 },{\ 541 .driver = "Conroe" "-" TYPE_X86_CPU,\ 542 .property = "min-xlevel",\ 543 .value = stringify(0x8000000a),\ 544 },{\ 545 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 546 .property = "min-xlevel",\ 547 .value = stringify(0x8000000a),\ 548 },{\ 549 .driver = "Westmere" "-" TYPE_X86_CPU,\ 550 .property = "min-xlevel",\ 551 .value = stringify(0x8000000a),\ 552 },{\ 553 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 554 .property = "min-xlevel",\ 555 .value = stringify(0x8000000a),\ 556 },{\ 557 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 558 .property = "min-xlevel",\ 559 .value = stringify(0x8000000a),\ 560 },{\ 561 .driver = "Haswell" "-" TYPE_X86_CPU,\ 562 .property = "min-xlevel",\ 563 .value = stringify(0x8000000a),\ 564 },{\ 565 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 566 .property = "min-xlevel",\ 567 .value = stringify(0x8000000a),\ 568 },{\ 569 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 570 .property = "min-xlevel",\ 571 .value = stringify(0x8000000a),\ 572 },{\ 573 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 574 .property = "min-xlevel",\ 575 .value = stringify(0x8000000a),\ 576 },{\ 577 .driver = TYPE_X86_CPU,\ 578 .property = "kvm-no-smi-migration",\ 579 .value = "on",\ 580 }, 581 582 #define PC_COMPAT_2_2 \ 583 HW_COMPAT_2_2 \ 584 PC_CPU_MODEL_IDS("2.2.0") \ 585 {\ 586 .driver = "kvm64" "-" TYPE_X86_CPU,\ 587 .property = "vme",\ 588 .value = "off",\ 589 },\ 590 {\ 591 .driver = "kvm32" "-" TYPE_X86_CPU,\ 592 .property = "vme",\ 593 .value = "off",\ 594 },\ 595 {\ 596 .driver = "Conroe" "-" TYPE_X86_CPU,\ 597 .property = "vme",\ 598 .value = "off",\ 599 },\ 600 {\ 601 .driver = "Penryn" "-" TYPE_X86_CPU,\ 602 .property = "vme",\ 603 .value = "off",\ 604 },\ 605 {\ 606 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 607 .property = "vme",\ 608 .value = "off",\ 609 },\ 610 {\ 611 .driver = "Westmere" "-" TYPE_X86_CPU,\ 612 .property = "vme",\ 613 .value = "off",\ 614 },\ 615 {\ 616 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 617 .property = "vme",\ 618 .value = "off",\ 619 },\ 620 {\ 621 .driver = "Haswell" "-" TYPE_X86_CPU,\ 622 .property = "vme",\ 623 .value = "off",\ 624 },\ 625 {\ 626 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 627 .property = "vme",\ 628 .value = "off",\ 629 },\ 630 {\ 631 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 632 .property = "vme",\ 633 .value = "off",\ 634 },\ 635 {\ 636 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 637 .property = "vme",\ 638 .value = "off",\ 639 },\ 640 {\ 641 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 642 .property = "vme",\ 643 .value = "off",\ 644 },\ 645 {\ 646 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 647 .property = "vme",\ 648 .value = "off",\ 649 },\ 650 {\ 651 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 652 .property = "vme",\ 653 .value = "off",\ 654 },\ 655 {\ 656 .driver = "Haswell" "-" TYPE_X86_CPU,\ 657 .property = "f16c",\ 658 .value = "off",\ 659 },\ 660 {\ 661 .driver = "Haswell" "-" TYPE_X86_CPU,\ 662 .property = "rdrand",\ 663 .value = "off",\ 664 },\ 665 {\ 666 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 667 .property = "f16c",\ 668 .value = "off",\ 669 },\ 670 {\ 671 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 672 .property = "rdrand",\ 673 .value = "off",\ 674 }, 675 676 #define PC_COMPAT_2_1 \ 677 HW_COMPAT_2_1 \ 678 PC_CPU_MODEL_IDS("2.1.0") \ 679 {\ 680 .driver = "coreduo" "-" TYPE_X86_CPU,\ 681 .property = "vmx",\ 682 .value = "on",\ 683 },\ 684 {\ 685 .driver = "core2duo" "-" TYPE_X86_CPU,\ 686 .property = "vmx",\ 687 .value = "on",\ 688 }, 689 690 #define PC_COMPAT_2_0 \ 691 PC_CPU_MODEL_IDS("2.0.0") \ 692 {\ 693 .driver = "virtio-scsi-pci",\ 694 .property = "any_layout",\ 695 .value = "off",\ 696 },{\ 697 .driver = "PIIX4_PM",\ 698 .property = "memory-hotplug-support",\ 699 .value = "off",\ 700 },\ 701 {\ 702 .driver = "apic",\ 703 .property = "version",\ 704 .value = stringify(0x11),\ 705 },\ 706 {\ 707 .driver = "nec-usb-xhci",\ 708 .property = "superspeed-ports-first",\ 709 .value = "off",\ 710 },\ 711 {\ 712 .driver = "nec-usb-xhci",\ 713 .property = "force-pcie-endcap",\ 714 .value = "on",\ 715 },\ 716 {\ 717 .driver = "pci-serial",\ 718 .property = "prog_if",\ 719 .value = stringify(0),\ 720 },\ 721 {\ 722 .driver = "pci-serial-2x",\ 723 .property = "prog_if",\ 724 .value = stringify(0),\ 725 },\ 726 {\ 727 .driver = "pci-serial-4x",\ 728 .property = "prog_if",\ 729 .value = stringify(0),\ 730 },\ 731 {\ 732 .driver = "virtio-net-pci",\ 733 .property = "guest_announce",\ 734 .value = "off",\ 735 },\ 736 {\ 737 .driver = "ICH9-LPC",\ 738 .property = "memory-hotplug-support",\ 739 .value = "off",\ 740 },{\ 741 .driver = "xio3130-downstream",\ 742 .property = COMPAT_PROP_PCP,\ 743 .value = "off",\ 744 },{\ 745 .driver = "ioh3420",\ 746 .property = COMPAT_PROP_PCP,\ 747 .value = "off",\ 748 }, 749 750 #define PC_COMPAT_1_7 \ 751 PC_CPU_MODEL_IDS("1.7.0") \ 752 {\ 753 .driver = TYPE_USB_DEVICE,\ 754 .property = "msos-desc",\ 755 .value = "no",\ 756 },\ 757 {\ 758 .driver = "PIIX4_PM",\ 759 .property = "acpi-pci-hotplug-with-bridge-support",\ 760 .value = "off",\ 761 },\ 762 {\ 763 .driver = "hpet",\ 764 .property = HPET_INTCAP,\ 765 .value = stringify(4),\ 766 }, 767 768 #define PC_COMPAT_1_6 \ 769 PC_CPU_MODEL_IDS("1.6.0") \ 770 {\ 771 .driver = "e1000",\ 772 .property = "mitigation",\ 773 .value = "off",\ 774 },{\ 775 .driver = "qemu64-" TYPE_X86_CPU,\ 776 .property = "model",\ 777 .value = stringify(2),\ 778 },{\ 779 .driver = "qemu32-" TYPE_X86_CPU,\ 780 .property = "model",\ 781 .value = stringify(3),\ 782 },{\ 783 .driver = "i440FX-pcihost",\ 784 .property = "short_root_bus",\ 785 .value = stringify(1),\ 786 },{\ 787 .driver = "q35-pcihost",\ 788 .property = "short_root_bus",\ 789 .value = stringify(1),\ 790 }, 791 792 #define PC_COMPAT_1_5 \ 793 PC_CPU_MODEL_IDS("1.5.0") \ 794 {\ 795 .driver = "Conroe-" TYPE_X86_CPU,\ 796 .property = "model",\ 797 .value = stringify(2),\ 798 },{\ 799 .driver = "Conroe-" TYPE_X86_CPU,\ 800 .property = "min-level",\ 801 .value = stringify(2),\ 802 },{\ 803 .driver = "Penryn-" TYPE_X86_CPU,\ 804 .property = "model",\ 805 .value = stringify(2),\ 806 },{\ 807 .driver = "Penryn-" TYPE_X86_CPU,\ 808 .property = "min-level",\ 809 .value = stringify(2),\ 810 },{\ 811 .driver = "Nehalem-" TYPE_X86_CPU,\ 812 .property = "model",\ 813 .value = stringify(2),\ 814 },{\ 815 .driver = "Nehalem-" TYPE_X86_CPU,\ 816 .property = "min-level",\ 817 .value = stringify(2),\ 818 },{\ 819 .driver = "virtio-net-pci",\ 820 .property = "any_layout",\ 821 .value = "off",\ 822 },{\ 823 .driver = TYPE_X86_CPU,\ 824 .property = "pmu",\ 825 .value = "on",\ 826 },{\ 827 .driver = "i440FX-pcihost",\ 828 .property = "short_root_bus",\ 829 .value = stringify(0),\ 830 },{\ 831 .driver = "q35-pcihost",\ 832 .property = "short_root_bus",\ 833 .value = stringify(0),\ 834 }, 835 836 #define PC_COMPAT_1_4 \ 837 PC_CPU_MODEL_IDS("1.4.0") \ 838 {\ 839 .driver = "scsi-hd",\ 840 .property = "discard_granularity",\ 841 .value = stringify(0),\ 842 },{\ 843 .driver = "scsi-cd",\ 844 .property = "discard_granularity",\ 845 .value = stringify(0),\ 846 },{\ 847 .driver = "scsi-disk",\ 848 .property = "discard_granularity",\ 849 .value = stringify(0),\ 850 },{\ 851 .driver = "ide-hd",\ 852 .property = "discard_granularity",\ 853 .value = stringify(0),\ 854 },{\ 855 .driver = "ide-cd",\ 856 .property = "discard_granularity",\ 857 .value = stringify(0),\ 858 },{\ 859 .driver = "ide-drive",\ 860 .property = "discard_granularity",\ 861 .value = stringify(0),\ 862 },{\ 863 .driver = "virtio-blk-pci",\ 864 .property = "discard_granularity",\ 865 .value = stringify(0),\ 866 },{\ 867 .driver = "virtio-serial-pci",\ 868 .property = "vectors",\ 869 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 870 .value = stringify(0xFFFFFFFF),\ 871 },{ \ 872 .driver = "virtio-net-pci", \ 873 .property = "ctrl_guest_offloads", \ 874 .value = "off", \ 875 },{\ 876 .driver = "e1000",\ 877 .property = "romfile",\ 878 .value = "pxe-e1000.rom",\ 879 },{\ 880 .driver = "ne2k_pci",\ 881 .property = "romfile",\ 882 .value = "pxe-ne2k_pci.rom",\ 883 },{\ 884 .driver = "pcnet",\ 885 .property = "romfile",\ 886 .value = "pxe-pcnet.rom",\ 887 },{\ 888 .driver = "rtl8139",\ 889 .property = "romfile",\ 890 .value = "pxe-rtl8139.rom",\ 891 },{\ 892 .driver = "virtio-net-pci",\ 893 .property = "romfile",\ 894 .value = "pxe-virtio.rom",\ 895 },{\ 896 .driver = "486-" TYPE_X86_CPU,\ 897 .property = "model",\ 898 .value = stringify(0),\ 899 },\ 900 {\ 901 .driver = "n270" "-" TYPE_X86_CPU,\ 902 .property = "movbe",\ 903 .value = "off",\ 904 },\ 905 {\ 906 .driver = "Westmere" "-" TYPE_X86_CPU,\ 907 .property = "pclmulqdq",\ 908 .value = "off",\ 909 }, 910 911 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 912 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 913 { \ 914 MachineClass *mc = MACHINE_CLASS(oc); \ 915 optsfn(mc); \ 916 mc->init = initfn; \ 917 } \ 918 static const TypeInfo pc_machine_type_##suffix = { \ 919 .name = namestr TYPE_MACHINE_SUFFIX, \ 920 .parent = TYPE_PC_MACHINE, \ 921 .class_init = pc_machine_##suffix##_class_init, \ 922 }; \ 923 static void pc_machine_init_##suffix(void) \ 924 { \ 925 type_register(&pc_machine_type_##suffix); \ 926 } \ 927 type_init(pc_machine_init_##suffix) 928 929 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 930 #endif 931