1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus_enabled; 53 bool sata_enabled; 54 bool pit_enabled; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 /* Global System Interrupts */ 158 159 #define GSI_NUM_PINS IOAPIC_NUM_PINS 160 161 typedef struct GSIState { 162 qemu_irq i8259_irq[ISA_NUM_IRQS]; 163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 164 } GSIState; 165 166 void gsi_handler(void *opaque, int n, int level); 167 168 /* vmport.c */ 169 #define TYPE_VMPORT "vmport" 170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 171 172 static inline void vmport_init(ISABus *bus) 173 { 174 isa_create_simple(bus, TYPE_VMPORT); 175 } 176 177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 178 void vmmouse_get_data(uint32_t *data); 179 void vmmouse_set_data(const uint32_t *data); 180 181 /* pc.c */ 182 extern int fd_bootchk; 183 184 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 185 void pc_register_ferr_irq(qemu_irq irq); 186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 187 188 void pc_cpus_init(PCMachineState *pcms); 189 void pc_hot_add_cpu(const int64_t id, Error **errp); 190 void pc_acpi_init(const char *default_dsdt); 191 192 void pc_guest_info_init(PCMachineState *pcms); 193 194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 201 202 203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 204 MemoryRegion *pci_address_space); 205 206 void xen_load_linux(PCMachineState *pcms); 207 void pc_memory_init(PCMachineState *pcms, 208 MemoryRegion *system_memory, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory); 211 uint64_t pc_pci_hole64_start(void); 212 qemu_irq pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 bool create_fdctrl, 217 bool no_vmport, 218 bool has_pit, 219 uint32_t hpet_irqs); 220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 221 void pc_cmos_init(PCMachineState *pcms, 222 BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 230 231 ISADevice *pc_find_fdc0(void); 232 int cmos_get_fd_drive_type(FloppyDriveType fd0); 233 234 #define FW_CFG_IO_BASE 0x510 235 236 #define PORT92_A20_LINE "a20" 237 238 /* acpi_piix.c */ 239 240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 241 qemu_irq sci_irq, qemu_irq smi_irq, 242 int smm_enabled, DeviceState **piix4_pm); 243 244 /* hpet.c */ 245 extern int no_hpet; 246 247 /* piix_pci.c */ 248 struct PCII440FXState; 249 typedef struct PCII440FXState PCII440FXState; 250 251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 252 #define TYPE_I440FX_PCI_DEVICE "i440FX" 253 254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 255 256 /* 257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 259 */ 260 #define RCR_IOPORT 0xcf9 261 262 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 263 PCII440FXState **pi440fx_state, int *piix_devfn, 264 ISABus **isa_bus, qemu_irq *pic, 265 MemoryRegion *address_space_mem, 266 MemoryRegion *address_space_io, 267 ram_addr_t ram_size, 268 ram_addr_t below_4g_mem_size, 269 ram_addr_t above_4g_mem_size, 270 MemoryRegion *pci_memory, 271 MemoryRegion *ram_memory); 272 273 PCIBus *find_i440fx(void); 274 /* piix4.c */ 275 extern PCIDevice *piix4_dev; 276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 277 278 /* pc_sysfw.c */ 279 void pc_system_firmware_init(MemoryRegion *rom_memory, 280 bool isapc_ram_fw); 281 282 /* acpi-build.c */ 283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 284 const CPUArchIdList *apic_ids, GArray *entry); 285 286 /* e820 types */ 287 #define E820_RAM 1 288 #define E820_RESERVED 2 289 #define E820_ACPI 3 290 #define E820_NVS 4 291 #define E820_UNUSABLE 5 292 293 int e820_add_entry(uint64_t, uint64_t, uint32_t); 294 int e820_get_num_entries(void); 295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 296 297 extern GlobalProperty pc_compat_3_1[]; 298 extern const size_t pc_compat_3_1_len; 299 300 extern GlobalProperty pc_compat_3_0[]; 301 extern const size_t pc_compat_3_0_len; 302 303 extern GlobalProperty pc_compat_2_12[]; 304 extern const size_t pc_compat_2_12_len; 305 306 extern GlobalProperty pc_compat_2_11[]; 307 extern const size_t pc_compat_2_11_len; 308 309 #define PC_COMPAT_2_10 \ 310 HW_COMPAT_2_10 \ 311 {\ 312 .driver = TYPE_X86_CPU,\ 313 .property = "x-hv-max-vps",\ 314 .value = "0x40",\ 315 },{\ 316 .driver = "i440FX-pcihost",\ 317 .property = "x-pci-hole64-fix",\ 318 .value = "off",\ 319 },{\ 320 .driver = "q35-pcihost",\ 321 .property = "x-pci-hole64-fix",\ 322 .value = "off",\ 323 }, 324 325 #define PC_COMPAT_2_9 \ 326 HW_COMPAT_2_9 \ 327 {\ 328 .driver = "mch",\ 329 .property = "extended-tseg-mbytes",\ 330 .value = stringify(0),\ 331 },\ 332 333 #define PC_COMPAT_2_8 \ 334 HW_COMPAT_2_8 \ 335 {\ 336 .driver = TYPE_X86_CPU,\ 337 .property = "tcg-cpuid",\ 338 .value = "off",\ 339 },\ 340 {\ 341 .driver = "kvmclock",\ 342 .property = "x-mach-use-reliable-get-clock",\ 343 .value = "off",\ 344 },\ 345 {\ 346 .driver = "ICH9-LPC",\ 347 .property = "x-smi-broadcast",\ 348 .value = "off",\ 349 },\ 350 {\ 351 .driver = TYPE_X86_CPU,\ 352 .property = "vmware-cpuid-freq",\ 353 .value = "off",\ 354 },\ 355 {\ 356 .driver = "Haswell-" TYPE_X86_CPU,\ 357 .property = "stepping",\ 358 .value = "1",\ 359 }, 360 361 #define PC_COMPAT_2_7 \ 362 HW_COMPAT_2_7 \ 363 {\ 364 .driver = TYPE_X86_CPU,\ 365 .property = "l3-cache",\ 366 .value = "off",\ 367 },\ 368 {\ 369 .driver = TYPE_X86_CPU,\ 370 .property = "full-cpuid-auto-level",\ 371 .value = "off",\ 372 },\ 373 {\ 374 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 375 .property = "family",\ 376 .value = "15",\ 377 },\ 378 {\ 379 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 380 .property = "model",\ 381 .value = "6",\ 382 },\ 383 {\ 384 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 385 .property = "stepping",\ 386 .value = "1",\ 387 },\ 388 {\ 389 .driver = "isa-pcspk",\ 390 .property = "migrate",\ 391 .value = "off",\ 392 }, 393 394 #define PC_COMPAT_2_6 \ 395 HW_COMPAT_2_6 \ 396 {\ 397 .driver = TYPE_X86_CPU,\ 398 .property = "cpuid-0xb",\ 399 .value = "off",\ 400 },{\ 401 .driver = "vmxnet3",\ 402 .property = "romfile",\ 403 .value = "",\ 404 },\ 405 {\ 406 .driver = TYPE_X86_CPU,\ 407 .property = "fill-mtrr-mask",\ 408 .value = "off",\ 409 },\ 410 {\ 411 .driver = "apic-common",\ 412 .property = "legacy-instance-id",\ 413 .value = "on",\ 414 }, 415 416 #define PC_COMPAT_2_5 \ 417 HW_COMPAT_2_5 418 419 /* Helper for setting model-id for CPU models that changed model-id 420 * depending on QEMU versions up to QEMU 2.4. 421 */ 422 #define PC_CPU_MODEL_IDS(v) \ 423 {\ 424 .driver = "qemu32-" TYPE_X86_CPU,\ 425 .property = "model-id",\ 426 .value = "QEMU Virtual CPU version " v,\ 427 },\ 428 {\ 429 .driver = "qemu64-" TYPE_X86_CPU,\ 430 .property = "model-id",\ 431 .value = "QEMU Virtual CPU version " v,\ 432 },\ 433 {\ 434 .driver = "athlon-" TYPE_X86_CPU,\ 435 .property = "model-id",\ 436 .value = "QEMU Virtual CPU version " v,\ 437 }, 438 439 #define PC_COMPAT_2_4 \ 440 HW_COMPAT_2_4 \ 441 PC_CPU_MODEL_IDS("2.4.0") \ 442 {\ 443 .driver = "Haswell-" TYPE_X86_CPU,\ 444 .property = "abm",\ 445 .value = "off",\ 446 },\ 447 {\ 448 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 449 .property = "abm",\ 450 .value = "off",\ 451 },\ 452 {\ 453 .driver = "Broadwell-" TYPE_X86_CPU,\ 454 .property = "abm",\ 455 .value = "off",\ 456 },\ 457 {\ 458 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 459 .property = "abm",\ 460 .value = "off",\ 461 },\ 462 {\ 463 .driver = "host" "-" TYPE_X86_CPU,\ 464 .property = "host-cache-info",\ 465 .value = "on",\ 466 },\ 467 {\ 468 .driver = TYPE_X86_CPU,\ 469 .property = "check",\ 470 .value = "off",\ 471 },\ 472 {\ 473 .driver = "qemu64" "-" TYPE_X86_CPU,\ 474 .property = "sse4a",\ 475 .value = "on",\ 476 },\ 477 {\ 478 .driver = "qemu64" "-" TYPE_X86_CPU,\ 479 .property = "abm",\ 480 .value = "on",\ 481 },\ 482 {\ 483 .driver = "qemu64" "-" TYPE_X86_CPU,\ 484 .property = "popcnt",\ 485 .value = "on",\ 486 },\ 487 {\ 488 .driver = "qemu32" "-" TYPE_X86_CPU,\ 489 .property = "popcnt",\ 490 .value = "on",\ 491 },{\ 492 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 493 .property = "rdtscp",\ 494 .value = "on",\ 495 },{\ 496 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 497 .property = "rdtscp",\ 498 .value = "on",\ 499 },{\ 500 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 501 .property = "rdtscp",\ 502 .value = "on",\ 503 },{\ 504 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 505 .property = "rdtscp",\ 506 .value = "on",\ 507 }, 508 509 510 #define PC_COMPAT_2_3 \ 511 HW_COMPAT_2_3 \ 512 PC_CPU_MODEL_IDS("2.3.0") \ 513 {\ 514 .driver = TYPE_X86_CPU,\ 515 .property = "arat",\ 516 .value = "off",\ 517 },{\ 518 .driver = "qemu64" "-" TYPE_X86_CPU,\ 519 .property = "min-level",\ 520 .value = stringify(4),\ 521 },{\ 522 .driver = "kvm64" "-" TYPE_X86_CPU,\ 523 .property = "min-level",\ 524 .value = stringify(5),\ 525 },{\ 526 .driver = "pentium3" "-" TYPE_X86_CPU,\ 527 .property = "min-level",\ 528 .value = stringify(2),\ 529 },{\ 530 .driver = "n270" "-" TYPE_X86_CPU,\ 531 .property = "min-level",\ 532 .value = stringify(5),\ 533 },{\ 534 .driver = "Conroe" "-" TYPE_X86_CPU,\ 535 .property = "min-level",\ 536 .value = stringify(4),\ 537 },{\ 538 .driver = "Penryn" "-" TYPE_X86_CPU,\ 539 .property = "min-level",\ 540 .value = stringify(4),\ 541 },{\ 542 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 543 .property = "min-level",\ 544 .value = stringify(4),\ 545 },{\ 546 .driver = "n270" "-" TYPE_X86_CPU,\ 547 .property = "min-xlevel",\ 548 .value = stringify(0x8000000a),\ 549 },{\ 550 .driver = "Penryn" "-" TYPE_X86_CPU,\ 551 .property = "min-xlevel",\ 552 .value = stringify(0x8000000a),\ 553 },{\ 554 .driver = "Conroe" "-" TYPE_X86_CPU,\ 555 .property = "min-xlevel",\ 556 .value = stringify(0x8000000a),\ 557 },{\ 558 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 559 .property = "min-xlevel",\ 560 .value = stringify(0x8000000a),\ 561 },{\ 562 .driver = "Westmere" "-" TYPE_X86_CPU,\ 563 .property = "min-xlevel",\ 564 .value = stringify(0x8000000a),\ 565 },{\ 566 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 567 .property = "min-xlevel",\ 568 .value = stringify(0x8000000a),\ 569 },{\ 570 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 571 .property = "min-xlevel",\ 572 .value = stringify(0x8000000a),\ 573 },{\ 574 .driver = "Haswell" "-" TYPE_X86_CPU,\ 575 .property = "min-xlevel",\ 576 .value = stringify(0x8000000a),\ 577 },{\ 578 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 579 .property = "min-xlevel",\ 580 .value = stringify(0x8000000a),\ 581 },{\ 582 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 583 .property = "min-xlevel",\ 584 .value = stringify(0x8000000a),\ 585 },{\ 586 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 587 .property = "min-xlevel",\ 588 .value = stringify(0x8000000a),\ 589 },{\ 590 .driver = TYPE_X86_CPU,\ 591 .property = "kvm-no-smi-migration",\ 592 .value = "on",\ 593 }, 594 595 #define PC_COMPAT_2_2 \ 596 HW_COMPAT_2_2 \ 597 PC_CPU_MODEL_IDS("2.2.0") \ 598 {\ 599 .driver = "kvm64" "-" TYPE_X86_CPU,\ 600 .property = "vme",\ 601 .value = "off",\ 602 },\ 603 {\ 604 .driver = "kvm32" "-" TYPE_X86_CPU,\ 605 .property = "vme",\ 606 .value = "off",\ 607 },\ 608 {\ 609 .driver = "Conroe" "-" TYPE_X86_CPU,\ 610 .property = "vme",\ 611 .value = "off",\ 612 },\ 613 {\ 614 .driver = "Penryn" "-" TYPE_X86_CPU,\ 615 .property = "vme",\ 616 .value = "off",\ 617 },\ 618 {\ 619 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 620 .property = "vme",\ 621 .value = "off",\ 622 },\ 623 {\ 624 .driver = "Westmere" "-" TYPE_X86_CPU,\ 625 .property = "vme",\ 626 .value = "off",\ 627 },\ 628 {\ 629 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 630 .property = "vme",\ 631 .value = "off",\ 632 },\ 633 {\ 634 .driver = "Haswell" "-" TYPE_X86_CPU,\ 635 .property = "vme",\ 636 .value = "off",\ 637 },\ 638 {\ 639 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 640 .property = "vme",\ 641 .value = "off",\ 642 },\ 643 {\ 644 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 645 .property = "vme",\ 646 .value = "off",\ 647 },\ 648 {\ 649 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 650 .property = "vme",\ 651 .value = "off",\ 652 },\ 653 {\ 654 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 655 .property = "vme",\ 656 .value = "off",\ 657 },\ 658 {\ 659 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 660 .property = "vme",\ 661 .value = "off",\ 662 },\ 663 {\ 664 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 665 .property = "vme",\ 666 .value = "off",\ 667 },\ 668 {\ 669 .driver = "Haswell" "-" TYPE_X86_CPU,\ 670 .property = "f16c",\ 671 .value = "off",\ 672 },\ 673 {\ 674 .driver = "Haswell" "-" TYPE_X86_CPU,\ 675 .property = "rdrand",\ 676 .value = "off",\ 677 },\ 678 {\ 679 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 680 .property = "f16c",\ 681 .value = "off",\ 682 },\ 683 {\ 684 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 685 .property = "rdrand",\ 686 .value = "off",\ 687 }, 688 689 #define PC_COMPAT_2_1 \ 690 HW_COMPAT_2_1 \ 691 PC_CPU_MODEL_IDS("2.1.0") \ 692 {\ 693 .driver = "coreduo" "-" TYPE_X86_CPU,\ 694 .property = "vmx",\ 695 .value = "on",\ 696 },\ 697 {\ 698 .driver = "core2duo" "-" TYPE_X86_CPU,\ 699 .property = "vmx",\ 700 .value = "on",\ 701 }, 702 703 #define PC_COMPAT_2_0 \ 704 PC_CPU_MODEL_IDS("2.0.0") \ 705 {\ 706 .driver = "virtio-scsi-pci",\ 707 .property = "any_layout",\ 708 .value = "off",\ 709 },{\ 710 .driver = "PIIX4_PM",\ 711 .property = "memory-hotplug-support",\ 712 .value = "off",\ 713 },\ 714 {\ 715 .driver = "apic",\ 716 .property = "version",\ 717 .value = stringify(0x11),\ 718 },\ 719 {\ 720 .driver = "nec-usb-xhci",\ 721 .property = "superspeed-ports-first",\ 722 .value = "off",\ 723 },\ 724 {\ 725 .driver = "nec-usb-xhci",\ 726 .property = "force-pcie-endcap",\ 727 .value = "on",\ 728 },\ 729 {\ 730 .driver = "pci-serial",\ 731 .property = "prog_if",\ 732 .value = stringify(0),\ 733 },\ 734 {\ 735 .driver = "pci-serial-2x",\ 736 .property = "prog_if",\ 737 .value = stringify(0),\ 738 },\ 739 {\ 740 .driver = "pci-serial-4x",\ 741 .property = "prog_if",\ 742 .value = stringify(0),\ 743 },\ 744 {\ 745 .driver = "virtio-net-pci",\ 746 .property = "guest_announce",\ 747 .value = "off",\ 748 },\ 749 {\ 750 .driver = "ICH9-LPC",\ 751 .property = "memory-hotplug-support",\ 752 .value = "off",\ 753 },{\ 754 .driver = "xio3130-downstream",\ 755 .property = COMPAT_PROP_PCP,\ 756 .value = "off",\ 757 },{\ 758 .driver = "ioh3420",\ 759 .property = COMPAT_PROP_PCP,\ 760 .value = "off",\ 761 }, 762 763 #define PC_COMPAT_1_7 \ 764 PC_CPU_MODEL_IDS("1.7.0") \ 765 {\ 766 .driver = TYPE_USB_DEVICE,\ 767 .property = "msos-desc",\ 768 .value = "no",\ 769 },\ 770 {\ 771 .driver = "PIIX4_PM",\ 772 .property = "acpi-pci-hotplug-with-bridge-support",\ 773 .value = "off",\ 774 },\ 775 {\ 776 .driver = "hpet",\ 777 .property = HPET_INTCAP,\ 778 .value = stringify(4),\ 779 }, 780 781 #define PC_COMPAT_1_6 \ 782 PC_CPU_MODEL_IDS("1.6.0") \ 783 {\ 784 .driver = "e1000",\ 785 .property = "mitigation",\ 786 .value = "off",\ 787 },{\ 788 .driver = "qemu64-" TYPE_X86_CPU,\ 789 .property = "model",\ 790 .value = stringify(2),\ 791 },{\ 792 .driver = "qemu32-" TYPE_X86_CPU,\ 793 .property = "model",\ 794 .value = stringify(3),\ 795 },{\ 796 .driver = "i440FX-pcihost",\ 797 .property = "short_root_bus",\ 798 .value = stringify(1),\ 799 },{\ 800 .driver = "q35-pcihost",\ 801 .property = "short_root_bus",\ 802 .value = stringify(1),\ 803 }, 804 805 #define PC_COMPAT_1_5 \ 806 PC_CPU_MODEL_IDS("1.5.0") \ 807 {\ 808 .driver = "Conroe-" TYPE_X86_CPU,\ 809 .property = "model",\ 810 .value = stringify(2),\ 811 },{\ 812 .driver = "Conroe-" TYPE_X86_CPU,\ 813 .property = "min-level",\ 814 .value = stringify(2),\ 815 },{\ 816 .driver = "Penryn-" TYPE_X86_CPU,\ 817 .property = "model",\ 818 .value = stringify(2),\ 819 },{\ 820 .driver = "Penryn-" TYPE_X86_CPU,\ 821 .property = "min-level",\ 822 .value = stringify(2),\ 823 },{\ 824 .driver = "Nehalem-" TYPE_X86_CPU,\ 825 .property = "model",\ 826 .value = stringify(2),\ 827 },{\ 828 .driver = "Nehalem-" TYPE_X86_CPU,\ 829 .property = "min-level",\ 830 .value = stringify(2),\ 831 },{\ 832 .driver = "virtio-net-pci",\ 833 .property = "any_layout",\ 834 .value = "off",\ 835 },{\ 836 .driver = TYPE_X86_CPU,\ 837 .property = "pmu",\ 838 .value = "on",\ 839 },{\ 840 .driver = "i440FX-pcihost",\ 841 .property = "short_root_bus",\ 842 .value = stringify(0),\ 843 },{\ 844 .driver = "q35-pcihost",\ 845 .property = "short_root_bus",\ 846 .value = stringify(0),\ 847 }, 848 849 #define PC_COMPAT_1_4 \ 850 PC_CPU_MODEL_IDS("1.4.0") \ 851 {\ 852 .driver = "scsi-hd",\ 853 .property = "discard_granularity",\ 854 .value = stringify(0),\ 855 },{\ 856 .driver = "scsi-cd",\ 857 .property = "discard_granularity",\ 858 .value = stringify(0),\ 859 },{\ 860 .driver = "scsi-disk",\ 861 .property = "discard_granularity",\ 862 .value = stringify(0),\ 863 },{\ 864 .driver = "ide-hd",\ 865 .property = "discard_granularity",\ 866 .value = stringify(0),\ 867 },{\ 868 .driver = "ide-cd",\ 869 .property = "discard_granularity",\ 870 .value = stringify(0),\ 871 },{\ 872 .driver = "ide-drive",\ 873 .property = "discard_granularity",\ 874 .value = stringify(0),\ 875 },{\ 876 .driver = "virtio-blk-pci",\ 877 .property = "discard_granularity",\ 878 .value = stringify(0),\ 879 },{\ 880 .driver = "virtio-serial-pci",\ 881 .property = "vectors",\ 882 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 883 .value = stringify(0xFFFFFFFF),\ 884 },{ \ 885 .driver = "virtio-net-pci", \ 886 .property = "ctrl_guest_offloads", \ 887 .value = "off", \ 888 },{\ 889 .driver = "e1000",\ 890 .property = "romfile",\ 891 .value = "pxe-e1000.rom",\ 892 },{\ 893 .driver = "ne2k_pci",\ 894 .property = "romfile",\ 895 .value = "pxe-ne2k_pci.rom",\ 896 },{\ 897 .driver = "pcnet",\ 898 .property = "romfile",\ 899 .value = "pxe-pcnet.rom",\ 900 },{\ 901 .driver = "rtl8139",\ 902 .property = "romfile",\ 903 .value = "pxe-rtl8139.rom",\ 904 },{\ 905 .driver = "virtio-net-pci",\ 906 .property = "romfile",\ 907 .value = "pxe-virtio.rom",\ 908 },{\ 909 .driver = "486-" TYPE_X86_CPU,\ 910 .property = "model",\ 911 .value = stringify(0),\ 912 },\ 913 {\ 914 .driver = "n270" "-" TYPE_X86_CPU,\ 915 .property = "movbe",\ 916 .value = "off",\ 917 },\ 918 {\ 919 .driver = "Westmere" "-" TYPE_X86_CPU,\ 920 .property = "pclmulqdq",\ 921 .value = "off",\ 922 }, 923 924 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 925 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 926 { \ 927 MachineClass *mc = MACHINE_CLASS(oc); \ 928 optsfn(mc); \ 929 mc->init = initfn; \ 930 } \ 931 static const TypeInfo pc_machine_type_##suffix = { \ 932 .name = namestr TYPE_MACHINE_SUFFIX, \ 933 .parent = TYPE_PC_MACHINE, \ 934 .class_init = pc_machine_##suffix##_class_init, \ 935 }; \ 936 static void pc_machine_init_##suffix(void) \ 937 { \ 938 type_register(&pc_machine_type_##suffix); \ 939 } \ 940 type_init(pc_machine_init_##suffix) 941 942 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 943 #endif 944