1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 23 * address space begins. 24 * @hotplug_memory: hotplug memory addess space container 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 */ 27 struct PCMachineState { 28 /*< private >*/ 29 MachineState parent_obj; 30 31 /* <public> */ 32 ram_addr_t hotplug_memory_base; 33 MemoryRegion hotplug_memory; 34 35 HotplugHandler *acpi_dev; 36 37 uint64_t max_ram_below_4g; 38 }; 39 40 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 41 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 42 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 43 44 /** 45 * PCMachineClass: 46 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 47 */ 48 struct PCMachineClass { 49 /*< private >*/ 50 MachineClass parent_class; 51 52 /*< public >*/ 53 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 54 DeviceState *dev); 55 }; 56 57 typedef struct PCMachineState PCMachineState; 58 typedef struct PCMachineClass PCMachineClass; 59 60 #define TYPE_PC_MACHINE "generic-pc-machine" 61 #define PC_MACHINE(obj) \ 62 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 63 #define PC_MACHINE_GET_CLASS(obj) \ 64 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 65 #define PC_MACHINE_CLASS(klass) \ 66 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 67 68 void qemu_register_pc_machine(QEMUMachine *m); 69 70 /* PC-style peripherals (also used by other machines). */ 71 72 typedef struct PcPciInfo { 73 Range w32; 74 Range w64; 75 } PcPciInfo; 76 77 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 78 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 79 #define ACPI_PM_PROP_S4_VAL "s4_val" 80 #define ACPI_PM_PROP_SCI_INT "sci_int" 81 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 82 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 83 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 84 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 85 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 86 87 struct PcGuestInfo { 88 bool has_pci_info; 89 bool isapc_ram_fw; 90 hwaddr ram_size, ram_size_below_4g; 91 unsigned apic_id_limit; 92 bool apic_xrupt_override; 93 uint64_t numa_nodes; 94 uint64_t *node_mem; 95 uint64_t *node_cpu; 96 FWCfgState *fw_cfg; 97 int legacy_acpi_table_size; 98 bool has_acpi_build; 99 bool has_reserved_memory; 100 }; 101 102 /* parallel.c */ 103 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 104 { 105 DeviceState *dev; 106 ISADevice *isadev; 107 108 isadev = isa_try_create(bus, "isa-parallel"); 109 if (!isadev) { 110 return false; 111 } 112 dev = DEVICE(isadev); 113 qdev_prop_set_uint32(dev, "index", index); 114 qdev_prop_set_chr(dev, "chardev", chr); 115 if (qdev_init(dev) < 0) { 116 return false; 117 } 118 return true; 119 } 120 121 bool parallel_mm_init(MemoryRegion *address_space, 122 hwaddr base, int it_shift, qemu_irq irq, 123 CharDriverState *chr); 124 125 /* i8259.c */ 126 127 extern DeviceState *isa_pic; 128 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 129 qemu_irq *kvm_i8259_init(ISABus *bus); 130 int pic_read_irq(DeviceState *d); 131 int pic_get_output(DeviceState *d); 132 void pic_info(Monitor *mon, const QDict *qdict); 133 void irq_info(Monitor *mon, const QDict *qdict); 134 135 /* Global System Interrupts */ 136 137 #define GSI_NUM_PINS IOAPIC_NUM_PINS 138 139 typedef struct GSIState { 140 qemu_irq i8259_irq[ISA_NUM_IRQS]; 141 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 142 } GSIState; 143 144 void gsi_handler(void *opaque, int n, int level); 145 146 /* vmport.c */ 147 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 148 149 static inline void vmport_init(ISABus *bus) 150 { 151 isa_create_simple(bus, "vmport"); 152 } 153 154 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 155 void vmmouse_get_data(uint32_t *data); 156 void vmmouse_set_data(const uint32_t *data); 157 158 /* pckbd.c */ 159 160 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 161 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 162 MemoryRegion *region, ram_addr_t size, 163 hwaddr mask); 164 void i8042_isa_mouse_fake_event(void *opaque); 165 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 166 167 /* pc.c */ 168 extern int fd_bootchk; 169 170 void pc_register_ferr_irq(qemu_irq irq); 171 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 172 173 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 174 void pc_hot_add_cpu(const int64_t id, Error **errp); 175 void pc_acpi_init(const char *default_dsdt); 176 177 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 178 ram_addr_t above_4g_mem_size); 179 180 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 181 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 182 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 183 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 184 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 185 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 186 187 188 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 189 MemoryRegion *pci_address_space); 190 191 FWCfgState *pc_memory_init(MachineState *machine, 192 MemoryRegion *system_memory, 193 ram_addr_t below_4g_mem_size, 194 ram_addr_t above_4g_mem_size, 195 MemoryRegion *rom_memory, 196 MemoryRegion **ram_memory, 197 PcGuestInfo *guest_info); 198 qemu_irq *pc_allocate_cpu_irq(void); 199 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 200 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 201 ISADevice **rtc_state, 202 ISADevice **floppy, 203 bool no_vmport, 204 uint32 hpet_irqs); 205 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 206 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 207 const char *boot_device, 208 ISADevice *floppy, BusState *ide0, BusState *ide1, 209 ISADevice *s); 210 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 211 void pc_pci_device_init(PCIBus *pci_bus); 212 213 typedef void (*cpu_set_smm_t)(int smm, void *arg); 214 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 215 216 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 217 218 /* acpi_piix.c */ 219 220 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 221 qemu_irq sci_irq, qemu_irq smi_irq, 222 int kvm_enabled, FWCfgState *fw_cfg, 223 DeviceState **piix4_pm); 224 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 225 226 /* hpet.c */ 227 extern int no_hpet; 228 229 /* piix_pci.c */ 230 struct PCII440FXState; 231 typedef struct PCII440FXState PCII440FXState; 232 233 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 234 ISABus **isa_bus, qemu_irq *pic, 235 MemoryRegion *address_space_mem, 236 MemoryRegion *address_space_io, 237 ram_addr_t ram_size, 238 ram_addr_t below_4g_mem_size, 239 ram_addr_t above_4g_mem_size, 240 MemoryRegion *pci_memory, 241 MemoryRegion *ram_memory); 242 243 PCIBus *find_i440fx(void); 244 /* piix4.c */ 245 extern PCIDevice *piix4_dev; 246 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 247 248 /* vga.c */ 249 enum vga_retrace_method { 250 VGA_RETRACE_DUMB, 251 VGA_RETRACE_PRECISE 252 }; 253 254 extern enum vga_retrace_method vga_retrace_method; 255 256 int isa_vga_mm_init(hwaddr vram_base, 257 hwaddr ctrl_base, int it_shift, 258 MemoryRegion *address_space); 259 260 /* ne2000.c */ 261 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 262 { 263 DeviceState *dev; 264 ISADevice *isadev; 265 266 qemu_check_nic_model(nd, "ne2k_isa"); 267 268 isadev = isa_try_create(bus, "ne2k_isa"); 269 if (!isadev) { 270 return false; 271 } 272 dev = DEVICE(isadev); 273 qdev_prop_set_uint32(dev, "iobase", base); 274 qdev_prop_set_uint32(dev, "irq", irq); 275 qdev_set_nic_properties(dev, nd); 276 qdev_init_nofail(dev); 277 return true; 278 } 279 280 /* pc_sysfw.c */ 281 void pc_system_firmware_init(MemoryRegion *rom_memory, 282 bool isapc_ram_fw); 283 284 /* pvpanic.c */ 285 uint16_t pvpanic_port(void); 286 287 /* e820 types */ 288 #define E820_RAM 1 289 #define E820_RESERVED 2 290 #define E820_ACPI 3 291 #define E820_NVS 4 292 #define E820_UNUSABLE 5 293 294 int e820_add_entry(uint64_t, uint64_t, uint32_t); 295 int e820_get_num_entries(void); 296 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 297 298 #define PC_COMPAT_2_0 \ 299 {\ 300 .driver = "virtio-scsi-pci",\ 301 .property = "any_layout",\ 302 .value = "off",\ 303 },{\ 304 .driver = "PIIX4_PM",\ 305 .property = "memory-hotplug-support",\ 306 .value = "off",\ 307 },\ 308 {\ 309 .driver = "apic",\ 310 .property = "version",\ 311 .value = stringify(0x11),\ 312 },\ 313 {\ 314 .driver = "nec-usb-xhci",\ 315 .property = "superspeed-ports-first",\ 316 .value = "off",\ 317 },\ 318 {\ 319 .driver = "pci-serial",\ 320 .property = "prog_if",\ 321 .value = stringify(0),\ 322 },\ 323 {\ 324 .driver = "pci-serial-2x",\ 325 .property = "prog_if",\ 326 .value = stringify(0),\ 327 },\ 328 {\ 329 .driver = "pci-serial-4x",\ 330 .property = "prog_if",\ 331 .value = stringify(0),\ 332 },\ 333 {\ 334 .driver = "virtio-net-pci",\ 335 .property = "guest_announce",\ 336 .value = "off",\ 337 },\ 338 {\ 339 .driver = "ICH9-LPC",\ 340 .property = "memory-hotplug-support",\ 341 .value = "off",\ 342 },{\ 343 .driver = "xio3130-downstream",\ 344 .property = COMPAT_PROP_PCP,\ 345 .value = "off",\ 346 },{\ 347 .driver = "ioh3420",\ 348 .property = COMPAT_PROP_PCP,\ 349 .value = "off",\ 350 } 351 352 #define PC_COMPAT_1_7 \ 353 PC_COMPAT_2_0, \ 354 {\ 355 .driver = TYPE_USB_DEVICE,\ 356 .property = "msos-desc",\ 357 .value = "no",\ 358 },\ 359 {\ 360 .driver = "PIIX4_PM",\ 361 .property = "acpi-pci-hotplug-with-bridge-support",\ 362 .value = "off",\ 363 },\ 364 {\ 365 .driver = "hpet",\ 366 .property = HPET_INTCAP,\ 367 .value = stringify(4),\ 368 } 369 370 #define PC_COMPAT_1_6 \ 371 PC_COMPAT_1_7, \ 372 {\ 373 .driver = "e1000",\ 374 .property = "mitigation",\ 375 .value = "off",\ 376 },{\ 377 .driver = "qemu64-" TYPE_X86_CPU,\ 378 .property = "model",\ 379 .value = stringify(2),\ 380 },{\ 381 .driver = "qemu32-" TYPE_X86_CPU,\ 382 .property = "model",\ 383 .value = stringify(3),\ 384 },{\ 385 .driver = "i440FX-pcihost",\ 386 .property = "short_root_bus",\ 387 .value = stringify(1),\ 388 },{\ 389 .driver = "q35-pcihost",\ 390 .property = "short_root_bus",\ 391 .value = stringify(1),\ 392 } 393 394 #define PC_COMPAT_1_5 \ 395 PC_COMPAT_1_6, \ 396 {\ 397 .driver = "Conroe-" TYPE_X86_CPU,\ 398 .property = "model",\ 399 .value = stringify(2),\ 400 },{\ 401 .driver = "Conroe-" TYPE_X86_CPU,\ 402 .property = "level",\ 403 .value = stringify(2),\ 404 },{\ 405 .driver = "Penryn-" TYPE_X86_CPU,\ 406 .property = "model",\ 407 .value = stringify(2),\ 408 },{\ 409 .driver = "Penryn-" TYPE_X86_CPU,\ 410 .property = "level",\ 411 .value = stringify(2),\ 412 },{\ 413 .driver = "Nehalem-" TYPE_X86_CPU,\ 414 .property = "model",\ 415 .value = stringify(2),\ 416 },{\ 417 .driver = "Nehalem-" TYPE_X86_CPU,\ 418 .property = "level",\ 419 .value = stringify(2),\ 420 },{\ 421 .driver = "virtio-net-pci",\ 422 .property = "any_layout",\ 423 .value = "off",\ 424 },{\ 425 .driver = TYPE_X86_CPU,\ 426 .property = "pmu",\ 427 .value = "on",\ 428 },{\ 429 .driver = "i440FX-pcihost",\ 430 .property = "short_root_bus",\ 431 .value = stringify(0),\ 432 },{\ 433 .driver = "q35-pcihost",\ 434 .property = "short_root_bus",\ 435 .value = stringify(0),\ 436 } 437 438 #define PC_COMPAT_1_4 \ 439 PC_COMPAT_1_5, \ 440 {\ 441 .driver = "scsi-hd",\ 442 .property = "discard_granularity",\ 443 .value = stringify(0),\ 444 },{\ 445 .driver = "scsi-cd",\ 446 .property = "discard_granularity",\ 447 .value = stringify(0),\ 448 },{\ 449 .driver = "scsi-disk",\ 450 .property = "discard_granularity",\ 451 .value = stringify(0),\ 452 },{\ 453 .driver = "ide-hd",\ 454 .property = "discard_granularity",\ 455 .value = stringify(0),\ 456 },{\ 457 .driver = "ide-cd",\ 458 .property = "discard_granularity",\ 459 .value = stringify(0),\ 460 },{\ 461 .driver = "ide-drive",\ 462 .property = "discard_granularity",\ 463 .value = stringify(0),\ 464 },{\ 465 .driver = "virtio-blk-pci",\ 466 .property = "discard_granularity",\ 467 .value = stringify(0),\ 468 },{\ 469 .driver = "virtio-serial-pci",\ 470 .property = "vectors",\ 471 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 472 .value = stringify(0xFFFFFFFF),\ 473 },{ \ 474 .driver = "virtio-net-pci", \ 475 .property = "ctrl_guest_offloads", \ 476 .value = "off", \ 477 },{\ 478 .driver = "e1000",\ 479 .property = "romfile",\ 480 .value = "pxe-e1000.rom",\ 481 },{\ 482 .driver = "ne2k_pci",\ 483 .property = "romfile",\ 484 .value = "pxe-ne2k_pci.rom",\ 485 },{\ 486 .driver = "pcnet",\ 487 .property = "romfile",\ 488 .value = "pxe-pcnet.rom",\ 489 },{\ 490 .driver = "rtl8139",\ 491 .property = "romfile",\ 492 .value = "pxe-rtl8139.rom",\ 493 },{\ 494 .driver = "virtio-net-pci",\ 495 .property = "romfile",\ 496 .value = "pxe-virtio.rom",\ 497 },{\ 498 .driver = "486-" TYPE_X86_CPU,\ 499 .property = "model",\ 500 .value = stringify(0),\ 501 } 502 503 #define PC_COMMON_MACHINE_OPTIONS \ 504 .default_boot_order = "cad" 505 506 #define PC_DEFAULT_MACHINE_OPTIONS \ 507 PC_COMMON_MACHINE_OPTIONS, \ 508 .hot_add_cpu = pc_hot_add_cpu, \ 509 .max_cpus = 255 510 511 #endif 512