1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/isa/isa.h" 7 #include "hw/block/fdc.h" 8 #include "net/net.h" 9 #include "hw/i386/ioapic.h" 10 11 #include "qemu/range.h" 12 13 /* PC-style peripherals (also used by other machines). */ 14 15 typedef struct PcPciInfo { 16 Range w32; 17 Range w64; 18 } PcPciInfo; 19 20 struct PcGuestInfo { 21 bool has_pci_info; 22 bool isapc_ram_fw; 23 FWCfgState *fw_cfg; 24 }; 25 26 /* parallel.c */ 27 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 28 { 29 DeviceState *dev; 30 ISADevice *isadev; 31 32 isadev = isa_try_create(bus, "isa-parallel"); 33 if (!isadev) { 34 return false; 35 } 36 dev = DEVICE(isadev); 37 qdev_prop_set_uint32(dev, "index", index); 38 qdev_prop_set_chr(dev, "chardev", chr); 39 if (qdev_init(dev) < 0) { 40 return false; 41 } 42 return true; 43 } 44 45 bool parallel_mm_init(MemoryRegion *address_space, 46 hwaddr base, int it_shift, qemu_irq irq, 47 CharDriverState *chr); 48 49 /* i8259.c */ 50 51 extern DeviceState *isa_pic; 52 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 53 qemu_irq *kvm_i8259_init(ISABus *bus); 54 int pic_read_irq(DeviceState *d); 55 int pic_get_output(DeviceState *d); 56 void pic_info(Monitor *mon, const QDict *qdict); 57 void irq_info(Monitor *mon, const QDict *qdict); 58 59 /* Global System Interrupts */ 60 61 #define GSI_NUM_PINS IOAPIC_NUM_PINS 62 63 typedef struct GSIState { 64 qemu_irq i8259_irq[ISA_NUM_IRQS]; 65 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 66 } GSIState; 67 68 void gsi_handler(void *opaque, int n, int level); 69 70 /* vmport.c */ 71 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 72 73 static inline void vmport_init(ISABus *bus) 74 { 75 isa_create_simple(bus, "vmport"); 76 } 77 78 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 79 void vmmouse_get_data(uint32_t *data); 80 void vmmouse_set_data(const uint32_t *data); 81 82 /* pckbd.c */ 83 84 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 85 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 86 MemoryRegion *region, ram_addr_t size, 87 hwaddr mask); 88 void i8042_isa_mouse_fake_event(void *opaque); 89 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 90 91 /* pc.c */ 92 extern int fd_bootchk; 93 94 void pc_register_ferr_irq(qemu_irq irq); 95 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 96 97 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 98 void pc_hot_add_cpu(const int64_t id, Error **errp); 99 void pc_acpi_init(const char *default_dsdt); 100 101 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 102 ram_addr_t above_4g_mem_size); 103 104 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 105 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 106 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 107 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 108 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 109 #define DEFAULT_PCI_HOLE64_SIZE (1ULL << 31) 110 111 void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start, 112 uint64_t pci_hole64_size); 113 114 FWCfgState *pc_memory_init(MemoryRegion *system_memory, 115 const char *kernel_filename, 116 const char *kernel_cmdline, 117 const char *initrd_filename, 118 ram_addr_t below_4g_mem_size, 119 ram_addr_t above_4g_mem_size, 120 MemoryRegion *rom_memory, 121 MemoryRegion **ram_memory, 122 PcGuestInfo *guest_info); 123 qemu_irq *pc_allocate_cpu_irq(void); 124 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 125 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 126 ISADevice **rtc_state, 127 ISADevice **floppy, 128 bool no_vmport); 129 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 130 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 131 const char *boot_device, 132 ISADevice *floppy, BusState *ide0, BusState *ide1, 133 ISADevice *s); 134 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 135 void pc_pci_device_init(PCIBus *pci_bus); 136 137 typedef void (*cpu_set_smm_t)(int smm, void *arg); 138 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 139 140 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 141 142 /* acpi_piix.c */ 143 144 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 145 qemu_irq sci_irq, qemu_irq smi_irq, 146 int kvm_enabled, FWCfgState *fw_cfg); 147 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 148 149 /* hpet.c */ 150 extern int no_hpet; 151 152 /* piix_pci.c */ 153 struct PCII440FXState; 154 typedef struct PCII440FXState PCII440FXState; 155 156 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 157 ISABus **isa_bus, qemu_irq *pic, 158 MemoryRegion *address_space_mem, 159 MemoryRegion *address_space_io, 160 ram_addr_t ram_size, 161 hwaddr pci_hole_start, 162 hwaddr pci_hole_size, 163 ram_addr_t above_4g_mem_size, 164 MemoryRegion *pci_memory, 165 MemoryRegion *ram_memory); 166 167 /* piix4.c */ 168 extern PCIDevice *piix4_dev; 169 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 170 171 /* vga.c */ 172 enum vga_retrace_method { 173 VGA_RETRACE_DUMB, 174 VGA_RETRACE_PRECISE 175 }; 176 177 extern enum vga_retrace_method vga_retrace_method; 178 179 int isa_vga_mm_init(hwaddr vram_base, 180 hwaddr ctrl_base, int it_shift, 181 MemoryRegion *address_space); 182 183 /* ne2000.c */ 184 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 185 { 186 DeviceState *dev; 187 ISADevice *isadev; 188 189 qemu_check_nic_model(nd, "ne2k_isa"); 190 191 isadev = isa_try_create(bus, "ne2k_isa"); 192 if (!isadev) { 193 return false; 194 } 195 dev = DEVICE(isadev); 196 qdev_prop_set_uint32(dev, "iobase", base); 197 qdev_prop_set_uint32(dev, "irq", irq); 198 qdev_set_nic_properties(dev, nd); 199 qdev_init_nofail(dev); 200 return true; 201 } 202 203 /* pc_sysfw.c */ 204 void pc_system_firmware_init(MemoryRegion *rom_memory, 205 bool isapc_ram_fw); 206 207 /* pvpanic.c */ 208 void pvpanic_init(ISABus *bus); 209 210 /* e820 types */ 211 #define E820_RAM 1 212 #define E820_RESERVED 2 213 #define E820_ACPI 3 214 #define E820_NVS 4 215 #define E820_UNUSABLE 5 216 217 int e820_add_entry(uint64_t, uint64_t, uint32_t); 218 219 #define PC_COMPAT_1_5 \ 220 {\ 221 .driver = "Conroe-" TYPE_X86_CPU,\ 222 .property = "model",\ 223 .value = stringify(2),\ 224 },{\ 225 .driver = "Conroe-" TYPE_X86_CPU,\ 226 .property = "level",\ 227 .value = stringify(2),\ 228 },{\ 229 .driver = "Penryn-" TYPE_X86_CPU,\ 230 .property = "model",\ 231 .value = stringify(2),\ 232 },{\ 233 .driver = "Penryn-" TYPE_X86_CPU,\ 234 .property = "level",\ 235 .value = stringify(2),\ 236 },{\ 237 .driver = "Nehalem-" TYPE_X86_CPU,\ 238 .property = "model",\ 239 .value = stringify(2),\ 240 },{\ 241 .driver = "Nehalem-" TYPE_X86_CPU,\ 242 .property = "level",\ 243 .value = stringify(2),\ 244 },{\ 245 .driver = "virtio-net-pci",\ 246 .property = "any_layout",\ 247 .value = "off",\ 248 },{\ 249 .driver = TYPE_X86_CPU,\ 250 .property = "pmu",\ 251 .value = "on",\ 252 } 253 254 #define PC_COMPAT_1_4 \ 255 PC_COMPAT_1_5, \ 256 {\ 257 .driver = "scsi-hd",\ 258 .property = "discard_granularity",\ 259 .value = stringify(0),\ 260 },{\ 261 .driver = "scsi-cd",\ 262 .property = "discard_granularity",\ 263 .value = stringify(0),\ 264 },{\ 265 .driver = "scsi-disk",\ 266 .property = "discard_granularity",\ 267 .value = stringify(0),\ 268 },{\ 269 .driver = "ide-hd",\ 270 .property = "discard_granularity",\ 271 .value = stringify(0),\ 272 },{\ 273 .driver = "ide-cd",\ 274 .property = "discard_granularity",\ 275 .value = stringify(0),\ 276 },{\ 277 .driver = "ide-drive",\ 278 .property = "discard_granularity",\ 279 .value = stringify(0),\ 280 },{\ 281 .driver = "virtio-blk-pci",\ 282 .property = "discard_granularity",\ 283 .value = stringify(0),\ 284 },{\ 285 .driver = "virtio-serial-pci",\ 286 .property = "vectors",\ 287 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 288 .value = stringify(0xFFFFFFFF),\ 289 },{ \ 290 .driver = "virtio-net-pci", \ 291 .property = "ctrl_guest_offloads", \ 292 .value = "off", \ 293 },{\ 294 .driver = "e1000",\ 295 .property = "romfile",\ 296 .value = "pxe-e1000.rom",\ 297 },{\ 298 .driver = "ne2k_pci",\ 299 .property = "romfile",\ 300 .value = "pxe-ne2k_pci.rom",\ 301 },{\ 302 .driver = "pcnet",\ 303 .property = "romfile",\ 304 .value = "pxe-pcnet.rom",\ 305 },{\ 306 .driver = "rtl8139",\ 307 .property = "romfile",\ 308 .value = "pxe-rtl8139.rom",\ 309 },{\ 310 .driver = "virtio-net-pci",\ 311 .property = "romfile",\ 312 .value = "pxe-virtio.rom",\ 313 },{\ 314 .driver = "486-" TYPE_X86_CPU,\ 315 .property = "model",\ 316 .value = stringify(0),\ 317 } 318 319 #endif 320