1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "qemu/typedefs.h" 6 #include "exec/memory.h" 7 #include "hw/boards.h" 8 #include "hw/isa/isa.h" 9 #include "hw/block/fdc.h" 10 #include "net/net.h" 11 #include "hw/i386/ioapic.h" 12 13 #include "qemu/range.h" 14 #include "qemu/bitmap.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/pci/pci.h" 17 #include "hw/boards.h" 18 #include "hw/compat.h" 19 #include "hw/mem/pc-dimm.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 #ifdef CONFIG_KVM 24 #define kvm_pit_in_kernel() \ 25 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 26 #define kvm_pic_in_kernel() \ 27 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 28 #define kvm_ioapic_in_kernel() \ 29 (kvm_irqchip_in_kernel() && !kvm_irqchip_is_split()) 30 #else 31 #define kvm_pit_in_kernel() 0 32 #define kvm_pic_in_kernel() 0 33 #define kvm_ioapic_in_kernel() 0 34 #endif 35 36 /** 37 * PCMachineState: 38 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 39 */ 40 struct PCMachineState { 41 /*< private >*/ 42 MachineState parent_obj; 43 44 /* <public> */ 45 46 /* State for other subsystems/APIs: */ 47 MemoryHotplugState hotplug_memory; 48 Notifier machine_done; 49 50 /* Pointers to devices and objects: */ 51 HotplugHandler *acpi_dev; 52 ISADevice *rtc; 53 PCIBus *bus; 54 FWCfgState *fw_cfg; 55 56 /* Configuration options: */ 57 uint64_t max_ram_below_4g; 58 OnOffAuto vmport; 59 OnOffAuto smm; 60 bool nvdimm; 61 62 /* RAM information (sizes, addresses, configuration): */ 63 ram_addr_t below_4g_mem_size, above_4g_mem_size; 64 65 /* CPU and apic information: */ 66 bool apic_xrupt_override; 67 unsigned apic_id_limit; 68 69 /* NUMA information: */ 70 uint64_t numa_nodes; 71 uint64_t *node_mem; 72 uint64_t *node_cpu; 73 }; 74 75 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 76 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 77 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 78 #define PC_MACHINE_VMPORT "vmport" 79 #define PC_MACHINE_SMM "smm" 80 #define PC_MACHINE_NVDIMM "nvdimm" 81 82 /** 83 * PCMachineClass: 84 * 85 * Methods: 86 * 87 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 88 * 89 * Compat fields: 90 * 91 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 92 * backend's alignment value if provided 93 * @acpi_data_size: Size of the chunk of memory at the top of RAM 94 * for the BIOS ACPI tables and other BIOS 95 * datastructures. 96 * @gigabyte_align: Make sure that guest addresses aligned at 97 * 1Gbyte boundaries get mapped to host 98 * addresses aligned at 1Gbyte boundaries. This 99 * way we can use 1GByte pages in the host. 100 * 101 */ 102 struct PCMachineClass { 103 /*< private >*/ 104 MachineClass parent_class; 105 106 /*< public >*/ 107 108 /* Methods: */ 109 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 110 DeviceState *dev); 111 112 /* Device configuration: */ 113 bool pci_enabled; 114 bool kvmclock_enabled; 115 116 /* Compat options: */ 117 118 /* ACPI compat: */ 119 bool has_acpi_build; 120 bool rsdp_in_ram; 121 int legacy_acpi_table_size; 122 unsigned acpi_data_size; 123 124 /* SMBIOS compat: */ 125 bool smbios_defaults; 126 bool smbios_legacy_mode; 127 bool smbios_uuid_encoded; 128 129 /* RAM / address space compat: */ 130 bool gigabyte_align; 131 bool has_reserved_memory; 132 bool enforce_aligned_dimm; 133 bool broken_reserved_end; 134 135 /* TSC rate migration: */ 136 bool save_tsc_khz; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* PC-style peripherals (also used by other machines). */ 148 149 typedef struct PcPciInfo { 150 Range w32; 151 Range w64; 152 } PcPciInfo; 153 154 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 155 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 156 #define ACPI_PM_PROP_S4_VAL "s4_val" 157 #define ACPI_PM_PROP_SCI_INT "sci_int" 158 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 159 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 160 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 161 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 162 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 163 #define ACPI_PM_PROP_TCO_ENABLED "enable_tco" 164 165 /* parallel.c */ 166 167 void parallel_hds_isa_init(ISABus *bus, int n); 168 169 bool parallel_mm_init(MemoryRegion *address_space, 170 hwaddr base, int it_shift, qemu_irq irq, 171 CharDriverState *chr); 172 173 /* i8259.c */ 174 175 extern DeviceState *isa_pic; 176 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 177 qemu_irq *kvm_i8259_init(ISABus *bus); 178 int pic_read_irq(DeviceState *d); 179 int pic_get_output(DeviceState *d); 180 void hmp_info_pic(Monitor *mon, const QDict *qdict); 181 void hmp_info_irq(Monitor *mon, const QDict *qdict); 182 183 /* ioapic.c */ 184 185 void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict); 186 void ioapic_dump_state(Monitor *mon, const QDict *qdict); 187 188 /* Global System Interrupts */ 189 190 #define GSI_NUM_PINS IOAPIC_NUM_PINS 191 192 typedef struct GSIState { 193 qemu_irq i8259_irq[ISA_NUM_IRQS]; 194 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 195 } GSIState; 196 197 void gsi_handler(void *opaque, int n, int level); 198 199 /* vmport.c */ 200 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 201 202 static inline void vmport_init(ISABus *bus) 203 { 204 isa_create_simple(bus, "vmport"); 205 } 206 207 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 208 void vmmouse_get_data(uint32_t *data); 209 void vmmouse_set_data(const uint32_t *data); 210 211 /* pckbd.c */ 212 213 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 214 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 215 MemoryRegion *region, ram_addr_t size, 216 hwaddr mask); 217 void i8042_isa_mouse_fake_event(void *opaque); 218 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 219 220 /* pc.c */ 221 extern int fd_bootchk; 222 223 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 224 void pc_register_ferr_irq(qemu_irq irq); 225 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 226 227 void pc_cpus_init(PCMachineState *pcms); 228 void pc_hot_add_cpu(const int64_t id, Error **errp); 229 void pc_acpi_init(const char *default_dsdt); 230 231 void pc_guest_info_init(PCMachineState *pcms); 232 233 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 234 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 235 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 236 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 237 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 238 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 239 240 241 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 242 MemoryRegion *pci_address_space); 243 244 void xen_load_linux(PCMachineState *pcms); 245 void pc_memory_init(PCMachineState *pcms, 246 MemoryRegion *system_memory, 247 MemoryRegion *rom_memory, 248 MemoryRegion **ram_memory); 249 qemu_irq pc_allocate_cpu_irq(void); 250 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 251 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 252 ISADevice **rtc_state, 253 bool create_fdctrl, 254 bool no_vmport, 255 uint32_t hpet_irqs); 256 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 257 void pc_cmos_init(PCMachineState *pcms, 258 BusState *ide0, BusState *ide1, 259 ISADevice *s); 260 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 261 void pc_pci_device_init(PCIBus *pci_bus); 262 263 typedef void (*cpu_set_smm_t)(int smm, void *arg); 264 265 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 266 267 ISADevice *pc_find_fdc0(void); 268 269 #define FW_CFG_IO_BASE 0x510 270 271 /* acpi_piix.c */ 272 273 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 274 qemu_irq sci_irq, qemu_irq smi_irq, 275 int smm_enabled, DeviceState **piix4_pm); 276 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 277 278 /* hpet.c */ 279 extern int no_hpet; 280 281 /* piix_pci.c */ 282 struct PCII440FXState; 283 typedef struct PCII440FXState PCII440FXState; 284 285 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 286 #define TYPE_I440FX_PCI_DEVICE "i440FX" 287 288 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 289 290 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 291 PCII440FXState **pi440fx_state, int *piix_devfn, 292 ISABus **isa_bus, qemu_irq *pic, 293 MemoryRegion *address_space_mem, 294 MemoryRegion *address_space_io, 295 ram_addr_t ram_size, 296 ram_addr_t below_4g_mem_size, 297 ram_addr_t above_4g_mem_size, 298 MemoryRegion *pci_memory, 299 MemoryRegion *ram_memory); 300 301 PCIBus *find_i440fx(void); 302 /* piix4.c */ 303 extern PCIDevice *piix4_dev; 304 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 305 306 /* vga.c */ 307 enum vga_retrace_method { 308 VGA_RETRACE_DUMB, 309 VGA_RETRACE_PRECISE 310 }; 311 312 extern enum vga_retrace_method vga_retrace_method; 313 314 int isa_vga_mm_init(hwaddr vram_base, 315 hwaddr ctrl_base, int it_shift, 316 MemoryRegion *address_space); 317 318 /* ne2000.c */ 319 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 320 { 321 DeviceState *dev; 322 ISADevice *isadev; 323 324 qemu_check_nic_model(nd, "ne2k_isa"); 325 326 isadev = isa_try_create(bus, "ne2k_isa"); 327 if (!isadev) { 328 return false; 329 } 330 dev = DEVICE(isadev); 331 qdev_prop_set_uint32(dev, "iobase", base); 332 qdev_prop_set_uint32(dev, "irq", irq); 333 qdev_set_nic_properties(dev, nd); 334 qdev_init_nofail(dev); 335 return true; 336 } 337 338 /* pc_sysfw.c */ 339 void pc_system_firmware_init(MemoryRegion *rom_memory, 340 bool isapc_ram_fw); 341 342 /* pvpanic.c */ 343 uint16_t pvpanic_port(void); 344 345 /* e820 types */ 346 #define E820_RAM 1 347 #define E820_RESERVED 2 348 #define E820_ACPI 3 349 #define E820_NVS 4 350 #define E820_UNUSABLE 5 351 352 int e820_add_entry(uint64_t, uint64_t, uint32_t); 353 int e820_get_num_entries(void); 354 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 355 356 #define PC_COMPAT_2_5 \ 357 HW_COMPAT_2_5 358 359 #define PC_COMPAT_2_4 \ 360 PC_COMPAT_2_5 \ 361 HW_COMPAT_2_4 \ 362 {\ 363 .driver = "Haswell-" TYPE_X86_CPU,\ 364 .property = "abm",\ 365 .value = "off",\ 366 },\ 367 {\ 368 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 369 .property = "abm",\ 370 .value = "off",\ 371 },\ 372 {\ 373 .driver = "Broadwell-" TYPE_X86_CPU,\ 374 .property = "abm",\ 375 .value = "off",\ 376 },\ 377 {\ 378 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 379 .property = "abm",\ 380 .value = "off",\ 381 },\ 382 {\ 383 .driver = "host" "-" TYPE_X86_CPU,\ 384 .property = "host-cache-info",\ 385 .value = "on",\ 386 },\ 387 {\ 388 .driver = TYPE_X86_CPU,\ 389 .property = "check",\ 390 .value = "off",\ 391 },\ 392 {\ 393 .driver = "qemu64" "-" TYPE_X86_CPU,\ 394 .property = "sse4a",\ 395 .value = "on",\ 396 },\ 397 {\ 398 .driver = "qemu64" "-" TYPE_X86_CPU,\ 399 .property = "abm",\ 400 .value = "on",\ 401 },\ 402 {\ 403 .driver = "qemu64" "-" TYPE_X86_CPU,\ 404 .property = "popcnt",\ 405 .value = "on",\ 406 },\ 407 {\ 408 .driver = "qemu32" "-" TYPE_X86_CPU,\ 409 .property = "popcnt",\ 410 .value = "on",\ 411 },{\ 412 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 413 .property = "rdtscp",\ 414 .value = "on",\ 415 },{\ 416 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 417 .property = "rdtscp",\ 418 .value = "on",\ 419 },{\ 420 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 421 .property = "rdtscp",\ 422 .value = "on",\ 423 },{\ 424 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 425 .property = "rdtscp",\ 426 .value = "on",\ 427 }, 428 429 430 #define PC_COMPAT_2_3 \ 431 PC_COMPAT_2_4 \ 432 HW_COMPAT_2_3 \ 433 {\ 434 .driver = TYPE_X86_CPU,\ 435 .property = "arat",\ 436 .value = "off",\ 437 },{\ 438 .driver = "qemu64" "-" TYPE_X86_CPU,\ 439 .property = "level",\ 440 .value = stringify(4),\ 441 },{\ 442 .driver = "kvm64" "-" TYPE_X86_CPU,\ 443 .property = "level",\ 444 .value = stringify(5),\ 445 },{\ 446 .driver = "pentium3" "-" TYPE_X86_CPU,\ 447 .property = "level",\ 448 .value = stringify(2),\ 449 },{\ 450 .driver = "n270" "-" TYPE_X86_CPU,\ 451 .property = "level",\ 452 .value = stringify(5),\ 453 },{\ 454 .driver = "Conroe" "-" TYPE_X86_CPU,\ 455 .property = "level",\ 456 .value = stringify(4),\ 457 },{\ 458 .driver = "Penryn" "-" TYPE_X86_CPU,\ 459 .property = "level",\ 460 .value = stringify(4),\ 461 },{\ 462 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 463 .property = "level",\ 464 .value = stringify(4),\ 465 },{\ 466 .driver = "n270" "-" TYPE_X86_CPU,\ 467 .property = "xlevel",\ 468 .value = stringify(0x8000000a),\ 469 },{\ 470 .driver = "Penryn" "-" TYPE_X86_CPU,\ 471 .property = "xlevel",\ 472 .value = stringify(0x8000000a),\ 473 },{\ 474 .driver = "Conroe" "-" TYPE_X86_CPU,\ 475 .property = "xlevel",\ 476 .value = stringify(0x8000000a),\ 477 },{\ 478 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 479 .property = "xlevel",\ 480 .value = stringify(0x8000000a),\ 481 },{\ 482 .driver = "Westmere" "-" TYPE_X86_CPU,\ 483 .property = "xlevel",\ 484 .value = stringify(0x8000000a),\ 485 },{\ 486 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 487 .property = "xlevel",\ 488 .value = stringify(0x8000000a),\ 489 },{\ 490 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 491 .property = "xlevel",\ 492 .value = stringify(0x8000000a),\ 493 },{\ 494 .driver = "Haswell" "-" TYPE_X86_CPU,\ 495 .property = "xlevel",\ 496 .value = stringify(0x8000000a),\ 497 },{\ 498 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 499 .property = "xlevel",\ 500 .value = stringify(0x8000000a),\ 501 },{\ 502 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 503 .property = "xlevel",\ 504 .value = stringify(0x8000000a),\ 505 },{\ 506 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 507 .property = "xlevel",\ 508 .value = stringify(0x8000000a),\ 509 }, 510 511 #define PC_COMPAT_2_2 \ 512 PC_COMPAT_2_3 \ 513 HW_COMPAT_2_2 \ 514 {\ 515 .driver = "kvm64" "-" TYPE_X86_CPU,\ 516 .property = "vme",\ 517 .value = "off",\ 518 },\ 519 {\ 520 .driver = "kvm32" "-" TYPE_X86_CPU,\ 521 .property = "vme",\ 522 .value = "off",\ 523 },\ 524 {\ 525 .driver = "Conroe" "-" TYPE_X86_CPU,\ 526 .property = "vme",\ 527 .value = "off",\ 528 },\ 529 {\ 530 .driver = "Penryn" "-" TYPE_X86_CPU,\ 531 .property = "vme",\ 532 .value = "off",\ 533 },\ 534 {\ 535 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 536 .property = "vme",\ 537 .value = "off",\ 538 },\ 539 {\ 540 .driver = "Westmere" "-" TYPE_X86_CPU,\ 541 .property = "vme",\ 542 .value = "off",\ 543 },\ 544 {\ 545 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 546 .property = "vme",\ 547 .value = "off",\ 548 },\ 549 {\ 550 .driver = "Haswell" "-" TYPE_X86_CPU,\ 551 .property = "vme",\ 552 .value = "off",\ 553 },\ 554 {\ 555 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 556 .property = "vme",\ 557 .value = "off",\ 558 },\ 559 {\ 560 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 561 .property = "vme",\ 562 .value = "off",\ 563 },\ 564 {\ 565 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 566 .property = "vme",\ 567 .value = "off",\ 568 },\ 569 {\ 570 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 571 .property = "vme",\ 572 .value = "off",\ 573 },\ 574 {\ 575 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 576 .property = "vme",\ 577 .value = "off",\ 578 },\ 579 {\ 580 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 581 .property = "vme",\ 582 .value = "off",\ 583 },\ 584 {\ 585 .driver = "Haswell" "-" TYPE_X86_CPU,\ 586 .property = "f16c",\ 587 .value = "off",\ 588 },\ 589 {\ 590 .driver = "Haswell" "-" TYPE_X86_CPU,\ 591 .property = "rdrand",\ 592 .value = "off",\ 593 },\ 594 {\ 595 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 596 .property = "f16c",\ 597 .value = "off",\ 598 },\ 599 {\ 600 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 601 .property = "rdrand",\ 602 .value = "off",\ 603 }, 604 605 #define PC_COMPAT_2_1 \ 606 PC_COMPAT_2_2 \ 607 HW_COMPAT_2_1 \ 608 {\ 609 .driver = "coreduo" "-" TYPE_X86_CPU,\ 610 .property = "vmx",\ 611 .value = "on",\ 612 },\ 613 {\ 614 .driver = "core2duo" "-" TYPE_X86_CPU,\ 615 .property = "vmx",\ 616 .value = "on",\ 617 }, 618 619 #define PC_COMPAT_2_0 \ 620 PC_COMPAT_2_1 \ 621 {\ 622 .driver = "virtio-scsi-pci",\ 623 .property = "any_layout",\ 624 .value = "off",\ 625 },{\ 626 .driver = "PIIX4_PM",\ 627 .property = "memory-hotplug-support",\ 628 .value = "off",\ 629 },\ 630 {\ 631 .driver = "apic",\ 632 .property = "version",\ 633 .value = stringify(0x11),\ 634 },\ 635 {\ 636 .driver = "nec-usb-xhci",\ 637 .property = "superspeed-ports-first",\ 638 .value = "off",\ 639 },\ 640 {\ 641 .driver = "nec-usb-xhci",\ 642 .property = "force-pcie-endcap",\ 643 .value = "on",\ 644 },\ 645 {\ 646 .driver = "pci-serial",\ 647 .property = "prog_if",\ 648 .value = stringify(0),\ 649 },\ 650 {\ 651 .driver = "pci-serial-2x",\ 652 .property = "prog_if",\ 653 .value = stringify(0),\ 654 },\ 655 {\ 656 .driver = "pci-serial-4x",\ 657 .property = "prog_if",\ 658 .value = stringify(0),\ 659 },\ 660 {\ 661 .driver = "virtio-net-pci",\ 662 .property = "guest_announce",\ 663 .value = "off",\ 664 },\ 665 {\ 666 .driver = "ICH9-LPC",\ 667 .property = "memory-hotplug-support",\ 668 .value = "off",\ 669 },{\ 670 .driver = "xio3130-downstream",\ 671 .property = COMPAT_PROP_PCP,\ 672 .value = "off",\ 673 },{\ 674 .driver = "ioh3420",\ 675 .property = COMPAT_PROP_PCP,\ 676 .value = "off",\ 677 }, 678 679 #define PC_COMPAT_1_7 \ 680 PC_COMPAT_2_0 \ 681 {\ 682 .driver = TYPE_USB_DEVICE,\ 683 .property = "msos-desc",\ 684 .value = "no",\ 685 },\ 686 {\ 687 .driver = "PIIX4_PM",\ 688 .property = "acpi-pci-hotplug-with-bridge-support",\ 689 .value = "off",\ 690 },\ 691 {\ 692 .driver = "hpet",\ 693 .property = HPET_INTCAP,\ 694 .value = stringify(4),\ 695 }, 696 697 #define PC_COMPAT_1_6 \ 698 PC_COMPAT_1_7 \ 699 {\ 700 .driver = "e1000",\ 701 .property = "mitigation",\ 702 .value = "off",\ 703 },{\ 704 .driver = "qemu64-" TYPE_X86_CPU,\ 705 .property = "model",\ 706 .value = stringify(2),\ 707 },{\ 708 .driver = "qemu32-" TYPE_X86_CPU,\ 709 .property = "model",\ 710 .value = stringify(3),\ 711 },{\ 712 .driver = "i440FX-pcihost",\ 713 .property = "short_root_bus",\ 714 .value = stringify(1),\ 715 },{\ 716 .driver = "q35-pcihost",\ 717 .property = "short_root_bus",\ 718 .value = stringify(1),\ 719 }, 720 721 #define PC_COMPAT_1_5 \ 722 PC_COMPAT_1_6 \ 723 {\ 724 .driver = "Conroe-" TYPE_X86_CPU,\ 725 .property = "model",\ 726 .value = stringify(2),\ 727 },{\ 728 .driver = "Conroe-" TYPE_X86_CPU,\ 729 .property = "level",\ 730 .value = stringify(2),\ 731 },{\ 732 .driver = "Penryn-" TYPE_X86_CPU,\ 733 .property = "model",\ 734 .value = stringify(2),\ 735 },{\ 736 .driver = "Penryn-" TYPE_X86_CPU,\ 737 .property = "level",\ 738 .value = stringify(2),\ 739 },{\ 740 .driver = "Nehalem-" TYPE_X86_CPU,\ 741 .property = "model",\ 742 .value = stringify(2),\ 743 },{\ 744 .driver = "Nehalem-" TYPE_X86_CPU,\ 745 .property = "level",\ 746 .value = stringify(2),\ 747 },{\ 748 .driver = "virtio-net-pci",\ 749 .property = "any_layout",\ 750 .value = "off",\ 751 },{\ 752 .driver = TYPE_X86_CPU,\ 753 .property = "pmu",\ 754 .value = "on",\ 755 },{\ 756 .driver = "i440FX-pcihost",\ 757 .property = "short_root_bus",\ 758 .value = stringify(0),\ 759 },{\ 760 .driver = "q35-pcihost",\ 761 .property = "short_root_bus",\ 762 .value = stringify(0),\ 763 }, 764 765 #define PC_COMPAT_1_4 \ 766 PC_COMPAT_1_5 \ 767 {\ 768 .driver = "scsi-hd",\ 769 .property = "discard_granularity",\ 770 .value = stringify(0),\ 771 },{\ 772 .driver = "scsi-cd",\ 773 .property = "discard_granularity",\ 774 .value = stringify(0),\ 775 },{\ 776 .driver = "scsi-disk",\ 777 .property = "discard_granularity",\ 778 .value = stringify(0),\ 779 },{\ 780 .driver = "ide-hd",\ 781 .property = "discard_granularity",\ 782 .value = stringify(0),\ 783 },{\ 784 .driver = "ide-cd",\ 785 .property = "discard_granularity",\ 786 .value = stringify(0),\ 787 },{\ 788 .driver = "ide-drive",\ 789 .property = "discard_granularity",\ 790 .value = stringify(0),\ 791 },{\ 792 .driver = "virtio-blk-pci",\ 793 .property = "discard_granularity",\ 794 .value = stringify(0),\ 795 },{\ 796 .driver = "virtio-serial-pci",\ 797 .property = "vectors",\ 798 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 799 .value = stringify(0xFFFFFFFF),\ 800 },{ \ 801 .driver = "virtio-net-pci", \ 802 .property = "ctrl_guest_offloads", \ 803 .value = "off", \ 804 },{\ 805 .driver = "e1000",\ 806 .property = "romfile",\ 807 .value = "pxe-e1000.rom",\ 808 },{\ 809 .driver = "ne2k_pci",\ 810 .property = "romfile",\ 811 .value = "pxe-ne2k_pci.rom",\ 812 },{\ 813 .driver = "pcnet",\ 814 .property = "romfile",\ 815 .value = "pxe-pcnet.rom",\ 816 },{\ 817 .driver = "rtl8139",\ 818 .property = "romfile",\ 819 .value = "pxe-rtl8139.rom",\ 820 },{\ 821 .driver = "virtio-net-pci",\ 822 .property = "romfile",\ 823 .value = "pxe-virtio.rom",\ 824 },{\ 825 .driver = "486-" TYPE_X86_CPU,\ 826 .property = "model",\ 827 .value = stringify(0),\ 828 },\ 829 {\ 830 .driver = "n270" "-" TYPE_X86_CPU,\ 831 .property = "movbe",\ 832 .value = "off",\ 833 },\ 834 {\ 835 .driver = "Westmere" "-" TYPE_X86_CPU,\ 836 .property = "pclmulqdq",\ 837 .value = "off",\ 838 }, 839 840 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 841 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 842 { \ 843 MachineClass *mc = MACHINE_CLASS(oc); \ 844 optsfn(mc); \ 845 mc->name = namestr; \ 846 mc->init = initfn; \ 847 } \ 848 static const TypeInfo pc_machine_type_##suffix = { \ 849 .name = namestr TYPE_MACHINE_SUFFIX, \ 850 .parent = TYPE_PC_MACHINE, \ 851 .class_init = pc_machine_##suffix##_class_init, \ 852 }; \ 853 static void pc_machine_init_##suffix(void) \ 854 { \ 855 type_register(&pc_machine_type_##suffix); \ 856 } \ 857 machine_init(pc_machine_init_##suffix) 858 859 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 860 #endif 861