1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 23 * address space begins. 24 * @hotplug_memory: hotplug memory addess space container 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 */ 27 struct PCMachineState { 28 /*< private >*/ 29 MachineState parent_obj; 30 31 /* <public> */ 32 ram_addr_t hotplug_memory_base; 33 MemoryRegion hotplug_memory; 34 35 HotplugHandler *acpi_dev; 36 }; 37 38 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 39 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 40 41 /** 42 * PCMachineClass: 43 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 44 */ 45 struct PCMachineClass { 46 /*< private >*/ 47 MachineClass parent_class; 48 49 /*< public >*/ 50 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 51 DeviceState *dev); 52 }; 53 54 typedef struct PCMachineState PCMachineState; 55 typedef struct PCMachineClass PCMachineClass; 56 57 #define TYPE_PC_MACHINE "generic-pc-machine" 58 #define PC_MACHINE(obj) \ 59 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 60 #define PC_MACHINE_GET_CLASS(obj) \ 61 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 62 #define PC_MACHINE_CLASS(klass) \ 63 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 64 65 void qemu_register_pc_machine(QEMUMachine *m); 66 67 /* PC-style peripherals (also used by other machines). */ 68 69 typedef struct PcPciInfo { 70 Range w32; 71 Range w64; 72 } PcPciInfo; 73 74 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 75 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 76 #define ACPI_PM_PROP_S4_VAL "s4_val" 77 #define ACPI_PM_PROP_SCI_INT "sci_int" 78 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 79 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 80 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 81 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 82 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 83 84 struct PcGuestInfo { 85 bool has_pci_info; 86 bool isapc_ram_fw; 87 hwaddr ram_size, ram_size_below_4g; 88 unsigned apic_id_limit; 89 bool apic_xrupt_override; 90 uint64_t numa_nodes; 91 uint64_t *node_mem; 92 uint64_t *node_cpu; 93 FWCfgState *fw_cfg; 94 bool has_acpi_build; 95 bool has_reserved_memory; 96 }; 97 98 /* parallel.c */ 99 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 100 { 101 DeviceState *dev; 102 ISADevice *isadev; 103 104 isadev = isa_try_create(bus, "isa-parallel"); 105 if (!isadev) { 106 return false; 107 } 108 dev = DEVICE(isadev); 109 qdev_prop_set_uint32(dev, "index", index); 110 qdev_prop_set_chr(dev, "chardev", chr); 111 if (qdev_init(dev) < 0) { 112 return false; 113 } 114 return true; 115 } 116 117 bool parallel_mm_init(MemoryRegion *address_space, 118 hwaddr base, int it_shift, qemu_irq irq, 119 CharDriverState *chr); 120 121 /* i8259.c */ 122 123 extern DeviceState *isa_pic; 124 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 125 qemu_irq *kvm_i8259_init(ISABus *bus); 126 int pic_read_irq(DeviceState *d); 127 int pic_get_output(DeviceState *d); 128 void pic_info(Monitor *mon, const QDict *qdict); 129 void irq_info(Monitor *mon, const QDict *qdict); 130 131 /* Global System Interrupts */ 132 133 #define GSI_NUM_PINS IOAPIC_NUM_PINS 134 135 typedef struct GSIState { 136 qemu_irq i8259_irq[ISA_NUM_IRQS]; 137 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 138 } GSIState; 139 140 void gsi_handler(void *opaque, int n, int level); 141 142 /* vmport.c */ 143 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 144 145 static inline void vmport_init(ISABus *bus) 146 { 147 isa_create_simple(bus, "vmport"); 148 } 149 150 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 151 void vmmouse_get_data(uint32_t *data); 152 void vmmouse_set_data(const uint32_t *data); 153 154 /* pckbd.c */ 155 156 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 157 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 158 MemoryRegion *region, ram_addr_t size, 159 hwaddr mask); 160 void i8042_isa_mouse_fake_event(void *opaque); 161 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 162 163 /* pc.c */ 164 extern int fd_bootchk; 165 166 void pc_register_ferr_irq(qemu_irq irq); 167 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 168 169 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 170 void pc_hot_add_cpu(const int64_t id, Error **errp); 171 void pc_acpi_init(const char *default_dsdt); 172 173 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 174 ram_addr_t above_4g_mem_size); 175 176 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 177 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 178 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 179 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 180 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 181 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 182 183 184 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 185 MemoryRegion *pci_address_space); 186 187 FWCfgState *pc_memory_init(MachineState *machine, 188 MemoryRegion *system_memory, 189 ram_addr_t below_4g_mem_size, 190 ram_addr_t above_4g_mem_size, 191 MemoryRegion *rom_memory, 192 MemoryRegion **ram_memory, 193 PcGuestInfo *guest_info); 194 qemu_irq *pc_allocate_cpu_irq(void); 195 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 196 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 197 ISADevice **rtc_state, 198 ISADevice **floppy, 199 bool no_vmport, 200 uint32 hpet_irqs); 201 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 202 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 203 const char *boot_device, 204 ISADevice *floppy, BusState *ide0, BusState *ide1, 205 ISADevice *s); 206 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 207 void pc_pci_device_init(PCIBus *pci_bus); 208 209 typedef void (*cpu_set_smm_t)(int smm, void *arg); 210 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 211 212 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 213 214 /* acpi_piix.c */ 215 216 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 217 qemu_irq sci_irq, qemu_irq smi_irq, 218 int kvm_enabled, FWCfgState *fw_cfg, 219 DeviceState **piix4_pm); 220 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 221 222 /* hpet.c */ 223 extern int no_hpet; 224 225 /* piix_pci.c */ 226 struct PCII440FXState; 227 typedef struct PCII440FXState PCII440FXState; 228 229 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 230 ISABus **isa_bus, qemu_irq *pic, 231 MemoryRegion *address_space_mem, 232 MemoryRegion *address_space_io, 233 ram_addr_t ram_size, 234 ram_addr_t below_4g_mem_size, 235 ram_addr_t above_4g_mem_size, 236 MemoryRegion *pci_memory, 237 MemoryRegion *ram_memory); 238 239 PCIBus *find_i440fx(void); 240 /* piix4.c */ 241 extern PCIDevice *piix4_dev; 242 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 243 244 /* vga.c */ 245 enum vga_retrace_method { 246 VGA_RETRACE_DUMB, 247 VGA_RETRACE_PRECISE 248 }; 249 250 extern enum vga_retrace_method vga_retrace_method; 251 252 int isa_vga_mm_init(hwaddr vram_base, 253 hwaddr ctrl_base, int it_shift, 254 MemoryRegion *address_space); 255 256 /* ne2000.c */ 257 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 258 { 259 DeviceState *dev; 260 ISADevice *isadev; 261 262 qemu_check_nic_model(nd, "ne2k_isa"); 263 264 isadev = isa_try_create(bus, "ne2k_isa"); 265 if (!isadev) { 266 return false; 267 } 268 dev = DEVICE(isadev); 269 qdev_prop_set_uint32(dev, "iobase", base); 270 qdev_prop_set_uint32(dev, "irq", irq); 271 qdev_set_nic_properties(dev, nd); 272 qdev_init_nofail(dev); 273 return true; 274 } 275 276 /* pc_sysfw.c */ 277 void pc_system_firmware_init(MemoryRegion *rom_memory, 278 bool isapc_ram_fw); 279 280 /* pvpanic.c */ 281 uint16_t pvpanic_port(void); 282 283 /* e820 types */ 284 #define E820_RAM 1 285 #define E820_RESERVED 2 286 #define E820_ACPI 3 287 #define E820_NVS 4 288 #define E820_UNUSABLE 5 289 290 int e820_add_entry(uint64_t, uint64_t, uint32_t); 291 int e820_get_num_entries(void); 292 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 293 294 #define PC_Q35_COMPAT_2_0 \ 295 PC_COMPAT_2_0, \ 296 {\ 297 .driver = "ICH9-LPC",\ 298 .property = "memory-hotplug-support",\ 299 .value = "off",\ 300 } 301 302 #define PC_Q35_COMPAT_1_7 \ 303 PC_COMPAT_1_7, \ 304 PC_Q35_COMPAT_2_0, \ 305 {\ 306 .driver = "hpet",\ 307 .property = HPET_INTCAP,\ 308 .value = stringify(4),\ 309 } 310 311 #define PC_Q35_COMPAT_1_6 \ 312 PC_COMPAT_1_6, \ 313 PC_Q35_COMPAT_1_7 314 315 #define PC_Q35_COMPAT_1_5 \ 316 PC_COMPAT_1_5, \ 317 PC_Q35_COMPAT_1_6 318 319 #define PC_Q35_COMPAT_1_4 \ 320 PC_COMPAT_1_4, \ 321 PC_Q35_COMPAT_1_5 322 323 #define PC_COMPAT_2_0 \ 324 {\ 325 .driver = "virtio-scsi-pci",\ 326 .property = "any_layout",\ 327 .value = "off",\ 328 },{\ 329 .driver = "PIIX4_PM",\ 330 .property = "memory-hotplug-support",\ 331 .value = "off",\ 332 },\ 333 {\ 334 .driver = "apic",\ 335 .property = "version",\ 336 .value = stringify(0x11),\ 337 },\ 338 {\ 339 .driver = "nec-usb-xhci",\ 340 .property = "superspeed-ports-first",\ 341 .value = "off",\ 342 },\ 343 {\ 344 .driver = "pci-serial",\ 345 .property = "prog_if",\ 346 .value = stringify(0),\ 347 },\ 348 {\ 349 .driver = "pci-serial-2x",\ 350 .property = "prof_if",\ 351 .value = stringify(0),\ 352 },\ 353 {\ 354 .driver = "pci-serial-4x",\ 355 .property = "prog_if",\ 356 .value = stringify(0),\ 357 },\ 358 {\ 359 .driver = "virtio-net-pci",\ 360 .property = "guest_announce",\ 361 .value = "off",\ 362 } 363 364 #define PC_COMPAT_1_7 \ 365 PC_COMPAT_2_0, \ 366 {\ 367 .driver = TYPE_USB_DEVICE,\ 368 .property = "msos-desc",\ 369 .value = "no",\ 370 },\ 371 {\ 372 .driver = "PIIX4_PM",\ 373 .property = "acpi-pci-hotplug-with-bridge-support",\ 374 .value = "off",\ 375 } 376 377 #define PC_COMPAT_1_6 \ 378 PC_COMPAT_1_7, \ 379 {\ 380 .driver = "e1000",\ 381 .property = "mitigation",\ 382 .value = "off",\ 383 },{\ 384 .driver = "qemu64-" TYPE_X86_CPU,\ 385 .property = "model",\ 386 .value = stringify(2),\ 387 },{\ 388 .driver = "qemu32-" TYPE_X86_CPU,\ 389 .property = "model",\ 390 .value = stringify(3),\ 391 },{\ 392 .driver = "i440FX-pcihost",\ 393 .property = "short_root_bus",\ 394 .value = stringify(1),\ 395 },{\ 396 .driver = "q35-pcihost",\ 397 .property = "short_root_bus",\ 398 .value = stringify(1),\ 399 } 400 401 #define PC_COMPAT_1_5 \ 402 PC_COMPAT_1_6, \ 403 {\ 404 .driver = "Conroe-" TYPE_X86_CPU,\ 405 .property = "model",\ 406 .value = stringify(2),\ 407 },{\ 408 .driver = "Conroe-" TYPE_X86_CPU,\ 409 .property = "level",\ 410 .value = stringify(2),\ 411 },{\ 412 .driver = "Penryn-" TYPE_X86_CPU,\ 413 .property = "model",\ 414 .value = stringify(2),\ 415 },{\ 416 .driver = "Penryn-" TYPE_X86_CPU,\ 417 .property = "level",\ 418 .value = stringify(2),\ 419 },{\ 420 .driver = "Nehalem-" TYPE_X86_CPU,\ 421 .property = "model",\ 422 .value = stringify(2),\ 423 },{\ 424 .driver = "Nehalem-" TYPE_X86_CPU,\ 425 .property = "level",\ 426 .value = stringify(2),\ 427 },{\ 428 .driver = "virtio-net-pci",\ 429 .property = "any_layout",\ 430 .value = "off",\ 431 },{\ 432 .driver = TYPE_X86_CPU,\ 433 .property = "pmu",\ 434 .value = "on",\ 435 },{\ 436 .driver = "i440FX-pcihost",\ 437 .property = "short_root_bus",\ 438 .value = stringify(0),\ 439 },{\ 440 .driver = "q35-pcihost",\ 441 .property = "short_root_bus",\ 442 .value = stringify(0),\ 443 } 444 445 #define PC_COMPAT_1_4 \ 446 PC_COMPAT_1_5, \ 447 {\ 448 .driver = "scsi-hd",\ 449 .property = "discard_granularity",\ 450 .value = stringify(0),\ 451 },{\ 452 .driver = "scsi-cd",\ 453 .property = "discard_granularity",\ 454 .value = stringify(0),\ 455 },{\ 456 .driver = "scsi-disk",\ 457 .property = "discard_granularity",\ 458 .value = stringify(0),\ 459 },{\ 460 .driver = "ide-hd",\ 461 .property = "discard_granularity",\ 462 .value = stringify(0),\ 463 },{\ 464 .driver = "ide-cd",\ 465 .property = "discard_granularity",\ 466 .value = stringify(0),\ 467 },{\ 468 .driver = "ide-drive",\ 469 .property = "discard_granularity",\ 470 .value = stringify(0),\ 471 },{\ 472 .driver = "virtio-blk-pci",\ 473 .property = "discard_granularity",\ 474 .value = stringify(0),\ 475 },{\ 476 .driver = "virtio-serial-pci",\ 477 .property = "vectors",\ 478 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 479 .value = stringify(0xFFFFFFFF),\ 480 },{ \ 481 .driver = "virtio-net-pci", \ 482 .property = "ctrl_guest_offloads", \ 483 .value = "off", \ 484 },{\ 485 .driver = "e1000",\ 486 .property = "romfile",\ 487 .value = "pxe-e1000.rom",\ 488 },{\ 489 .driver = "ne2k_pci",\ 490 .property = "romfile",\ 491 .value = "pxe-ne2k_pci.rom",\ 492 },{\ 493 .driver = "pcnet",\ 494 .property = "romfile",\ 495 .value = "pxe-pcnet.rom",\ 496 },{\ 497 .driver = "rtl8139",\ 498 .property = "romfile",\ 499 .value = "pxe-rtl8139.rom",\ 500 },{\ 501 .driver = "virtio-net-pci",\ 502 .property = "romfile",\ 503 .value = "pxe-virtio.rom",\ 504 },{\ 505 .driver = "486-" TYPE_X86_CPU,\ 506 .property = "model",\ 507 .value = stringify(0),\ 508 } 509 510 #define PC_COMMON_MACHINE_OPTIONS \ 511 .default_boot_order = "cad" 512 513 #define PC_DEFAULT_MACHINE_OPTIONS \ 514 PC_COMMON_MACHINE_OPTIONS, \ 515 .hot_add_cpu = pc_hot_add_cpu, \ 516 .max_cpus = 255 517 518 #endif 519