1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "exec/ioport.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 /* PC-style peripherals (also used by other machines). */ 13 14 /* parallel.c */ 15 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 16 { 17 ISADevice *dev; 18 19 dev = isa_try_create(bus, "isa-parallel"); 20 if (!dev) { 21 return false; 22 } 23 qdev_prop_set_uint32(&dev->qdev, "index", index); 24 qdev_prop_set_chr(&dev->qdev, "chardev", chr); 25 if (qdev_init(&dev->qdev) < 0) { 26 return false; 27 } 28 return true; 29 } 30 31 bool parallel_mm_init(MemoryRegion *address_space, 32 hwaddr base, int it_shift, qemu_irq irq, 33 CharDriverState *chr); 34 35 /* i8259.c */ 36 37 extern DeviceState *isa_pic; 38 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 39 qemu_irq *kvm_i8259_init(ISABus *bus); 40 int pic_read_irq(DeviceState *d); 41 int pic_get_output(DeviceState *d); 42 void pic_info(Monitor *mon, const QDict *qdict); 43 void irq_info(Monitor *mon, const QDict *qdict); 44 45 /* Global System Interrupts */ 46 47 #define GSI_NUM_PINS IOAPIC_NUM_PINS 48 49 typedef struct GSIState { 50 qemu_irq i8259_irq[ISA_NUM_IRQS]; 51 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 52 } GSIState; 53 54 void gsi_handler(void *opaque, int n, int level); 55 56 /* vmport.c */ 57 static inline void vmport_init(ISABus *bus) 58 { 59 isa_create_simple(bus, "vmport"); 60 } 61 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); 62 void vmmouse_get_data(uint32_t *data); 63 void vmmouse_set_data(const uint32_t *data); 64 65 /* pckbd.c */ 66 67 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 68 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 69 MemoryRegion *region, ram_addr_t size, 70 hwaddr mask); 71 void i8042_isa_mouse_fake_event(void *opaque); 72 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 73 74 /* pc.c */ 75 extern int fd_bootchk; 76 77 void pc_register_ferr_irq(qemu_irq irq); 78 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 79 80 #define QEMU_BELOW_4G_RAM_END 0xe0000000 81 #define QEMU_BELOW_4G_MMIO_LENGTH ((1ULL << 32) - QEMU_BELOW_4G_RAM_END) 82 83 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 84 void pc_hot_add_cpu(const int64_t id, Error **errp); 85 void pc_acpi_init(const char *default_dsdt); 86 FWCfgState *pc_memory_init(MemoryRegion *system_memory, 87 const char *kernel_filename, 88 const char *kernel_cmdline, 89 const char *initrd_filename, 90 ram_addr_t below_4g_mem_size, 91 ram_addr_t above_4g_mem_size, 92 MemoryRegion *rom_memory, 93 MemoryRegion **ram_memory); 94 qemu_irq *pc_allocate_cpu_irq(void); 95 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 96 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 97 ISADevice **rtc_state, 98 ISADevice **floppy, 99 bool no_vmport); 100 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 101 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 102 const char *boot_device, 103 ISADevice *floppy, BusState *ide0, BusState *ide1, 104 ISADevice *s); 105 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 106 void pc_pci_device_init(PCIBus *pci_bus); 107 108 typedef void (*cpu_set_smm_t)(int smm, void *arg); 109 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 110 111 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 112 113 /* acpi_piix.c */ 114 115 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 116 qemu_irq sci_irq, qemu_irq smi_irq, 117 int kvm_enabled, FWCfgState *fw_cfg); 118 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 119 120 /* hpet.c */ 121 extern int no_hpet; 122 123 /* piix_pci.c */ 124 struct PCII440FXState; 125 typedef struct PCII440FXState PCII440FXState; 126 127 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 128 ISABus **isa_bus, qemu_irq *pic, 129 MemoryRegion *address_space_mem, 130 MemoryRegion *address_space_io, 131 ram_addr_t ram_size, 132 hwaddr pci_hole_start, 133 hwaddr pci_hole_size, 134 hwaddr pci_hole64_start, 135 hwaddr pci_hole64_size, 136 MemoryRegion *pci_memory, 137 MemoryRegion *ram_memory); 138 139 /* piix4.c */ 140 extern PCIDevice *piix4_dev; 141 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 142 143 /* vga.c */ 144 enum vga_retrace_method { 145 VGA_RETRACE_DUMB, 146 VGA_RETRACE_PRECISE 147 }; 148 149 extern enum vga_retrace_method vga_retrace_method; 150 151 int isa_vga_mm_init(hwaddr vram_base, 152 hwaddr ctrl_base, int it_shift, 153 MemoryRegion *address_space); 154 155 /* ne2000.c */ 156 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 157 { 158 ISADevice *dev; 159 160 qemu_check_nic_model(nd, "ne2k_isa"); 161 162 dev = isa_try_create(bus, "ne2k_isa"); 163 if (!dev) { 164 return false; 165 } 166 qdev_prop_set_uint32(&dev->qdev, "iobase", base); 167 qdev_prop_set_uint32(&dev->qdev, "irq", irq); 168 qdev_set_nic_properties(&dev->qdev, nd); 169 qdev_init_nofail(&dev->qdev); 170 return true; 171 } 172 173 /* pc_sysfw.c */ 174 void pc_system_firmware_init(MemoryRegion *rom_memory); 175 176 /* pvpanic.c */ 177 int pvpanic_init(ISABus *bus); 178 179 /* e820 types */ 180 #define E820_RAM 1 181 #define E820_RESERVED 2 182 #define E820_ACPI 3 183 #define E820_NVS 4 184 #define E820_UNUSABLE 5 185 186 int e820_add_entry(uint64_t, uint64_t, uint32_t); 187 188 #define PC_COMPAT_1_5 \ 189 {\ 190 .driver = "Conroe-" TYPE_X86_CPU,\ 191 .property = "model",\ 192 .value = stringify(2),\ 193 },{\ 194 .driver = "Conroe-" TYPE_X86_CPU,\ 195 .property = "level",\ 196 .value = stringify(2),\ 197 },{\ 198 .driver = "Penryn-" TYPE_X86_CPU,\ 199 .property = "model",\ 200 .value = stringify(2),\ 201 },{\ 202 .driver = "Penryn-" TYPE_X86_CPU,\ 203 .property = "level",\ 204 .value = stringify(2),\ 205 },{\ 206 .driver = "Nehalem-" TYPE_X86_CPU,\ 207 .property = "model",\ 208 .value = stringify(2),\ 209 },{\ 210 .driver = "Nehalem-" TYPE_X86_CPU,\ 211 .property = "level",\ 212 .value = stringify(2),\ 213 } 214 215 #define PC_COMPAT_1_4 \ 216 PC_COMPAT_1_5, \ 217 {\ 218 .driver = "scsi-hd",\ 219 .property = "discard_granularity",\ 220 .value = stringify(0),\ 221 },{\ 222 .driver = "scsi-cd",\ 223 .property = "discard_granularity",\ 224 .value = stringify(0),\ 225 },{\ 226 .driver = "scsi-disk",\ 227 .property = "discard_granularity",\ 228 .value = stringify(0),\ 229 },{\ 230 .driver = "ide-hd",\ 231 .property = "discard_granularity",\ 232 .value = stringify(0),\ 233 },{\ 234 .driver = "ide-cd",\ 235 .property = "discard_granularity",\ 236 .value = stringify(0),\ 237 },{\ 238 .driver = "ide-drive",\ 239 .property = "discard_granularity",\ 240 .value = stringify(0),\ 241 },{\ 242 .driver = "virtio-blk-pci",\ 243 .property = "discard_granularity",\ 244 .value = stringify(0),\ 245 },{\ 246 .driver = "virtio-serial-pci",\ 247 .property = "vectors",\ 248 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 249 .value = stringify(0xFFFFFFFF),\ 250 },{ \ 251 .driver = "virtio-net-pci", \ 252 .property = "ctrl_guest_offloads", \ 253 .value = "off", \ 254 },{\ 255 .driver = "e1000",\ 256 .property = "romfile",\ 257 .value = "pxe-e1000.rom",\ 258 },{\ 259 .driver = "ne2k_pci",\ 260 .property = "romfile",\ 261 .value = "pxe-ne2k_pci.rom",\ 262 },{\ 263 .driver = "pcnet",\ 264 .property = "romfile",\ 265 .value = "pxe-pcnet.rom",\ 266 },{\ 267 .driver = "rtl8139",\ 268 .property = "romfile",\ 269 .value = "pxe-rtl8139.rom",\ 270 },{\ 271 .driver = "virtio-net-pci",\ 272 .property = "romfile",\ 273 .value = "pxe-virtio.rom",\ 274 },{\ 275 .driver = "486-" TYPE_X86_CPU,\ 276 .property = "model",\ 277 .value = stringify(0),\ 278 } 279 280 #endif 281