1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "hw/boards.h" 7 #include "hw/block/fdc.h" 8 #include "hw/block/flash.h" 9 #include "hw/i386/x86.h" 10 11 #include "hw/acpi/acpi_dev_interface.h" 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 15 #define HPET_INTCAP "hpet-intcap" 16 17 /** 18 * PCMachineState: 19 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 20 * @boot_cpus: number of present VCPUs 21 * @smp_dies: number of dies per one package 22 */ 23 typedef struct PCMachineState { 24 /*< private >*/ 25 X86MachineState parent_obj; 26 27 /* <public> */ 28 29 /* State for other subsystems/APIs: */ 30 Notifier machine_done; 31 32 /* Pointers to devices and objects: */ 33 PCIBus *bus; 34 I2CBus *smbus; 35 PFlashCFI01 *flash[2]; 36 ISADevice *pcspk; 37 38 /* Configuration options: */ 39 uint64_t max_ram_below_4g; 40 OnOffAuto vmport; 41 42 bool acpi_build_enabled; 43 bool smbus_enabled; 44 bool sata_enabled; 45 bool pit_enabled; 46 bool hpet_enabled; 47 48 /* NUMA information: */ 49 uint64_t numa_nodes; 50 uint64_t *node_mem; 51 52 /* ACPI Memory hotplug IO base address */ 53 hwaddr memhp_io_base; 54 } PCMachineState; 55 56 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 57 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 58 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 59 #define PC_MACHINE_VMPORT "vmport" 60 #define PC_MACHINE_SMBUS "smbus" 61 #define PC_MACHINE_SATA "sata" 62 #define PC_MACHINE_PIT "pit" 63 64 /** 65 * PCMachineClass: 66 * 67 * Compat fields: 68 * 69 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 70 * backend's alignment value if provided 71 * @acpi_data_size: Size of the chunk of memory at the top of RAM 72 * for the BIOS ACPI tables and other BIOS 73 * datastructures. 74 * @gigabyte_align: Make sure that guest addresses aligned at 75 * 1Gbyte boundaries get mapped to host 76 * addresses aligned at 1Gbyte boundaries. This 77 * way we can use 1GByte pages in the host. 78 * 79 */ 80 struct PCMachineClass { 81 /*< private >*/ 82 X86MachineClass parent_class; 83 84 /*< public >*/ 85 86 /* Device configuration: */ 87 bool pci_enabled; 88 bool kvmclock_enabled; 89 const char *default_nic_model; 90 91 /* Compat options: */ 92 93 /* Default CPU model version. See x86_cpu_set_default_version(). */ 94 int default_cpu_version; 95 96 /* ACPI compat: */ 97 bool has_acpi_build; 98 bool rsdp_in_ram; 99 int legacy_acpi_table_size; 100 unsigned acpi_data_size; 101 bool do_not_add_smb_acpi; 102 103 /* SMBIOS compat: */ 104 bool smbios_defaults; 105 bool smbios_legacy_mode; 106 bool smbios_uuid_encoded; 107 108 /* RAM / address space compat: */ 109 bool gigabyte_align; 110 bool has_reserved_memory; 111 bool enforce_aligned_dimm; 112 bool broken_reserved_end; 113 114 /* generate legacy CPU hotplug AML */ 115 bool legacy_cpu_hotplug; 116 117 /* use DMA capable linuxboot option rom */ 118 bool linuxboot_dma_enabled; 119 120 /* use PVH to load kernels that support this feature */ 121 bool pvh_enabled; 122 123 /* create kvmclock device even when KVM PV features are not exposed */ 124 bool kvmclock_create_always; 125 }; 126 127 #define TYPE_PC_MACHINE "generic-pc-machine" 128 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 129 130 /* ioapic.c */ 131 132 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 133 134 /* pc.c */ 135 extern int fd_bootchk; 136 137 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 138 139 void pc_smp_parse(MachineState *ms, QemuOpts *opts); 140 141 void pc_guest_info_init(PCMachineState *pcms); 142 143 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 144 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 145 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 146 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 147 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 148 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 149 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 150 151 152 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 153 MemoryRegion *pci_address_space); 154 155 void xen_load_linux(PCMachineState *pcms); 156 void pc_memory_init(PCMachineState *pcms, 157 MemoryRegion *system_memory, 158 MemoryRegion *rom_memory, 159 MemoryRegion **ram_memory); 160 uint64_t pc_pci_hole64_start(void); 161 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 162 void pc_basic_device_init(struct PCMachineState *pcms, 163 ISABus *isa_bus, qemu_irq *gsi, 164 ISADevice **rtc_state, 165 bool create_fdctrl, 166 uint32_t hpet_irqs); 167 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 168 void pc_cmos_init(PCMachineState *pcms, 169 BusState *ide0, BusState *ide1, 170 ISADevice *s); 171 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 172 void pc_pci_device_init(PCIBus *pci_bus); 173 174 typedef void (*cpu_set_smm_t)(int smm, void *arg); 175 176 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 177 178 ISADevice *pc_find_fdc0(void); 179 180 /* port92.c */ 181 #define PORT92_A20_LINE "a20" 182 183 #define TYPE_PORT92 "port92" 184 185 /* pc_sysfw.c */ 186 void pc_system_flash_create(PCMachineState *pcms); 187 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 188 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 189 190 /* acpi-build.c */ 191 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 192 const CPUArchIdList *apic_ids, GArray *entry); 193 194 extern GlobalProperty pc_compat_5_1[]; 195 extern const size_t pc_compat_5_1_len; 196 197 extern GlobalProperty pc_compat_5_0[]; 198 extern const size_t pc_compat_5_0_len; 199 200 extern GlobalProperty pc_compat_4_2[]; 201 extern const size_t pc_compat_4_2_len; 202 203 extern GlobalProperty pc_compat_4_1[]; 204 extern const size_t pc_compat_4_1_len; 205 206 extern GlobalProperty pc_compat_4_0[]; 207 extern const size_t pc_compat_4_0_len; 208 209 extern GlobalProperty pc_compat_3_1[]; 210 extern const size_t pc_compat_3_1_len; 211 212 extern GlobalProperty pc_compat_3_0[]; 213 extern const size_t pc_compat_3_0_len; 214 215 extern GlobalProperty pc_compat_2_12[]; 216 extern const size_t pc_compat_2_12_len; 217 218 extern GlobalProperty pc_compat_2_11[]; 219 extern const size_t pc_compat_2_11_len; 220 221 extern GlobalProperty pc_compat_2_10[]; 222 extern const size_t pc_compat_2_10_len; 223 224 extern GlobalProperty pc_compat_2_9[]; 225 extern const size_t pc_compat_2_9_len; 226 227 extern GlobalProperty pc_compat_2_8[]; 228 extern const size_t pc_compat_2_8_len; 229 230 extern GlobalProperty pc_compat_2_7[]; 231 extern const size_t pc_compat_2_7_len; 232 233 extern GlobalProperty pc_compat_2_6[]; 234 extern const size_t pc_compat_2_6_len; 235 236 extern GlobalProperty pc_compat_2_5[]; 237 extern const size_t pc_compat_2_5_len; 238 239 extern GlobalProperty pc_compat_2_4[]; 240 extern const size_t pc_compat_2_4_len; 241 242 extern GlobalProperty pc_compat_2_3[]; 243 extern const size_t pc_compat_2_3_len; 244 245 extern GlobalProperty pc_compat_2_2[]; 246 extern const size_t pc_compat_2_2_len; 247 248 extern GlobalProperty pc_compat_2_1[]; 249 extern const size_t pc_compat_2_1_len; 250 251 extern GlobalProperty pc_compat_2_0[]; 252 extern const size_t pc_compat_2_0_len; 253 254 extern GlobalProperty pc_compat_1_7[]; 255 extern const size_t pc_compat_1_7_len; 256 257 extern GlobalProperty pc_compat_1_6[]; 258 extern const size_t pc_compat_1_6_len; 259 260 extern GlobalProperty pc_compat_1_5[]; 261 extern const size_t pc_compat_1_5_len; 262 263 extern GlobalProperty pc_compat_1_4[]; 264 extern const size_t pc_compat_1_4_len; 265 266 /* Helper for setting model-id for CPU models that changed model-id 267 * depending on QEMU versions up to QEMU 2.4. 268 */ 269 #define PC_CPU_MODEL_IDS(v) \ 270 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 271 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 272 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, 273 274 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 275 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 276 { \ 277 MachineClass *mc = MACHINE_CLASS(oc); \ 278 optsfn(mc); \ 279 mc->init = initfn; \ 280 } \ 281 static const TypeInfo pc_machine_type_##suffix = { \ 282 .name = namestr TYPE_MACHINE_SUFFIX, \ 283 .parent = TYPE_PC_MACHINE, \ 284 .class_init = pc_machine_##suffix##_class_init, \ 285 }; \ 286 static void pc_machine_init_##suffix(void) \ 287 { \ 288 type_register(&pc_machine_type_##suffix); \ 289 } \ 290 type_init(pc_machine_init_##suffix) 291 292 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 293 #endif 294