1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/acpi/acpi_dev_interface.h" 13 #include "hw/hotplug.h" 14 #include "qom/object.h" 15 16 #define HPET_INTCAP "hpet-intcap" 17 18 /** 19 * PCMachineState: 20 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 21 * @boot_cpus: number of present VCPUs 22 * @smp_dies: number of dies per one package 23 */ 24 typedef struct PCMachineState { 25 /*< private >*/ 26 X86MachineState parent_obj; 27 28 /* <public> */ 29 30 /* State for other subsystems/APIs: */ 31 Notifier machine_done; 32 33 /* Pointers to devices and objects: */ 34 PCIBus *bus; 35 I2CBus *smbus; 36 PFlashCFI01 *flash[2]; 37 ISADevice *pcspk; 38 39 /* Configuration options: */ 40 uint64_t max_ram_below_4g; 41 OnOffAuto vmport; 42 43 bool acpi_build_enabled; 44 bool smbus_enabled; 45 bool sata_enabled; 46 bool pit_enabled; 47 bool hpet_enabled; 48 uint64_t max_fw_size; 49 char *oem_id; 50 char *oem_table_id; 51 52 /* NUMA information: */ 53 uint64_t numa_nodes; 54 uint64_t *node_mem; 55 56 /* ACPI Memory hotplug IO base address */ 57 hwaddr memhp_io_base; 58 } PCMachineState; 59 60 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 61 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 62 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 63 #define PC_MACHINE_VMPORT "vmport" 64 #define PC_MACHINE_SMBUS "smbus" 65 #define PC_MACHINE_SATA "sata" 66 #define PC_MACHINE_PIT "pit" 67 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 68 #define PC_MACHINE_OEM_ID "oem-id" 69 #define PC_MACHINE_OEM_TABLE_ID "oem-table-id" 70 /** 71 * PCMachineClass: 72 * 73 * Compat fields: 74 * 75 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 76 * backend's alignment value if provided 77 * @acpi_data_size: Size of the chunk of memory at the top of RAM 78 * for the BIOS ACPI tables and other BIOS 79 * datastructures. 80 * @gigabyte_align: Make sure that guest addresses aligned at 81 * 1Gbyte boundaries get mapped to host 82 * addresses aligned at 1Gbyte boundaries. This 83 * way we can use 1GByte pages in the host. 84 * 85 */ 86 struct PCMachineClass { 87 /*< private >*/ 88 X86MachineClass parent_class; 89 90 /*< public >*/ 91 92 /* Device configuration: */ 93 bool pci_enabled; 94 bool kvmclock_enabled; 95 const char *default_nic_model; 96 97 /* Compat options: */ 98 99 /* Default CPU model version. See x86_cpu_set_default_version(). */ 100 int default_cpu_version; 101 102 /* ACPI compat: */ 103 bool has_acpi_build; 104 bool rsdp_in_ram; 105 int legacy_acpi_table_size; 106 unsigned acpi_data_size; 107 bool do_not_add_smb_acpi; 108 109 /* SMBIOS compat: */ 110 bool smbios_defaults; 111 bool smbios_legacy_mode; 112 bool smbios_uuid_encoded; 113 114 /* RAM / address space compat: */ 115 bool gigabyte_align; 116 bool has_reserved_memory; 117 bool enforce_aligned_dimm; 118 bool broken_reserved_end; 119 120 /* generate legacy CPU hotplug AML */ 121 bool legacy_cpu_hotplug; 122 123 /* use DMA capable linuxboot option rom */ 124 bool linuxboot_dma_enabled; 125 126 /* use PVH to load kernels that support this feature */ 127 bool pvh_enabled; 128 129 /* create kvmclock device even when KVM PV features are not exposed */ 130 bool kvmclock_create_always; 131 }; 132 133 #define TYPE_PC_MACHINE "generic-pc-machine" 134 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 135 136 /* ioapic.c */ 137 138 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 139 140 /* pc.c */ 141 extern int fd_bootchk; 142 143 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 144 145 void pc_smp_parse(MachineState *ms, QemuOpts *opts); 146 147 void pc_guest_info_init(PCMachineState *pcms); 148 149 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 150 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 151 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 152 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 153 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 154 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 155 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 156 157 158 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 159 MemoryRegion *pci_address_space); 160 161 void xen_load_linux(PCMachineState *pcms); 162 void pc_memory_init(PCMachineState *pcms, 163 MemoryRegion *system_memory, 164 MemoryRegion *rom_memory, 165 MemoryRegion **ram_memory); 166 uint64_t pc_pci_hole64_start(void); 167 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 168 void pc_basic_device_init(struct PCMachineState *pcms, 169 ISABus *isa_bus, qemu_irq *gsi, 170 ISADevice **rtc_state, 171 bool create_fdctrl, 172 uint32_t hpet_irqs); 173 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 174 void pc_cmos_init(PCMachineState *pcms, 175 BusState *ide0, BusState *ide1, 176 ISADevice *s); 177 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 178 void pc_pci_device_init(PCIBus *pci_bus); 179 180 typedef void (*cpu_set_smm_t)(int smm, void *arg); 181 182 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 183 184 ISADevice *pc_find_fdc0(void); 185 186 /* port92.c */ 187 #define PORT92_A20_LINE "a20" 188 189 #define TYPE_PORT92 "port92" 190 191 /* pc_sysfw.c */ 192 void pc_system_flash_create(PCMachineState *pcms); 193 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 194 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 195 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 196 int *data_len); 197 198 199 /* acpi-build.c */ 200 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 201 const CPUArchIdList *apic_ids, GArray *entry); 202 203 extern GlobalProperty pc_compat_5_2[]; 204 extern const size_t pc_compat_5_2_len; 205 206 extern GlobalProperty pc_compat_5_1[]; 207 extern const size_t pc_compat_5_1_len; 208 209 extern GlobalProperty pc_compat_5_0[]; 210 extern const size_t pc_compat_5_0_len; 211 212 extern GlobalProperty pc_compat_4_2[]; 213 extern const size_t pc_compat_4_2_len; 214 215 extern GlobalProperty pc_compat_4_1[]; 216 extern const size_t pc_compat_4_1_len; 217 218 extern GlobalProperty pc_compat_4_0[]; 219 extern const size_t pc_compat_4_0_len; 220 221 extern GlobalProperty pc_compat_3_1[]; 222 extern const size_t pc_compat_3_1_len; 223 224 extern GlobalProperty pc_compat_3_0[]; 225 extern const size_t pc_compat_3_0_len; 226 227 extern GlobalProperty pc_compat_2_12[]; 228 extern const size_t pc_compat_2_12_len; 229 230 extern GlobalProperty pc_compat_2_11[]; 231 extern const size_t pc_compat_2_11_len; 232 233 extern GlobalProperty pc_compat_2_10[]; 234 extern const size_t pc_compat_2_10_len; 235 236 extern GlobalProperty pc_compat_2_9[]; 237 extern const size_t pc_compat_2_9_len; 238 239 extern GlobalProperty pc_compat_2_8[]; 240 extern const size_t pc_compat_2_8_len; 241 242 extern GlobalProperty pc_compat_2_7[]; 243 extern const size_t pc_compat_2_7_len; 244 245 extern GlobalProperty pc_compat_2_6[]; 246 extern const size_t pc_compat_2_6_len; 247 248 extern GlobalProperty pc_compat_2_5[]; 249 extern const size_t pc_compat_2_5_len; 250 251 extern GlobalProperty pc_compat_2_4[]; 252 extern const size_t pc_compat_2_4_len; 253 254 extern GlobalProperty pc_compat_2_3[]; 255 extern const size_t pc_compat_2_3_len; 256 257 extern GlobalProperty pc_compat_2_2[]; 258 extern const size_t pc_compat_2_2_len; 259 260 extern GlobalProperty pc_compat_2_1[]; 261 extern const size_t pc_compat_2_1_len; 262 263 extern GlobalProperty pc_compat_2_0[]; 264 extern const size_t pc_compat_2_0_len; 265 266 extern GlobalProperty pc_compat_1_7[]; 267 extern const size_t pc_compat_1_7_len; 268 269 extern GlobalProperty pc_compat_1_6[]; 270 extern const size_t pc_compat_1_6_len; 271 272 extern GlobalProperty pc_compat_1_5[]; 273 extern const size_t pc_compat_1_5_len; 274 275 extern GlobalProperty pc_compat_1_4[]; 276 extern const size_t pc_compat_1_4_len; 277 278 /* Helper for setting model-id for CPU models that changed model-id 279 * depending on QEMU versions up to QEMU 2.4. 280 */ 281 #define PC_CPU_MODEL_IDS(v) \ 282 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 283 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 284 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, 285 286 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 287 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 288 { \ 289 MachineClass *mc = MACHINE_CLASS(oc); \ 290 optsfn(mc); \ 291 mc->init = initfn; \ 292 } \ 293 static const TypeInfo pc_machine_type_##suffix = { \ 294 .name = namestr TYPE_MACHINE_SUFFIX, \ 295 .parent = TYPE_PC_MACHINE, \ 296 .class_init = pc_machine_##suffix##_class_init, \ 297 }; \ 298 static void pc_machine_init_##suffix(void) \ 299 { \ 300 type_register(&pc_machine_type_##suffix); \ 301 } \ 302 type_init(pc_machine_init_##suffix) 303 304 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 305 #endif 306