1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/compat.h" 17 #include "hw/mem/pc-dimm.h" 18 #include "hw/mem/nvdimm.h" 19 #include "hw/acpi/acpi_dev_interface.h" 20 21 #define HPET_INTCAP "hpet-intcap" 22 23 /** 24 * PCMachineState: 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 * @boot_cpus: number of present VCPUs 27 */ 28 struct PCMachineState { 29 /*< private >*/ 30 MachineState parent_obj; 31 32 /* <public> */ 33 34 /* State for other subsystems/APIs: */ 35 Notifier machine_done; 36 37 /* Pointers to devices and objects: */ 38 HotplugHandler *acpi_dev; 39 ISADevice *rtc; 40 PCIBus *bus; 41 FWCfgState *fw_cfg; 42 qemu_irq *gsi; 43 44 /* Configuration options: */ 45 uint64_t max_ram_below_4g; 46 OnOffAuto vmport; 47 OnOffAuto smm; 48 49 AcpiNVDIMMState acpi_nvdimm_state; 50 51 bool acpi_build_enabled; 52 bool smbus_enabled; 53 bool sata_enabled; 54 bool pit_enabled; 55 56 /* RAM information (sizes, addresses, configuration): */ 57 ram_addr_t below_4g_mem_size, above_4g_mem_size; 58 59 /* CPU and apic information: */ 60 bool apic_xrupt_override; 61 unsigned apic_id_limit; 62 uint16_t boot_cpus; 63 64 /* NUMA information: */ 65 uint64_t numa_nodes; 66 uint64_t *node_mem; 67 68 /* Address space used by IOAPIC device. All IOAPIC interrupts 69 * will be translated to MSI messages in the address space. */ 70 AddressSpace *ioapic_as; 71 }; 72 73 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 74 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 75 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 76 #define PC_MACHINE_VMPORT "vmport" 77 #define PC_MACHINE_SMM "smm" 78 #define PC_MACHINE_NVDIMM "nvdimm" 79 #define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" 80 #define PC_MACHINE_SMBUS "smbus" 81 #define PC_MACHINE_SATA "sata" 82 #define PC_MACHINE_PIT "pit" 83 84 /** 85 * PCMachineClass: 86 * 87 * Compat fields: 88 * 89 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 90 * backend's alignment value if provided 91 * @acpi_data_size: Size of the chunk of memory at the top of RAM 92 * for the BIOS ACPI tables and other BIOS 93 * datastructures. 94 * @gigabyte_align: Make sure that guest addresses aligned at 95 * 1Gbyte boundaries get mapped to host 96 * addresses aligned at 1Gbyte boundaries. This 97 * way we can use 1GByte pages in the host. 98 * 99 */ 100 struct PCMachineClass { 101 /*< private >*/ 102 MachineClass parent_class; 103 104 /*< public >*/ 105 106 /* Device configuration: */ 107 bool pci_enabled; 108 bool kvmclock_enabled; 109 const char *default_nic_model; 110 111 /* Compat options: */ 112 113 /* ACPI compat: */ 114 bool has_acpi_build; 115 bool rsdp_in_ram; 116 int legacy_acpi_table_size; 117 unsigned acpi_data_size; 118 119 /* SMBIOS compat: */ 120 bool smbios_defaults; 121 bool smbios_legacy_mode; 122 bool smbios_uuid_encoded; 123 124 /* RAM / address space compat: */ 125 bool gigabyte_align; 126 bool has_reserved_memory; 127 bool enforce_aligned_dimm; 128 bool broken_reserved_end; 129 130 /* TSC rate migration: */ 131 bool save_tsc_khz; 132 /* generate legacy CPU hotplug AML */ 133 bool legacy_cpu_hotplug; 134 135 /* use DMA capable linuxboot option rom */ 136 bool linuxboot_dma_enabled; 137 }; 138 139 #define TYPE_PC_MACHINE "generic-pc-machine" 140 #define PC_MACHINE(obj) \ 141 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 142 #define PC_MACHINE_GET_CLASS(obj) \ 143 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 144 #define PC_MACHINE_CLASS(klass) \ 145 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 146 147 /* i8259.c */ 148 149 extern DeviceState *isa_pic; 150 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 151 qemu_irq *kvm_i8259_init(ISABus *bus); 152 int pic_read_irq(DeviceState *d); 153 int pic_get_output(DeviceState *d); 154 155 /* ioapic.c */ 156 157 /* Global System Interrupts */ 158 159 #define GSI_NUM_PINS IOAPIC_NUM_PINS 160 161 typedef struct GSIState { 162 qemu_irq i8259_irq[ISA_NUM_IRQS]; 163 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 164 } GSIState; 165 166 void gsi_handler(void *opaque, int n, int level); 167 168 /* vmport.c */ 169 #define TYPE_VMPORT "vmport" 170 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 171 172 static inline void vmport_init(ISABus *bus) 173 { 174 isa_create_simple(bus, TYPE_VMPORT); 175 } 176 177 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 178 void vmmouse_get_data(uint32_t *data); 179 void vmmouse_set_data(const uint32_t *data); 180 181 /* pc.c */ 182 extern int fd_bootchk; 183 184 bool pc_machine_is_smm_enabled(PCMachineState *pcms); 185 void pc_register_ferr_irq(qemu_irq irq); 186 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 187 188 void pc_cpus_init(PCMachineState *pcms); 189 void pc_hot_add_cpu(const int64_t id, Error **errp); 190 void pc_acpi_init(const char *default_dsdt); 191 192 void pc_guest_info_init(PCMachineState *pcms); 193 194 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 195 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 196 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 197 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 198 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 199 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 200 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 201 202 203 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 204 MemoryRegion *pci_address_space); 205 206 void xen_load_linux(PCMachineState *pcms); 207 void pc_memory_init(PCMachineState *pcms, 208 MemoryRegion *system_memory, 209 MemoryRegion *rom_memory, 210 MemoryRegion **ram_memory); 211 uint64_t pc_pci_hole64_start(void); 212 qemu_irq pc_allocate_cpu_irq(void); 213 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 214 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 215 ISADevice **rtc_state, 216 bool create_fdctrl, 217 bool no_vmport, 218 bool has_pit, 219 uint32_t hpet_irqs); 220 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 221 void pc_cmos_init(PCMachineState *pcms, 222 BusState *ide0, BusState *ide1, 223 ISADevice *s); 224 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 225 void pc_pci_device_init(PCIBus *pci_bus); 226 227 typedef void (*cpu_set_smm_t)(int smm, void *arg); 228 229 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 230 231 ISADevice *pc_find_fdc0(void); 232 int cmos_get_fd_drive_type(FloppyDriveType fd0); 233 234 #define FW_CFG_IO_BASE 0x510 235 236 #define PORT92_A20_LINE "a20" 237 238 /* acpi_piix.c */ 239 240 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 241 qemu_irq sci_irq, qemu_irq smi_irq, 242 int smm_enabled, DeviceState **piix4_pm); 243 244 /* hpet.c */ 245 extern int no_hpet; 246 247 /* piix_pci.c */ 248 struct PCII440FXState; 249 typedef struct PCII440FXState PCII440FXState; 250 251 #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" 252 #define TYPE_I440FX_PCI_DEVICE "i440FX" 253 254 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" 255 256 /* 257 * Reset Control Register: PCI-accessible ISA-Compatible Register at address 258 * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). 259 */ 260 #define RCR_IOPORT 0xcf9 261 262 PCIBus *i440fx_init(const char *host_type, const char *pci_type, 263 PCII440FXState **pi440fx_state, int *piix_devfn, 264 ISABus **isa_bus, qemu_irq *pic, 265 MemoryRegion *address_space_mem, 266 MemoryRegion *address_space_io, 267 ram_addr_t ram_size, 268 ram_addr_t below_4g_mem_size, 269 ram_addr_t above_4g_mem_size, 270 MemoryRegion *pci_memory, 271 MemoryRegion *ram_memory); 272 273 PCIBus *find_i440fx(void); 274 /* piix4.c */ 275 extern PCIDevice *piix4_dev; 276 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 277 278 /* pc_sysfw.c */ 279 void pc_system_firmware_init(MemoryRegion *rom_memory, 280 bool isapc_ram_fw); 281 282 /* acpi-build.c */ 283 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 284 const CPUArchIdList *apic_ids, GArray *entry); 285 286 /* e820 types */ 287 #define E820_RAM 1 288 #define E820_RESERVED 2 289 #define E820_ACPI 3 290 #define E820_NVS 4 291 #define E820_UNUSABLE 5 292 293 int e820_add_entry(uint64_t, uint64_t, uint32_t); 294 int e820_get_num_entries(void); 295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 296 297 extern GlobalProperty pc_compat_3_1[]; 298 extern const size_t pc_compat_3_1_len; 299 300 extern GlobalProperty pc_compat_3_0[]; 301 extern const size_t pc_compat_3_0_len; 302 303 extern GlobalProperty pc_compat_2_12[]; 304 extern const size_t pc_compat_2_12_len; 305 306 #define PC_COMPAT_2_11 \ 307 HW_COMPAT_2_11 \ 308 {\ 309 .driver = TYPE_X86_CPU,\ 310 .property = "x-migrate-smi-count",\ 311 .value = "off",\ 312 },{\ 313 .driver = "Skylake-Server" "-" TYPE_X86_CPU,\ 314 .property = "clflushopt",\ 315 .value = "off",\ 316 }, 317 318 #define PC_COMPAT_2_10 \ 319 HW_COMPAT_2_10 \ 320 {\ 321 .driver = TYPE_X86_CPU,\ 322 .property = "x-hv-max-vps",\ 323 .value = "0x40",\ 324 },{\ 325 .driver = "i440FX-pcihost",\ 326 .property = "x-pci-hole64-fix",\ 327 .value = "off",\ 328 },{\ 329 .driver = "q35-pcihost",\ 330 .property = "x-pci-hole64-fix",\ 331 .value = "off",\ 332 }, 333 334 #define PC_COMPAT_2_9 \ 335 HW_COMPAT_2_9 \ 336 {\ 337 .driver = "mch",\ 338 .property = "extended-tseg-mbytes",\ 339 .value = stringify(0),\ 340 },\ 341 342 #define PC_COMPAT_2_8 \ 343 HW_COMPAT_2_8 \ 344 {\ 345 .driver = TYPE_X86_CPU,\ 346 .property = "tcg-cpuid",\ 347 .value = "off",\ 348 },\ 349 {\ 350 .driver = "kvmclock",\ 351 .property = "x-mach-use-reliable-get-clock",\ 352 .value = "off",\ 353 },\ 354 {\ 355 .driver = "ICH9-LPC",\ 356 .property = "x-smi-broadcast",\ 357 .value = "off",\ 358 },\ 359 {\ 360 .driver = TYPE_X86_CPU,\ 361 .property = "vmware-cpuid-freq",\ 362 .value = "off",\ 363 },\ 364 {\ 365 .driver = "Haswell-" TYPE_X86_CPU,\ 366 .property = "stepping",\ 367 .value = "1",\ 368 }, 369 370 #define PC_COMPAT_2_7 \ 371 HW_COMPAT_2_7 \ 372 {\ 373 .driver = TYPE_X86_CPU,\ 374 .property = "l3-cache",\ 375 .value = "off",\ 376 },\ 377 {\ 378 .driver = TYPE_X86_CPU,\ 379 .property = "full-cpuid-auto-level",\ 380 .value = "off",\ 381 },\ 382 {\ 383 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 384 .property = "family",\ 385 .value = "15",\ 386 },\ 387 {\ 388 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 389 .property = "model",\ 390 .value = "6",\ 391 },\ 392 {\ 393 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 394 .property = "stepping",\ 395 .value = "1",\ 396 },\ 397 {\ 398 .driver = "isa-pcspk",\ 399 .property = "migrate",\ 400 .value = "off",\ 401 }, 402 403 #define PC_COMPAT_2_6 \ 404 HW_COMPAT_2_6 \ 405 {\ 406 .driver = TYPE_X86_CPU,\ 407 .property = "cpuid-0xb",\ 408 .value = "off",\ 409 },{\ 410 .driver = "vmxnet3",\ 411 .property = "romfile",\ 412 .value = "",\ 413 },\ 414 {\ 415 .driver = TYPE_X86_CPU,\ 416 .property = "fill-mtrr-mask",\ 417 .value = "off",\ 418 },\ 419 {\ 420 .driver = "apic-common",\ 421 .property = "legacy-instance-id",\ 422 .value = "on",\ 423 }, 424 425 #define PC_COMPAT_2_5 \ 426 HW_COMPAT_2_5 427 428 /* Helper for setting model-id for CPU models that changed model-id 429 * depending on QEMU versions up to QEMU 2.4. 430 */ 431 #define PC_CPU_MODEL_IDS(v) \ 432 {\ 433 .driver = "qemu32-" TYPE_X86_CPU,\ 434 .property = "model-id",\ 435 .value = "QEMU Virtual CPU version " v,\ 436 },\ 437 {\ 438 .driver = "qemu64-" TYPE_X86_CPU,\ 439 .property = "model-id",\ 440 .value = "QEMU Virtual CPU version " v,\ 441 },\ 442 {\ 443 .driver = "athlon-" TYPE_X86_CPU,\ 444 .property = "model-id",\ 445 .value = "QEMU Virtual CPU version " v,\ 446 }, 447 448 #define PC_COMPAT_2_4 \ 449 HW_COMPAT_2_4 \ 450 PC_CPU_MODEL_IDS("2.4.0") \ 451 {\ 452 .driver = "Haswell-" TYPE_X86_CPU,\ 453 .property = "abm",\ 454 .value = "off",\ 455 },\ 456 {\ 457 .driver = "Haswell-noTSX-" TYPE_X86_CPU,\ 458 .property = "abm",\ 459 .value = "off",\ 460 },\ 461 {\ 462 .driver = "Broadwell-" TYPE_X86_CPU,\ 463 .property = "abm",\ 464 .value = "off",\ 465 },\ 466 {\ 467 .driver = "Broadwell-noTSX-" TYPE_X86_CPU,\ 468 .property = "abm",\ 469 .value = "off",\ 470 },\ 471 {\ 472 .driver = "host" "-" TYPE_X86_CPU,\ 473 .property = "host-cache-info",\ 474 .value = "on",\ 475 },\ 476 {\ 477 .driver = TYPE_X86_CPU,\ 478 .property = "check",\ 479 .value = "off",\ 480 },\ 481 {\ 482 .driver = "qemu64" "-" TYPE_X86_CPU,\ 483 .property = "sse4a",\ 484 .value = "on",\ 485 },\ 486 {\ 487 .driver = "qemu64" "-" TYPE_X86_CPU,\ 488 .property = "abm",\ 489 .value = "on",\ 490 },\ 491 {\ 492 .driver = "qemu64" "-" TYPE_X86_CPU,\ 493 .property = "popcnt",\ 494 .value = "on",\ 495 },\ 496 {\ 497 .driver = "qemu32" "-" TYPE_X86_CPU,\ 498 .property = "popcnt",\ 499 .value = "on",\ 500 },{\ 501 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 502 .property = "rdtscp",\ 503 .value = "on",\ 504 },{\ 505 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 506 .property = "rdtscp",\ 507 .value = "on",\ 508 },{\ 509 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 510 .property = "rdtscp",\ 511 .value = "on",\ 512 },{\ 513 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 514 .property = "rdtscp",\ 515 .value = "on",\ 516 }, 517 518 519 #define PC_COMPAT_2_3 \ 520 HW_COMPAT_2_3 \ 521 PC_CPU_MODEL_IDS("2.3.0") \ 522 {\ 523 .driver = TYPE_X86_CPU,\ 524 .property = "arat",\ 525 .value = "off",\ 526 },{\ 527 .driver = "qemu64" "-" TYPE_X86_CPU,\ 528 .property = "min-level",\ 529 .value = stringify(4),\ 530 },{\ 531 .driver = "kvm64" "-" TYPE_X86_CPU,\ 532 .property = "min-level",\ 533 .value = stringify(5),\ 534 },{\ 535 .driver = "pentium3" "-" TYPE_X86_CPU,\ 536 .property = "min-level",\ 537 .value = stringify(2),\ 538 },{\ 539 .driver = "n270" "-" TYPE_X86_CPU,\ 540 .property = "min-level",\ 541 .value = stringify(5),\ 542 },{\ 543 .driver = "Conroe" "-" TYPE_X86_CPU,\ 544 .property = "min-level",\ 545 .value = stringify(4),\ 546 },{\ 547 .driver = "Penryn" "-" TYPE_X86_CPU,\ 548 .property = "min-level",\ 549 .value = stringify(4),\ 550 },{\ 551 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 552 .property = "min-level",\ 553 .value = stringify(4),\ 554 },{\ 555 .driver = "n270" "-" TYPE_X86_CPU,\ 556 .property = "min-xlevel",\ 557 .value = stringify(0x8000000a),\ 558 },{\ 559 .driver = "Penryn" "-" TYPE_X86_CPU,\ 560 .property = "min-xlevel",\ 561 .value = stringify(0x8000000a),\ 562 },{\ 563 .driver = "Conroe" "-" TYPE_X86_CPU,\ 564 .property = "min-xlevel",\ 565 .value = stringify(0x8000000a),\ 566 },{\ 567 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 568 .property = "min-xlevel",\ 569 .value = stringify(0x8000000a),\ 570 },{\ 571 .driver = "Westmere" "-" TYPE_X86_CPU,\ 572 .property = "min-xlevel",\ 573 .value = stringify(0x8000000a),\ 574 },{\ 575 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 576 .property = "min-xlevel",\ 577 .value = stringify(0x8000000a),\ 578 },{\ 579 .driver = "IvyBridge" "-" TYPE_X86_CPU,\ 580 .property = "min-xlevel",\ 581 .value = stringify(0x8000000a),\ 582 },{\ 583 .driver = "Haswell" "-" TYPE_X86_CPU,\ 584 .property = "min-xlevel",\ 585 .value = stringify(0x8000000a),\ 586 },{\ 587 .driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\ 588 .property = "min-xlevel",\ 589 .value = stringify(0x8000000a),\ 590 },{\ 591 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 592 .property = "min-xlevel",\ 593 .value = stringify(0x8000000a),\ 594 },{\ 595 .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\ 596 .property = "min-xlevel",\ 597 .value = stringify(0x8000000a),\ 598 },{\ 599 .driver = TYPE_X86_CPU,\ 600 .property = "kvm-no-smi-migration",\ 601 .value = "on",\ 602 }, 603 604 #define PC_COMPAT_2_2 \ 605 HW_COMPAT_2_2 \ 606 PC_CPU_MODEL_IDS("2.2.0") \ 607 {\ 608 .driver = "kvm64" "-" TYPE_X86_CPU,\ 609 .property = "vme",\ 610 .value = "off",\ 611 },\ 612 {\ 613 .driver = "kvm32" "-" TYPE_X86_CPU,\ 614 .property = "vme",\ 615 .value = "off",\ 616 },\ 617 {\ 618 .driver = "Conroe" "-" TYPE_X86_CPU,\ 619 .property = "vme",\ 620 .value = "off",\ 621 },\ 622 {\ 623 .driver = "Penryn" "-" TYPE_X86_CPU,\ 624 .property = "vme",\ 625 .value = "off",\ 626 },\ 627 {\ 628 .driver = "Nehalem" "-" TYPE_X86_CPU,\ 629 .property = "vme",\ 630 .value = "off",\ 631 },\ 632 {\ 633 .driver = "Westmere" "-" TYPE_X86_CPU,\ 634 .property = "vme",\ 635 .value = "off",\ 636 },\ 637 {\ 638 .driver = "SandyBridge" "-" TYPE_X86_CPU,\ 639 .property = "vme",\ 640 .value = "off",\ 641 },\ 642 {\ 643 .driver = "Haswell" "-" TYPE_X86_CPU,\ 644 .property = "vme",\ 645 .value = "off",\ 646 },\ 647 {\ 648 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 649 .property = "vme",\ 650 .value = "off",\ 651 },\ 652 {\ 653 .driver = "Opteron_G1" "-" TYPE_X86_CPU,\ 654 .property = "vme",\ 655 .value = "off",\ 656 },\ 657 {\ 658 .driver = "Opteron_G2" "-" TYPE_X86_CPU,\ 659 .property = "vme",\ 660 .value = "off",\ 661 },\ 662 {\ 663 .driver = "Opteron_G3" "-" TYPE_X86_CPU,\ 664 .property = "vme",\ 665 .value = "off",\ 666 },\ 667 {\ 668 .driver = "Opteron_G4" "-" TYPE_X86_CPU,\ 669 .property = "vme",\ 670 .value = "off",\ 671 },\ 672 {\ 673 .driver = "Opteron_G5" "-" TYPE_X86_CPU,\ 674 .property = "vme",\ 675 .value = "off",\ 676 },\ 677 {\ 678 .driver = "Haswell" "-" TYPE_X86_CPU,\ 679 .property = "f16c",\ 680 .value = "off",\ 681 },\ 682 {\ 683 .driver = "Haswell" "-" TYPE_X86_CPU,\ 684 .property = "rdrand",\ 685 .value = "off",\ 686 },\ 687 {\ 688 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 689 .property = "f16c",\ 690 .value = "off",\ 691 },\ 692 {\ 693 .driver = "Broadwell" "-" TYPE_X86_CPU,\ 694 .property = "rdrand",\ 695 .value = "off",\ 696 }, 697 698 #define PC_COMPAT_2_1 \ 699 HW_COMPAT_2_1 \ 700 PC_CPU_MODEL_IDS("2.1.0") \ 701 {\ 702 .driver = "coreduo" "-" TYPE_X86_CPU,\ 703 .property = "vmx",\ 704 .value = "on",\ 705 },\ 706 {\ 707 .driver = "core2duo" "-" TYPE_X86_CPU,\ 708 .property = "vmx",\ 709 .value = "on",\ 710 }, 711 712 #define PC_COMPAT_2_0 \ 713 PC_CPU_MODEL_IDS("2.0.0") \ 714 {\ 715 .driver = "virtio-scsi-pci",\ 716 .property = "any_layout",\ 717 .value = "off",\ 718 },{\ 719 .driver = "PIIX4_PM",\ 720 .property = "memory-hotplug-support",\ 721 .value = "off",\ 722 },\ 723 {\ 724 .driver = "apic",\ 725 .property = "version",\ 726 .value = stringify(0x11),\ 727 },\ 728 {\ 729 .driver = "nec-usb-xhci",\ 730 .property = "superspeed-ports-first",\ 731 .value = "off",\ 732 },\ 733 {\ 734 .driver = "nec-usb-xhci",\ 735 .property = "force-pcie-endcap",\ 736 .value = "on",\ 737 },\ 738 {\ 739 .driver = "pci-serial",\ 740 .property = "prog_if",\ 741 .value = stringify(0),\ 742 },\ 743 {\ 744 .driver = "pci-serial-2x",\ 745 .property = "prog_if",\ 746 .value = stringify(0),\ 747 },\ 748 {\ 749 .driver = "pci-serial-4x",\ 750 .property = "prog_if",\ 751 .value = stringify(0),\ 752 },\ 753 {\ 754 .driver = "virtio-net-pci",\ 755 .property = "guest_announce",\ 756 .value = "off",\ 757 },\ 758 {\ 759 .driver = "ICH9-LPC",\ 760 .property = "memory-hotplug-support",\ 761 .value = "off",\ 762 },{\ 763 .driver = "xio3130-downstream",\ 764 .property = COMPAT_PROP_PCP,\ 765 .value = "off",\ 766 },{\ 767 .driver = "ioh3420",\ 768 .property = COMPAT_PROP_PCP,\ 769 .value = "off",\ 770 }, 771 772 #define PC_COMPAT_1_7 \ 773 PC_CPU_MODEL_IDS("1.7.0") \ 774 {\ 775 .driver = TYPE_USB_DEVICE,\ 776 .property = "msos-desc",\ 777 .value = "no",\ 778 },\ 779 {\ 780 .driver = "PIIX4_PM",\ 781 .property = "acpi-pci-hotplug-with-bridge-support",\ 782 .value = "off",\ 783 },\ 784 {\ 785 .driver = "hpet",\ 786 .property = HPET_INTCAP,\ 787 .value = stringify(4),\ 788 }, 789 790 #define PC_COMPAT_1_6 \ 791 PC_CPU_MODEL_IDS("1.6.0") \ 792 {\ 793 .driver = "e1000",\ 794 .property = "mitigation",\ 795 .value = "off",\ 796 },{\ 797 .driver = "qemu64-" TYPE_X86_CPU,\ 798 .property = "model",\ 799 .value = stringify(2),\ 800 },{\ 801 .driver = "qemu32-" TYPE_X86_CPU,\ 802 .property = "model",\ 803 .value = stringify(3),\ 804 },{\ 805 .driver = "i440FX-pcihost",\ 806 .property = "short_root_bus",\ 807 .value = stringify(1),\ 808 },{\ 809 .driver = "q35-pcihost",\ 810 .property = "short_root_bus",\ 811 .value = stringify(1),\ 812 }, 813 814 #define PC_COMPAT_1_5 \ 815 PC_CPU_MODEL_IDS("1.5.0") \ 816 {\ 817 .driver = "Conroe-" TYPE_X86_CPU,\ 818 .property = "model",\ 819 .value = stringify(2),\ 820 },{\ 821 .driver = "Conroe-" TYPE_X86_CPU,\ 822 .property = "min-level",\ 823 .value = stringify(2),\ 824 },{\ 825 .driver = "Penryn-" TYPE_X86_CPU,\ 826 .property = "model",\ 827 .value = stringify(2),\ 828 },{\ 829 .driver = "Penryn-" TYPE_X86_CPU,\ 830 .property = "min-level",\ 831 .value = stringify(2),\ 832 },{\ 833 .driver = "Nehalem-" TYPE_X86_CPU,\ 834 .property = "model",\ 835 .value = stringify(2),\ 836 },{\ 837 .driver = "Nehalem-" TYPE_X86_CPU,\ 838 .property = "min-level",\ 839 .value = stringify(2),\ 840 },{\ 841 .driver = "virtio-net-pci",\ 842 .property = "any_layout",\ 843 .value = "off",\ 844 },{\ 845 .driver = TYPE_X86_CPU,\ 846 .property = "pmu",\ 847 .value = "on",\ 848 },{\ 849 .driver = "i440FX-pcihost",\ 850 .property = "short_root_bus",\ 851 .value = stringify(0),\ 852 },{\ 853 .driver = "q35-pcihost",\ 854 .property = "short_root_bus",\ 855 .value = stringify(0),\ 856 }, 857 858 #define PC_COMPAT_1_4 \ 859 PC_CPU_MODEL_IDS("1.4.0") \ 860 {\ 861 .driver = "scsi-hd",\ 862 .property = "discard_granularity",\ 863 .value = stringify(0),\ 864 },{\ 865 .driver = "scsi-cd",\ 866 .property = "discard_granularity",\ 867 .value = stringify(0),\ 868 },{\ 869 .driver = "scsi-disk",\ 870 .property = "discard_granularity",\ 871 .value = stringify(0),\ 872 },{\ 873 .driver = "ide-hd",\ 874 .property = "discard_granularity",\ 875 .value = stringify(0),\ 876 },{\ 877 .driver = "ide-cd",\ 878 .property = "discard_granularity",\ 879 .value = stringify(0),\ 880 },{\ 881 .driver = "ide-drive",\ 882 .property = "discard_granularity",\ 883 .value = stringify(0),\ 884 },{\ 885 .driver = "virtio-blk-pci",\ 886 .property = "discard_granularity",\ 887 .value = stringify(0),\ 888 },{\ 889 .driver = "virtio-serial-pci",\ 890 .property = "vectors",\ 891 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 892 .value = stringify(0xFFFFFFFF),\ 893 },{ \ 894 .driver = "virtio-net-pci", \ 895 .property = "ctrl_guest_offloads", \ 896 .value = "off", \ 897 },{\ 898 .driver = "e1000",\ 899 .property = "romfile",\ 900 .value = "pxe-e1000.rom",\ 901 },{\ 902 .driver = "ne2k_pci",\ 903 .property = "romfile",\ 904 .value = "pxe-ne2k_pci.rom",\ 905 },{\ 906 .driver = "pcnet",\ 907 .property = "romfile",\ 908 .value = "pxe-pcnet.rom",\ 909 },{\ 910 .driver = "rtl8139",\ 911 .property = "romfile",\ 912 .value = "pxe-rtl8139.rom",\ 913 },{\ 914 .driver = "virtio-net-pci",\ 915 .property = "romfile",\ 916 .value = "pxe-virtio.rom",\ 917 },{\ 918 .driver = "486-" TYPE_X86_CPU,\ 919 .property = "model",\ 920 .value = stringify(0),\ 921 },\ 922 {\ 923 .driver = "n270" "-" TYPE_X86_CPU,\ 924 .property = "movbe",\ 925 .value = "off",\ 926 },\ 927 {\ 928 .driver = "Westmere" "-" TYPE_X86_CPU,\ 929 .property = "pclmulqdq",\ 930 .value = "off",\ 931 }, 932 933 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 934 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 935 { \ 936 MachineClass *mc = MACHINE_CLASS(oc); \ 937 optsfn(mc); \ 938 mc->init = initfn; \ 939 } \ 940 static const TypeInfo pc_machine_type_##suffix = { \ 941 .name = namestr TYPE_MACHINE_SUFFIX, \ 942 .parent = TYPE_PC_MACHINE, \ 943 .class_init = pc_machine_##suffix##_class_init, \ 944 }; \ 945 static void pc_machine_init_##suffix(void) \ 946 { \ 947 type_register(&pc_machine_type_##suffix); \ 948 } \ 949 type_init(pc_machine_init_##suffix) 950 951 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 952 #endif 953