xref: /openbmc/qemu/include/hw/i386/pc.h (revision 0709c5a1)
1 #ifndef HW_PC_H
2 #define HW_PC_H
3 
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "hw/boards.h"
7 #include "hw/isa/isa.h"
8 #include "hw/block/fdc.h"
9 #include "net/net.h"
10 #include "hw/i386/ioapic.h"
11 
12 #include "qemu/range.h"
13 #include "qemu/bitmap.h"
14 #include "sysemu/sysemu.h"
15 #include "hw/pci/pci.h"
16 #include "hw/boards.h"
17 #include "hw/compat.h"
18 
19 #define HPET_INTCAP "hpet-intcap"
20 
21 /**
22  * PCMachineState:
23  * @hotplug_memory_base: address in guest RAM address space where hotplug memory
24  * address space begins.
25  * @hotplug_memory: hotplug memory addess space container
26  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
27  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
28  *                        backend's alignment value if provided
29  */
30 struct PCMachineState {
31     /*< private >*/
32     MachineState parent_obj;
33 
34     /* <public> */
35     ram_addr_t hotplug_memory_base;
36     MemoryRegion hotplug_memory;
37 
38     HotplugHandler *acpi_dev;
39     ISADevice *rtc;
40 
41     uint64_t max_ram_below_4g;
42     OnOffAuto vmport;
43     bool enforce_aligned_dimm;
44 };
45 
46 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
47 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
48 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
49 #define PC_MACHINE_VMPORT           "vmport"
50 #define PC_MACHINE_ENFORCE_ALIGNED_DIMM "enforce-aligned-dimm"
51 
52 /**
53  * PCMachineClass:
54  * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
55  */
56 struct PCMachineClass {
57     /*< private >*/
58     MachineClass parent_class;
59 
60     /*< public >*/
61     HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
62                                            DeviceState *dev);
63 };
64 
65 typedef struct PCMachineState PCMachineState;
66 typedef struct PCMachineClass PCMachineClass;
67 
68 #define TYPE_PC_MACHINE "generic-pc-machine"
69 #define PC_MACHINE(obj) \
70     OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
71 #define PC_MACHINE_GET_CLASS(obj) \
72     OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
73 #define PC_MACHINE_CLASS(klass) \
74     OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
75 
76 void qemu_register_pc_machine(QEMUMachine *m);
77 
78 /* PC-style peripherals (also used by other machines).  */
79 
80 typedef struct PcPciInfo {
81     Range w32;
82     Range w64;
83 } PcPciInfo;
84 
85 #define ACPI_PM_PROP_S3_DISABLED "disable_s3"
86 #define ACPI_PM_PROP_S4_DISABLED "disable_s4"
87 #define ACPI_PM_PROP_S4_VAL "s4_val"
88 #define ACPI_PM_PROP_SCI_INT "sci_int"
89 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
90 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
91 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
92 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
93 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
94 
95 struct PcGuestInfo {
96     bool isapc_ram_fw;
97     hwaddr ram_size, ram_size_below_4g;
98     unsigned apic_id_limit;
99     bool apic_xrupt_override;
100     uint64_t numa_nodes;
101     uint64_t *node_mem;
102     uint64_t *node_cpu;
103     FWCfgState *fw_cfg;
104     int legacy_acpi_table_size;
105     bool has_acpi_build;
106     bool has_reserved_memory;
107 };
108 
109 /* parallel.c */
110 
111 void parallel_hds_isa_init(ISABus *bus, int n);
112 
113 bool parallel_mm_init(MemoryRegion *address_space,
114                       hwaddr base, int it_shift, qemu_irq irq,
115                       CharDriverState *chr);
116 
117 /* i8259.c */
118 
119 extern DeviceState *isa_pic;
120 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
121 qemu_irq *kvm_i8259_init(ISABus *bus);
122 int pic_read_irq(DeviceState *d);
123 int pic_get_output(DeviceState *d);
124 void hmp_info_pic(Monitor *mon, const QDict *qdict);
125 void hmp_info_irq(Monitor *mon, const QDict *qdict);
126 
127 /* Global System Interrupts */
128 
129 #define GSI_NUM_PINS IOAPIC_NUM_PINS
130 
131 typedef struct GSIState {
132     qemu_irq i8259_irq[ISA_NUM_IRQS];
133     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
134 } GSIState;
135 
136 void gsi_handler(void *opaque, int n, int level);
137 
138 /* vmport.c */
139 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
140 
141 static inline void vmport_init(ISABus *bus)
142 {
143     isa_create_simple(bus, "vmport");
144 }
145 
146 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
147 void vmmouse_get_data(uint32_t *data);
148 void vmmouse_set_data(const uint32_t *data);
149 
150 /* pckbd.c */
151 
152 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
153 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
154                    MemoryRegion *region, ram_addr_t size,
155                    hwaddr mask);
156 void i8042_isa_mouse_fake_event(void *opaque);
157 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
158 
159 /* pc.c */
160 extern int fd_bootchk;
161 
162 void pc_register_ferr_irq(qemu_irq irq);
163 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
164 
165 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
166 void pc_hot_add_cpu(const int64_t id, Error **errp);
167 void pc_acpi_init(const char *default_dsdt);
168 
169 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
170                                 ram_addr_t above_4g_mem_size);
171 
172 void pc_set_legacy_acpi_data_size(void);
173 
174 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
175 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
176 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
177 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
178 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
179 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
180 
181 
182 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
183                             MemoryRegion *pci_address_space);
184 
185 FWCfgState *xen_load_linux(const char *kernel_filename,
186                            const char *kernel_cmdline,
187                            const char *initrd_filename,
188                            ram_addr_t below_4g_mem_size,
189                            PcGuestInfo *guest_info);
190 FWCfgState *pc_memory_init(MachineState *machine,
191                            MemoryRegion *system_memory,
192                            ram_addr_t below_4g_mem_size,
193                            ram_addr_t above_4g_mem_size,
194                            MemoryRegion *rom_memory,
195                            MemoryRegion **ram_memory,
196                            PcGuestInfo *guest_info);
197 qemu_irq *pc_allocate_cpu_irq(void);
198 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
199 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
200                           ISADevice **rtc_state,
201                           ISADevice **floppy,
202                           bool no_vmport,
203                           uint32 hpet_irqs);
204 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
205 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
206                   const char *boot_device, MachineState *machine,
207                   ISADevice *floppy, BusState *ide0, BusState *ide1,
208                   ISADevice *s);
209 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
210 void pc_pci_device_init(PCIBus *pci_bus);
211 
212 typedef void (*cpu_set_smm_t)(int smm, void *arg);
213 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
214 
215 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
216 
217 /* acpi_piix.c */
218 
219 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
220                       qemu_irq sci_irq, qemu_irq smi_irq,
221                       int kvm_enabled, FWCfgState *fw_cfg,
222                       DeviceState **piix4_pm);
223 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
224 
225 /* hpet.c */
226 extern int no_hpet;
227 
228 /* piix_pci.c */
229 struct PCII440FXState;
230 typedef struct PCII440FXState PCII440FXState;
231 
232 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
233                     ISABus **isa_bus, qemu_irq *pic,
234                     MemoryRegion *address_space_mem,
235                     MemoryRegion *address_space_io,
236                     ram_addr_t ram_size,
237                     ram_addr_t below_4g_mem_size,
238                     ram_addr_t above_4g_mem_size,
239                     MemoryRegion *pci_memory,
240                     MemoryRegion *ram_memory);
241 
242 PCIBus *find_i440fx(void);
243 /* piix4.c */
244 extern PCIDevice *piix4_dev;
245 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
246 
247 /* vga.c */
248 enum vga_retrace_method {
249     VGA_RETRACE_DUMB,
250     VGA_RETRACE_PRECISE
251 };
252 
253 extern enum vga_retrace_method vga_retrace_method;
254 
255 int isa_vga_mm_init(hwaddr vram_base,
256                     hwaddr ctrl_base, int it_shift,
257                     MemoryRegion *address_space);
258 
259 /* ne2000.c */
260 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
261 {
262     DeviceState *dev;
263     ISADevice *isadev;
264 
265     qemu_check_nic_model(nd, "ne2k_isa");
266 
267     isadev = isa_try_create(bus, "ne2k_isa");
268     if (!isadev) {
269         return false;
270     }
271     dev = DEVICE(isadev);
272     qdev_prop_set_uint32(dev, "iobase", base);
273     qdev_prop_set_uint32(dev, "irq",    irq);
274     qdev_set_nic_properties(dev, nd);
275     qdev_init_nofail(dev);
276     return true;
277 }
278 
279 /* pc_sysfw.c */
280 void pc_system_firmware_init(MemoryRegion *rom_memory,
281                              bool isapc_ram_fw);
282 
283 /* pvpanic.c */
284 uint16_t pvpanic_port(void);
285 
286 /* e820 types */
287 #define E820_RAM        1
288 #define E820_RESERVED   2
289 #define E820_ACPI       3
290 #define E820_NVS        4
291 #define E820_UNUSABLE   5
292 
293 int e820_add_entry(uint64_t, uint64_t, uint32_t);
294 int e820_get_num_entries(void);
295 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
296 
297 #define PC_COMPAT_2_0 \
298         HW_COMPAT_2_1, \
299         {\
300             .driver   = "virtio-scsi-pci",\
301             .property = "any_layout",\
302             .value    = "off",\
303         },{\
304             .driver   = "PIIX4_PM",\
305             .property = "memory-hotplug-support",\
306             .value    = "off",\
307         },\
308         {\
309             .driver   = "apic",\
310             .property = "version",\
311             .value    = stringify(0x11),\
312         },\
313         {\
314             .driver   = "nec-usb-xhci",\
315             .property = "superspeed-ports-first",\
316             .value    = "off",\
317         },\
318         {\
319             .driver   = "nec-usb-xhci",\
320             .property = "force-pcie-endcap",\
321             .value    = "on",\
322         },\
323         {\
324             .driver   = "pci-serial",\
325             .property = "prog_if",\
326             .value    = stringify(0),\
327         },\
328         {\
329             .driver   = "pci-serial-2x",\
330             .property = "prog_if",\
331             .value    = stringify(0),\
332         },\
333         {\
334             .driver   = "pci-serial-4x",\
335             .property = "prog_if",\
336             .value    = stringify(0),\
337         },\
338         {\
339             .driver   = "virtio-net-pci",\
340             .property = "guest_announce",\
341             .value    = "off",\
342         },\
343         {\
344             .driver   = "ICH9-LPC",\
345             .property = "memory-hotplug-support",\
346             .value    = "off",\
347         },{\
348             .driver   = "xio3130-downstream",\
349             .property = COMPAT_PROP_PCP,\
350             .value    = "off",\
351         },{\
352             .driver   = "ioh3420",\
353             .property = COMPAT_PROP_PCP,\
354             .value    = "off",\
355         }
356 
357 #define PC_COMPAT_1_7 \
358         PC_COMPAT_2_0, \
359         {\
360             .driver   = TYPE_USB_DEVICE,\
361             .property = "msos-desc",\
362             .value    = "no",\
363         },\
364         {\
365             .driver   = "PIIX4_PM",\
366             .property = "acpi-pci-hotplug-with-bridge-support",\
367             .value    = "off",\
368         },\
369         {\
370             .driver   = "hpet",\
371             .property = HPET_INTCAP,\
372             .value    = stringify(4),\
373         }
374 
375 #define PC_COMPAT_1_6 \
376         PC_COMPAT_1_7, \
377         {\
378             .driver   = "e1000",\
379             .property = "mitigation",\
380             .value    = "off",\
381         },{\
382             .driver   = "qemu64-" TYPE_X86_CPU,\
383             .property = "model",\
384             .value    = stringify(2),\
385         },{\
386             .driver   = "qemu32-" TYPE_X86_CPU,\
387             .property = "model",\
388             .value    = stringify(3),\
389         },{\
390             .driver   = "i440FX-pcihost",\
391             .property = "short_root_bus",\
392             .value    = stringify(1),\
393         },{\
394             .driver   = "q35-pcihost",\
395             .property = "short_root_bus",\
396             .value    = stringify(1),\
397         }
398 
399 #define PC_COMPAT_1_5 \
400         PC_COMPAT_1_6, \
401         {\
402             .driver   = "Conroe-" TYPE_X86_CPU,\
403             .property = "model",\
404             .value    = stringify(2),\
405         },{\
406             .driver   = "Conroe-" TYPE_X86_CPU,\
407             .property = "level",\
408             .value    = stringify(2),\
409         },{\
410             .driver   = "Penryn-" TYPE_X86_CPU,\
411             .property = "model",\
412             .value    = stringify(2),\
413         },{\
414             .driver   = "Penryn-" TYPE_X86_CPU,\
415             .property = "level",\
416             .value    = stringify(2),\
417         },{\
418             .driver   = "Nehalem-" TYPE_X86_CPU,\
419             .property = "model",\
420             .value    = stringify(2),\
421         },{\
422             .driver   = "Nehalem-" TYPE_X86_CPU,\
423             .property = "level",\
424             .value    = stringify(2),\
425         },{\
426             .driver   = "virtio-net-pci",\
427             .property = "any_layout",\
428             .value    = "off",\
429         },{\
430             .driver = TYPE_X86_CPU,\
431             .property = "pmu",\
432             .value = "on",\
433         },{\
434             .driver   = "i440FX-pcihost",\
435             .property = "short_root_bus",\
436             .value    = stringify(0),\
437         },{\
438             .driver   = "q35-pcihost",\
439             .property = "short_root_bus",\
440             .value    = stringify(0),\
441         }
442 
443 #define PC_COMPAT_1_4 \
444         PC_COMPAT_1_5, \
445         {\
446             .driver   = "scsi-hd",\
447             .property = "discard_granularity",\
448             .value    = stringify(0),\
449 	},{\
450             .driver   = "scsi-cd",\
451             .property = "discard_granularity",\
452             .value    = stringify(0),\
453 	},{\
454             .driver   = "scsi-disk",\
455             .property = "discard_granularity",\
456             .value    = stringify(0),\
457 	},{\
458             .driver   = "ide-hd",\
459             .property = "discard_granularity",\
460             .value    = stringify(0),\
461 	},{\
462             .driver   = "ide-cd",\
463             .property = "discard_granularity",\
464             .value    = stringify(0),\
465 	},{\
466             .driver   = "ide-drive",\
467             .property = "discard_granularity",\
468             .value    = stringify(0),\
469         },{\
470             .driver   = "virtio-blk-pci",\
471             .property = "discard_granularity",\
472             .value    = stringify(0),\
473 	},{\
474             .driver   = "virtio-serial-pci",\
475             .property = "vectors",\
476             /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
477             .value    = stringify(0xFFFFFFFF),\
478         },{ \
479             .driver   = "virtio-net-pci", \
480             .property = "ctrl_guest_offloads", \
481             .value    = "off", \
482         },{\
483             .driver   = "e1000",\
484             .property = "romfile",\
485             .value    = "pxe-e1000.rom",\
486         },{\
487             .driver   = "ne2k_pci",\
488             .property = "romfile",\
489             .value    = "pxe-ne2k_pci.rom",\
490         },{\
491             .driver   = "pcnet",\
492             .property = "romfile",\
493             .value    = "pxe-pcnet.rom",\
494         },{\
495             .driver   = "rtl8139",\
496             .property = "romfile",\
497             .value    = "pxe-rtl8139.rom",\
498         },{\
499             .driver   = "virtio-net-pci",\
500             .property = "romfile",\
501             .value    = "pxe-virtio.rom",\
502         },{\
503             .driver   = "486-" TYPE_X86_CPU,\
504             .property = "model",\
505             .value    = stringify(0),\
506         }
507 
508 #define PC_COMMON_MACHINE_OPTIONS \
509     .default_boot_order = "cad"
510 
511 #define PC_DEFAULT_MACHINE_OPTIONS \
512     PC_COMMON_MACHINE_OPTIONS, \
513     .hot_add_cpu = pc_hot_add_cpu, \
514     .max_cpus = 255
515 
516 #endif
517