1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/cxl/cxl.h" 16 17 #define MAX_IDE_BUS 2 18 19 /** 20 * PCMachineState: 21 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 22 * @boot_cpus: number of present VCPUs 23 */ 24 typedef struct PCMachineState { 25 /*< private >*/ 26 X86MachineState parent_obj; 27 28 /* <public> */ 29 30 /* State for other subsystems/APIs: */ 31 Notifier machine_done; 32 33 /* Pointers to devices and objects: */ 34 PCIBus *pcibus; 35 I2CBus *smbus; 36 PFlashCFI01 *flash[2]; 37 ISADevice *pcspk; 38 DeviceState *iommu; 39 BusState *idebus[MAX_IDE_BUS]; 40 41 /* Configuration options: */ 42 uint64_t max_ram_below_4g; 43 OnOffAuto vmport; 44 SmbiosEntryPointType smbios_entry_point_type; 45 const char *south_bridge; 46 47 bool acpi_build_enabled; 48 bool smbus_enabled; 49 bool sata_enabled; 50 bool hpet_enabled; 51 bool i8042_enabled; 52 bool default_bus_bypass_iommu; 53 bool fd_bootchk; 54 uint64_t max_fw_size; 55 56 /* ACPI Memory hotplug IO base address */ 57 hwaddr memhp_io_base; 58 59 SGXEPCState sgx_epc; 60 CXLState cxl_devices_state; 61 } PCMachineState; 62 63 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 64 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 65 #define PC_MACHINE_VMPORT "vmport" 66 #define PC_MACHINE_SMBUS "smbus" 67 #define PC_MACHINE_SATA "sata" 68 #define PC_MACHINE_I8042 "i8042" 69 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 70 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 71 72 /** 73 * PCMachineClass: 74 * 75 * Compat fields: 76 * 77 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 78 * backend's alignment value if provided 79 * @acpi_data_size: Size of the chunk of memory at the top of RAM 80 * for the BIOS ACPI tables and other BIOS 81 * datastructures. 82 * @gigabyte_align: Make sure that guest addresses aligned at 83 * 1Gbyte boundaries get mapped to host 84 * addresses aligned at 1Gbyte boundaries. This 85 * way we can use 1GByte pages in the host. 86 * 87 */ 88 struct PCMachineClass { 89 /*< private >*/ 90 X86MachineClass parent_class; 91 92 /*< public >*/ 93 94 /* Device configuration: */ 95 bool pci_enabled; 96 const char *default_south_bridge; 97 98 /* Compat options: */ 99 100 /* Default CPU model version. See x86_cpu_set_default_version(). */ 101 int default_cpu_version; 102 103 /* ACPI compat: */ 104 bool has_acpi_build; 105 bool rsdp_in_ram; 106 int legacy_acpi_table_size; 107 unsigned acpi_data_size; 108 int pci_root_uid; 109 110 /* SMBIOS compat: */ 111 bool smbios_defaults; 112 bool smbios_legacy_mode; 113 bool smbios_uuid_encoded; 114 SmbiosEntryPointType default_smbios_ep_type; 115 116 /* RAM / address space compat: */ 117 bool gigabyte_align; 118 bool has_reserved_memory; 119 bool enforce_aligned_dimm; 120 bool broken_reserved_end; 121 bool enforce_amd_1tb_hole; 122 bool isa_bios_alias; 123 124 /* generate legacy CPU hotplug AML */ 125 bool legacy_cpu_hotplug; 126 127 /* use PVH to load kernels that support this feature */ 128 bool pvh_enabled; 129 130 /* create kvmclock device even when KVM PV features are not exposed */ 131 bool kvmclock_create_always; 132 133 /* resizable acpi blob compat */ 134 bool resizable_acpi_blob; 135 136 /* 137 * whether the machine type implements broken 32-bit address space bound 138 * check for memory. 139 */ 140 bool broken_32bit_mem_addr_check; 141 }; 142 143 #define TYPE_PC_MACHINE "generic-pc-machine" 144 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 145 146 /* ioapic.c */ 147 148 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 149 150 /* pc.c */ 151 152 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 153 154 #define PCI_HOST_PROP_RAM_MEM "ram-mem" 155 #define PCI_HOST_PROP_PCI_MEM "pci-mem" 156 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" 157 #define PCI_HOST_PROP_IO_MEM "io-mem" 158 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 159 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 160 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 161 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 162 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 163 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 164 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 165 #define PCI_HOST_PROP_SMM_RANGES "smm-ranges" 166 167 168 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 169 MemoryRegion *pci_address_space); 170 171 void xen_load_linux(PCMachineState *pcms); 172 void pc_memory_init(PCMachineState *pcms, 173 MemoryRegion *system_memory, 174 MemoryRegion *rom_memory, 175 uint64_t pci_hole64_size); 176 uint64_t pc_pci_hole64_start(void); 177 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 178 void pc_basic_device_init(struct PCMachineState *pcms, 179 ISABus *isa_bus, qemu_irq *gsi, 180 ISADevice *rtc_state, 181 bool create_fdctrl, 182 uint32_t hpet_irqs); 183 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 184 185 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 186 187 /* port92.c */ 188 #define PORT92_A20_LINE "a20" 189 190 #define TYPE_PORT92 "port92" 191 192 /* pc_sysfw.c */ 193 void pc_system_flash_create(PCMachineState *pcms); 194 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 195 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 196 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 197 int *data_len); 198 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 199 200 /* sgx.c */ 201 void pc_machine_init_sgx_epc(PCMachineState *pcms); 202 203 extern GlobalProperty pc_compat_9_0[]; 204 extern const size_t pc_compat_9_0_len; 205 206 extern GlobalProperty pc_compat_8_2[]; 207 extern const size_t pc_compat_8_2_len; 208 209 extern GlobalProperty pc_compat_8_1[]; 210 extern const size_t pc_compat_8_1_len; 211 212 extern GlobalProperty pc_compat_8_0[]; 213 extern const size_t pc_compat_8_0_len; 214 215 extern GlobalProperty pc_compat_7_2[]; 216 extern const size_t pc_compat_7_2_len; 217 218 extern GlobalProperty pc_compat_7_1[]; 219 extern const size_t pc_compat_7_1_len; 220 221 extern GlobalProperty pc_compat_7_0[]; 222 extern const size_t pc_compat_7_0_len; 223 224 extern GlobalProperty pc_compat_6_2[]; 225 extern const size_t pc_compat_6_2_len; 226 227 extern GlobalProperty pc_compat_6_1[]; 228 extern const size_t pc_compat_6_1_len; 229 230 extern GlobalProperty pc_compat_6_0[]; 231 extern const size_t pc_compat_6_0_len; 232 233 extern GlobalProperty pc_compat_5_2[]; 234 extern const size_t pc_compat_5_2_len; 235 236 extern GlobalProperty pc_compat_5_1[]; 237 extern const size_t pc_compat_5_1_len; 238 239 extern GlobalProperty pc_compat_5_0[]; 240 extern const size_t pc_compat_5_0_len; 241 242 extern GlobalProperty pc_compat_4_2[]; 243 extern const size_t pc_compat_4_2_len; 244 245 extern GlobalProperty pc_compat_4_1[]; 246 extern const size_t pc_compat_4_1_len; 247 248 extern GlobalProperty pc_compat_4_0[]; 249 extern const size_t pc_compat_4_0_len; 250 251 extern GlobalProperty pc_compat_3_1[]; 252 extern const size_t pc_compat_3_1_len; 253 254 extern GlobalProperty pc_compat_3_0[]; 255 extern const size_t pc_compat_3_0_len; 256 257 extern GlobalProperty pc_compat_2_12[]; 258 extern const size_t pc_compat_2_12_len; 259 260 extern GlobalProperty pc_compat_2_11[]; 261 extern const size_t pc_compat_2_11_len; 262 263 extern GlobalProperty pc_compat_2_10[]; 264 extern const size_t pc_compat_2_10_len; 265 266 extern GlobalProperty pc_compat_2_9[]; 267 extern const size_t pc_compat_2_9_len; 268 269 extern GlobalProperty pc_compat_2_8[]; 270 extern const size_t pc_compat_2_8_len; 271 272 extern GlobalProperty pc_compat_2_7[]; 273 extern const size_t pc_compat_2_7_len; 274 275 extern GlobalProperty pc_compat_2_6[]; 276 extern const size_t pc_compat_2_6_len; 277 278 extern GlobalProperty pc_compat_2_5[]; 279 extern const size_t pc_compat_2_5_len; 280 281 extern GlobalProperty pc_compat_2_4[]; 282 extern const size_t pc_compat_2_4_len; 283 284 extern GlobalProperty pc_compat_2_3[]; 285 extern const size_t pc_compat_2_3_len; 286 287 extern GlobalProperty pc_compat_2_2[]; 288 extern const size_t pc_compat_2_2_len; 289 290 extern GlobalProperty pc_compat_2_1[]; 291 extern const size_t pc_compat_2_1_len; 292 293 extern GlobalProperty pc_compat_2_0[]; 294 extern const size_t pc_compat_2_0_len; 295 296 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 297 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 298 { \ 299 MachineClass *mc = MACHINE_CLASS(oc); \ 300 optsfn(mc); \ 301 mc->init = initfn; \ 302 } \ 303 static const TypeInfo pc_machine_type_##suffix = { \ 304 .name = namestr TYPE_MACHINE_SUFFIX, \ 305 .parent = TYPE_PC_MACHINE, \ 306 .class_init = pc_machine_##suffix##_class_init, \ 307 }; \ 308 static void pc_machine_init_##suffix(void) \ 309 { \ 310 type_register(&pc_machine_type_##suffix); \ 311 } \ 312 type_init(pc_machine_init_##suffix) 313 314 #endif 315