1 /* 2 * Copyright (c) 2018 Intel Corporation 3 * Copyright (c) 2019 Red Hat, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef HW_I386_MICROVM_H 19 #define HW_I386_MICROVM_H 20 21 #include "qemu-common.h" 22 #include "exec/hwaddr.h" 23 #include "qemu/notify.h" 24 25 #include "hw/boards.h" 26 #include "hw/i386/x86.h" 27 #include "hw/acpi/acpi_dev_interface.h" 28 #include "hw/pci-host/gpex.h" 29 #include "qom/object.h" 30 31 /* 32 * IRQ | pc | microvm (acpi=on) 33 * --------+------------+------------------ 34 * 0 | pit | 35 * 1 | kbd | 36 * 2 | cascade | 37 * 3 | serial 1 | 38 * 4 | serial 0 | serial 39 * 5 | - | 40 * 6 | floppy | 41 * 7 | parallel | 42 * 8 | rtc | rtc (rtc=on) 43 * 9 | acpi | acpi (ged) 44 * 10 | pci lnk | xhci (usb=on) 45 * 11 | pci lnk | 46 * 12 | ps2 | pcie 47 * 13 | fpu | pcie 48 * 14 | ide 0 | pcie 49 * 15 | ide 1 | pcie 50 * 16-23 | pci gsi | virtio 51 */ 52 53 /* Platform virtio definitions */ 54 #define VIRTIO_MMIO_BASE 0xfeb00000 55 #define VIRTIO_NUM_TRANSPORTS 8 56 #define VIRTIO_CMDLINE_MAXLEN 64 57 58 #define GED_MMIO_BASE 0xfea00000 59 #define GED_MMIO_BASE_MEMHP (GED_MMIO_BASE + 0x100) 60 #define GED_MMIO_BASE_REGS (GED_MMIO_BASE + 0x200) 61 #define GED_MMIO_IRQ 9 62 63 #define MICROVM_XHCI_BASE 0xfe900000 64 #define MICROVM_XHCI_IRQ 10 65 66 #define PCIE_MMIO_BASE 0xc0000000 67 #define PCIE_MMIO_SIZE 0x20000000 68 #define PCIE_ECAM_BASE 0xe0000000 69 #define PCIE_ECAM_SIZE 0x10000000 70 #define PCIE_IRQ_BASE 12 71 72 /* Machine type options */ 73 #define MICROVM_MACHINE_PIT "pit" 74 #define MICROVM_MACHINE_PIC "pic" 75 #define MICROVM_MACHINE_RTC "rtc" 76 #define MICROVM_MACHINE_PCIE "pcie" 77 #define MICROVM_MACHINE_ISA_SERIAL "isa-serial" 78 #define MICROVM_MACHINE_OPTION_ROMS "x-option-roms" 79 #define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline" 80 81 struct MicrovmMachineClass { 82 X86MachineClass parent; 83 HotplugHandler *(*orig_hotplug_handler)(MachineState *machine, 84 DeviceState *dev); 85 }; 86 87 struct MicrovmMachineState { 88 X86MachineState parent; 89 90 /* Machine type options */ 91 OnOffAuto pic; 92 OnOffAuto pit; 93 OnOffAuto rtc; 94 OnOffAuto pcie; 95 bool isa_serial; 96 bool option_roms; 97 bool auto_kernel_cmdline; 98 99 /* Machine state */ 100 uint32_t virtio_irq_base; 101 bool kernel_cmdline_fixed; 102 Notifier machine_done; 103 Notifier powerdown_req; 104 struct GPEXConfig gpex; 105 }; 106 107 #define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm") 108 OBJECT_DECLARE_TYPE(MicrovmMachineState, MicrovmMachineClass, MICROVM_MACHINE) 109 110 #endif 111