xref: /openbmc/qemu/include/hw/i2c/bcm2835_i2c.h (revision 006e845b)
1 /*
2  * Broadcom Serial Controller (BSC)
3  *
4  * Copyright (c) 2024 Rayhan Faizel <rayhan.faizel@gmail.com>
5  *
6  * SPDX-License-Identifier: MIT
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a copy
9  * of this software and associated documentation files (the "Software"), to deal
10  * in the Software without restriction, including without limitation the rights
11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12  * copies of the Software, and to permit persons to whom the Software is
13  * furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24  * THE SOFTWARE.
25  */
26 
27 #include "hw/sysbus.h"
28 #include "hw/i2c/i2c.h"
29 #include "qom/object.h"
30 
31 #define TYPE_BCM2835_I2C "bcm2835-i2c"
32 OBJECT_DECLARE_SIMPLE_TYPE(BCM2835I2CState, BCM2835_I2C)
33 
34 #define BCM2835_I2C_C       0x0                   /* Control */
35 #define BCM2835_I2C_S       0x4                   /* Status */
36 #define BCM2835_I2C_DLEN    0x8                   /* Data Length */
37 #define BCM2835_I2C_A       0xc                   /* Slave Address */
38 #define BCM2835_I2C_FIFO    0x10                  /* FIFO */
39 #define BCM2835_I2C_DIV     0x14                  /* Clock Divider */
40 #define BCM2835_I2C_DEL     0x18                  /* Data Delay */
41 #define BCM2835_I2C_CLKT    0x20                  /* Clock Stretch Timeout */
42 
43 #define BCM2835_I2C_C_I2CEN     BIT(15)           /* I2C enable */
44 #define BCM2835_I2C_C_INTR      BIT(10)           /* Interrupt on RXR */
45 #define BCM2835_I2C_C_INTT      BIT(9)            /* Interrupt on TXW */
46 #define BCM2835_I2C_C_INTD      BIT(8)            /* Interrupt on DONE */
47 #define BCM2835_I2C_C_ST        BIT(7)            /* Start transfer */
48 #define BCM2835_I2C_C_CLEAR     (BIT(5) | BIT(4)) /* Clear FIFO */
49 #define BCM2835_I2C_C_READ      BIT(0)            /* I2C read mode */
50 
51 #define BCM2835_I2C_S_CLKT      BIT(9)            /* Clock stretch timeout */
52 #define BCM2835_I2C_S_ERR       BIT(8)            /* Slave error */
53 #define BCM2835_I2C_S_RXF       BIT(7)            /* RX FIFO full */
54 #define BCM2835_I2C_S_TXE       BIT(6)            /* TX FIFO empty */
55 #define BCM2835_I2C_S_RXD       BIT(5)            /* RX bytes available */
56 #define BCM2835_I2C_S_TXD       BIT(4)            /* TX space available */
57 #define BCM2835_I2C_S_RXR       BIT(3)            /* RX FIFO needs reading */
58 #define BCM2835_I2C_S_TXW       BIT(2)            /* TX FIFO needs writing */
59 #define BCM2835_I2C_S_DONE      BIT(1)            /* I2C Transfer complete */
60 #define BCM2835_I2C_S_TA        BIT(0)            /* I2C Transfer active */
61 
62 struct BCM2835I2CState {
63     /* <private> */
64     SysBusDevice parent_obj;
65 
66     /* <public> */
67     MemoryRegion iomem;
68     I2CBus *bus;
69     qemu_irq irq;
70 
71     uint32_t c;
72     uint32_t s;
73     uint32_t dlen;
74     uint32_t a;
75     uint32_t div;
76     uint32_t del;
77     uint32_t clkt;
78 
79     uint32_t last_dlen;
80 };
81