xref: /openbmc/qemu/include/hw/i2c/aspeed_i2c.h (revision 135b03cb)
1 /*
2  *  ASPEED AST2400 I2C Controller
3  *
4  *  Copyright (C) 2016 IBM Corp.
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License along
17  *  with this program; if not, write to the Free Software Foundation, Inc.,
18  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19  */
20 
21 #ifndef ASPEED_I2C_H
22 #define ASPEED_I2C_H
23 
24 #include "hw/i2c/i2c.h"
25 #include "hw/sysbus.h"
26 
27 #define TYPE_ASPEED_I2C "aspeed.i2c"
28 #define ASPEED_I2C(obj) \
29     OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C)
30 
31 #define ASPEED_I2C_NR_BUSSES 14
32 
33 struct AspeedI2CState;
34 
35 typedef struct AspeedI2CBus {
36     struct AspeedI2CState *controller;
37 
38     MemoryRegion mr;
39 
40     I2CBus *bus;
41     uint8_t id;
42 
43     uint32_t ctrl;
44     uint32_t timing[2];
45     uint32_t intr_ctrl;
46     uint32_t intr_status;
47     uint32_t cmd;
48     uint32_t buf;
49 } AspeedI2CBus;
50 
51 typedef struct AspeedI2CState {
52     SysBusDevice parent_obj;
53 
54     MemoryRegion iomem;
55     qemu_irq irq;
56 
57     uint32_t intr_status;
58 
59     AspeedI2CBus busses[ASPEED_I2C_NR_BUSSES];
60 } AspeedI2CState;
61 
62 I2CBus *aspeed_i2c_get_bus(DeviceState *dev, int busnr);
63 
64 #endif /* ASPEED_I2C_H */
65